| /external/clang/test/CodeGen/ |
| BasicInstrs.c | 19 _Bool setlt(int X, int Y) { function
|
| /external/llvm/test/Transforms/InstCombine/ |
| setcc-strength-reduce.ll | 2 ; working. Basically this boils down to converting setlt,gt,le,ge instructions
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| /external/llvm/test/CodeGen/PowerPC/ |
| ppc-vaarg-agg.ll | 44 ; with an error like: Cannot select: ch = setlt [ID=6]
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| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| dont-hoist-simple-loop-constants.ll | 4 ; The setlt wants to use a value that is incremented one more than the dominant
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSelectCCInfo.td | 43 IntRegs:$fval, SETLT)),
111 // setlt-64 -> setgt-64.
113 DoubleRegs:$fval, SETLT)),
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| HexagonInstrInfoV3.td | 91 (i64 (select (i1 (setlt (i64 DoubleRegs:$src2),
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| HexagonInstrInfo.td | 518 defm CMPLT : CMP32_rr<"cmp.lt", setlt>;
595 (i32 (select (i1 (setlt (i32 IntRegs:$src2),
610 (i64 (select (i1 (setlt (i64 DoubleRegs:$src2),
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDILISelLowering.cpp | 508 ISD::SETLT);
515 ISD::SETLT);
610 SDValue r10 = DAG.getSetCC(DL, OVT, r0, DAG.getConstant(0, OVT), ISD::SETLT);
613 SDValue r11 = DAG.getSetCC(DL, OVT, r1, DAG.getConstant(0, OVT), ISD::SETLT);
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| AMDGPUInstructions.td | 70 case ISD::SETLT: return true;}}}]
|
| /external/llvm/utils/emacs/ |
| llvm-mode.el | 36 "setne" "seteq" "setlt" "setgt" "setle" "setge") 'words) . font-lock-keyword-face)
|
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.td | [all...] |
| Mips64InstrInfo.td | 79 def SLTi64 : SetCC_I<"slti", setlt, simm16_64, immSExt16, CPU64Regs>,
95 def SLT64 : SetCC_R<"slt", setlt, CPU64Regs>, ADD_FM<0, 0x2a>;
169 def BLTZ64 : CBranchZero<"bltz", setlt, CPU64Regs>, BGEZ_FM<1, 0>;
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| MipsInstrInfo.td | 804 def SLTi : SetCC_I<"slti", setlt, simm16, immSExt16, CPURegs>, SLTI_FM<0xa>;
820 def SLT : SetCC_R<"slt", setlt, CPURegs>, ADD_FM<0, 0x2a>;
[all...] |
| /external/llvm/lib/CodeGen/ |
| Analysis.cpp | 176 case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT;
195 case ICmpInst::ICMP_SLT: return ISD::SETLT;
|
| TargetLoweringBase.cpp | 602 CCs[RTLIB::OLT_F32] = ISD::SETLT;
603 CCs[RTLIB::OLT_F64] = ISD::SETLT;
604 CCs[RTLIB::OLT_F128] = ISD::SETLT;
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| cmov.ll | 67 ; (movz t, (setlt a, N + 1), f)
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 585 case ISD::SETLT: return PPC::PRED_LT;
612 case ISD::SETLT: return 0; // Bit #0 = SETOLT
655 case ISD::SETLT:
746 case ISD::SETLT: {
779 case ISD::SETLT: {
819 case ISD::SETLT:
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeInstrInfo.td | 769 def : Pat<(setcc (i32 GPR:$L), (i32 0), SETLT),
794 def : Pat<(setcc (i32 0), (i32 GPR:$R), SETLT),
822 def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETLT),
[all...] |
| MBlazeInstrFPU.td | 160 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETLT),
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 308 case ISD::SETLT: return "setlt";
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| TargetLowering.cpp | 127 case ISD::SETLT:
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | [all...] |
| /external/clang/www/demo/ |
| index.cgi | 99 $input =~ s@\b(add|sub|mul|div|rem|and|or|xor|setne|seteq|setlt|setgt|setle|setge|phi|tail|call|cast|to|shl|shr|vaarg|vanext|ret|br|switch|invoke|unwind|malloc|alloca|free|load|store|getelementptr|begin|end|true|false|declare|global|constant|const|internal|uninitialized|external|implementation|linkonce|weak|appending|null|to|except|not|target|endian|pointersize|big|little|volatile)\b@<span class="llvm_keyword">$1</span>@g;
|
| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAG.td | 505 def SETLT : CondCode; def SETLE : CondCode; def SETNE : CondCode;
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.td | [all...] |
