1 //===-- Mips16ISelLowering.h - Mips16 DAG Lowering Interface ----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // Subclass of MipsTargetLowering specialized for mips16. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef Mips16ISELLOWERING_H 15 #define Mips16ISELLOWERING_H 16 17 #include "MipsISelLowering.h" 18 19 namespace llvm { 20 class Mips16TargetLowering : public MipsTargetLowering { 21 public: 22 explicit Mips16TargetLowering(MipsTargetMachine &TM); 23 24 virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const; 25 26 virtual MachineBasicBlock * 27 EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const; 28 29 private: 30 virtual bool 31 isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo, 32 unsigned NextStackOffset, 33 const MipsFunctionInfo& FI) const; 34 35 void setMips16LibcallName(RTLIB::Libcall, const char *Name); 36 37 void setMips16HardFloatLibCalls(); 38 39 unsigned int 40 getMips16HelperFunctionStubNumber(ArgListTy &Args) const; 41 42 const char *getMips16HelperFunction 43 (Type* RetTy, ArgListTy &Args, bool &needHelper) const; 44 45 virtual void 46 getOpndList(SmallVectorImpl<SDValue> &Ops, 47 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, 48 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, 49 CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const; 50 51 MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr *MI, 52 MachineBasicBlock *BB) const; 53 54 MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2, 55 MachineInstr *MI, 56 MachineBasicBlock *BB) const; 57 58 MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2, 59 MachineInstr *MI, 60 MachineBasicBlock *BB) const; 61 62 MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc, 63 MachineInstr *MI, 64 MachineBasicBlock *BB) const; 65 66 MachineBasicBlock *emitFEXT_T8I8I16_ins( 67 unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc, 68 MachineInstr *MI, MachineBasicBlock *BB) const; 69 70 MachineBasicBlock *emitFEXT_CCRX16_ins( 71 unsigned SltOpc, 72 MachineInstr *MI, MachineBasicBlock *BB) const; 73 74 MachineBasicBlock *emitFEXT_CCRXI16_ins( 75 unsigned SltiOpc, unsigned SltiXOpc, 76 MachineInstr *MI, MachineBasicBlock *BB )const; 77 }; 78 } 79 80 #endif // Mips16ISELLOWERING_H 81
