| /art/compiler/utils/mips/ |
| assembler_mips.h | 229 void Subu(Register rd, Register rs, Register rt);
|
| /external/chromium_org/third_party/tcmalloc/chromium/src/base/ |
| linux_syscall_support.h | [all...] |
| /external/chromium_org/third_party/tcmalloc/vendor/src/base/ |
| linux_syscall_support.h | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.td | [all...] |
| MipsSEISelDAGToDAG.cpp | 332 Result = selectAddESubE(Mips::SUBu, InFlag, InFlag.getOperand(0), DL, Node);
|
| MipsDSPInstrInfo.td | 525 class SUBU_QB_DESC : ADDU_QB_DESC_BASE<"subu.qb", null_frag, NoItinerary,
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| dsp-patterns.ll | 92 ; R1: subu.qb ${{[0-9]+}}
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| atomic.ll | 181 ; CHECK-EL: subu $[[R11:[0-9]+]], $[[R10]], $[[R9]]
207 ; CHECK-EB: subu $[[R11:[0-9]+]], $[[R10]], $[[R9]]
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32.txt | 401 # CHECK: subu $4, $3, $5
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| mips32_le.txt | 407 # CHECK: subu $4, $3, $5
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| mips32r2.txt | 404 # CHECK: subu $4, $3, $5
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| mips32r2_le.txt | 404 # CHECK: subu $4, $3, $5
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| /external/qemu/target-arm/ |
| helper.h | 410 DEF_IWMMXT_HELPER_SIZE(subu)
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| iwmmxt_helper.c | 310 IWMMXT_OP_CMP(subu, uint8_t, uint16_t, uint32_t, -)
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| /external/chromium_org/v8/src/mips/ |
| disasm-mips.cc | 706 case SUBU:
707 Format(instr, "subu 'rd, 'rs, 'rt");
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| ic-mips.cc | 752 __ Subu(scratch2, scratch2, Operand(Smi::FromInt(2)));
[all...] |
| full-codegen-mips.cc | 331 __ Subu(a3, a3, Operand(Smi::FromInt(delta)));
[all...] |
| constants-mips.h | 333 SUBU = ((4 << 3) + 3),
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| /external/v8/src/mips/ |
| disasm-mips.cc | 693 case SUBU:
694 Format(instr, "subu 'rd, 'rs, 'rt");
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| ic-mips.cc | 783 __ Subu(scratch2, scratch2, Operand(Smi::FromInt(2)));
[all...] |
| constants-mips.h | 328 SUBU = ((4 << 3) + 3),
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| /art/compiler/dex/quick/mips/ |
| mips_lir.h | 365 kMipsSubu, // subu d,s,t [000000] s[25..21] t[20..16] d[15..11] [00000100011].
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| /dalvik/vm/compiler/codegen/mips/ |
| MipsLIR.h | 458 kMipsSubu, /* subu d,s,t [000000] s[25..21] t[20..16] d[15..11] [00000100011] */
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| /system/core/libpixelflinger/codeflinger/ |
| MIPSAssembler.h | 274 void SUBU(int Rd, int Rs, int Rt);
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| mips_disassem.c | 84 /*32 */ "add", "addu", "sub", "subu", "and", "or ", "xor", "nor",
|
