| /cts/tests/tests/graphics/src/android/graphics/cts/ |
| Region_OpTest.java | 20 import android.graphics.Region.Op;
26 assertEquals(Op.DIFFERENCE, Op.valueOf("DIFFERENCE"));
27 assertEquals(Op.INTERSECT, Op.valueOf("INTERSECT"));
28 assertEquals(Op.UNION, Op.valueOf("UNION"));
29 assertEquals(Op.XOR, Op.valueOf("XOR"));
30 assertEquals(Op.REVERSE_DIFFERENCE, Op.valueOf("REVERSE_DIFFERENCE"))
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/InstPrinter/ |
| AMDGPUInstPrinter.cpp | 17 const MCOperand &Op = MI->getOperand(OpNo);
18 if (Op.isReg()) {
19 O << getRegisterName(Op.getReg());
20 } else if (Op.isImm()) {
21 O << Op.getImm();
22 } else if (Op.isFPImm()) {
23 O << Op.getFPImm();
|
| /external/mesa3d/src/gallium/drivers/radeon/InstPrinter/ |
| AMDGPUInstPrinter.cpp | 17 const MCOperand &Op = MI->getOperand(OpNo);
18 if (Op.isReg()) {
19 O << getRegisterName(Op.getReg());
20 } else if (Op.isImm()) {
21 O << Op.getImm();
22 } else if (Op.isFPImm()) {
23 O << Op.getFPImm();
|
| /external/llvm/include/llvm/MC/ |
| MCInst.h | 112 MCOperand Op;
113 Op.Kind = kRegister;
114 Op.RegVal = Reg;
115 return Op;
118 MCOperand Op;
119 Op.Kind = kImmediate;
120 Op.ImmVal = Val;
121 return Op;
124 MCOperand Op;
125 Op.Kind = kFPImmediate
[all...] |
| MCWin64EH.h | 36 MCWin64EHInstruction(OpType Op, MCSymbol *L, unsigned Reg)
37 : Operation(Op), Label(L), Offset(0), Register(Reg) {
38 assert(Op == Win64EH::UOP_PushNonVol);
43 MCWin64EHInstruction(OpType Op, MCSymbol *L, unsigned Reg, unsigned Off)
44 : Operation(Op), Label(L), Offset(Off), Register(Reg) {
45 assert(Op == Win64EH::UOP_SetFPReg ||
46 Op == Win64EH::UOP_SaveNonVol ||
47 Op == Win64EH::UOP_SaveNonVolBig ||
48 Op == Win64EH::UOP_SaveXMM128 ||
49 Op == Win64EH::UOP_SaveXMM128Big)
[all...] |
| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86IntelInstPrinter.cpp | 52 void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
54 int64_t Imm = MI->getOperand(Op).getImm() & 0xf;
76 void X86IntelInstPrinter::printAVXCC(const MCInst *MI, unsigned Op,
78 int64_t Imm = MI->getOperand(Op).getImm() & 0x1f;
120 const MCOperand &Op = MI->getOperand(OpNo);
121 if (Op.isImm())
122 O << formatImm(Op.getImm());
124 assert(Op.isExpr() && "unknown pcrel immediate operand");
127 const MCConstantExpr *BranchTarget = dyn_cast<MCConstantExpr>(Op.getExpr());
134 O << *Op.getExpr()
[all...] |
| X86ATTInstPrinter.cpp | 62 void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
64 int64_t Imm = MI->getOperand(Op).getImm() & 0xf;
86 void X86ATTInstPrinter::printAVXCC(const MCInst *MI, unsigned Op,
88 int64_t Imm = MI->getOperand(Op).getImm() & 0x1f;
132 const MCOperand &Op = MI->getOperand(OpNo);
133 if (Op.isImm())
134 O << formatImm(Op.getImm());
136 assert(Op.isExpr() && "unknown pcrel immediate operand");
139 const MCConstantExpr *BranchTarget = dyn_cast<MCConstantExpr>(Op.getExpr());
146 O << *Op.getExpr()
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 543 MachineOperand Op(MachineOperand::MO_Immediate);
544 Op.setImm(Val);
545 return Op;
549 MachineOperand Op(MachineOperand::MO_CImmediate);
550 Op.Contents.CI = CI;
551 return Op;
555 MachineOperand Op(MachineOperand::MO_FPImmediate);
556 Op.Contents.CFP = CFP;
557 return Op;
567 MachineOperand Op(MachineOperand::MO_Register)
[all...] |
| MachineRegisterInfo.h | 524 MachineOperand *Op;
525 explicit defusechain_iterator(MachineOperand *op) : Op(op) {
528 if (op) {
529 if ((!ReturnUses && op->isUse()) ||
530 (!ReturnDefs && op->isDef()) ||
531 (SkipDebug && op->isDebug()))
542 defusechain_iterator(const defusechain_iterator &I) : Op(I.Op) {}
[all...] |
| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| MSP430InstPrinter.cpp | 36 const MCOperand &Op = MI->getOperand(OpNo);
37 if (Op.isImm())
38 O << Op.getImm();
40 assert(Op.isExpr() && "unknown pcrel immediate operand");
41 O << *Op.getExpr();
48 const MCOperand &Op = MI->getOperand(OpNo);
49 if (Op.isReg()) {
50 O << getRegisterName(Op.getReg());
51 } else if (Op.isImm()) {
52 O << '#' << Op.getImm()
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 79 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
82 switch (Op.getOpcode()) {
84 Op.getNode()->dump();
89 case ISD::SDIV: return LowerSDIV(Op, DAG);
90 case ISD::SREM: return LowerSREM(Op, DAG);
91 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG);
92 case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG);
93 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
95 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
96 case ISD::UDIVREM: return LowerUDIVREM(Op, DAG)
[all...] |
| AMDGPUISelLowering.h | 27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
38 bool isHWTrueValue(SDValue Op) const;
39 bool isHWFalseValue(SDValue Op) const;
56 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
57 SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const;
58 SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const;
67 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
84 SDValue LowerSREM(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerSREM8(SDValue Op, SelectionDAG &DAG) const
[all...] |
| R600ISelLowering.h | 29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
44 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 79 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
82 switch (Op.getOpcode()) {
84 Op.getNode()->dump();
89 case ISD::SDIV: return LowerSDIV(Op, DAG);
90 case ISD::SREM: return LowerSREM(Op, DAG);
91 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG);
92 case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG);
93 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
95 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
96 case ISD::UDIVREM: return LowerUDIVREM(Op, DAG)
[all...] |
| AMDGPUISelLowering.h | 27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
38 bool isHWTrueValue(SDValue Op) const;
39 bool isHWFalseValue(SDValue Op) const;
56 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
57 SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const;
58 SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const;
67 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
84 SDValue LowerSREM(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerSREM8(SDValue Op, SelectionDAG &DAG) const
[all...] |
| R600ISelLowering.h | 29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
44 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.h | 28 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
29 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
40 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
43 bool isHWTrueValue(SDValue Op) const;
44 bool isHWFalseValue(SDValue Op) const;
66 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
67 SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const;
68 SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const;
69 SDValue LowerMinMax(SDValue Op, SelectionDAG &DAG) const;
82 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
[all...] |
| R600ISelLowering.h | 29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
56 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
58 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
59 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
60 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
61 SDValue LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const;
62 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
63 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
64 SDValue LowerTrig(SDValue Op, SelectionDAG &DAG) const;
70 bool isZero(SDValue Op) const
[all...] |
| AMDGPUISelLowering.cpp | 171 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
173 switch (Op.getOpcode()) {
175 Op.getNode()->dump();
180 case ISD::SDIV: return LowerSDIV(Op, DAG);
181 case ISD::SREM: return LowerSREM(Op, DAG);
182 case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG);
183 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
185 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
186 case ISD::UDIVREM: return LowerUDIVREM(Op, DAG);
188 return Op;
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 54 SDValue LegalizeOp(SDValue Op);
56 SDValue TranslateLegalizeResults(SDValue Op, SDValue Result);
58 SDValue UnrollVSETCC(SDValue Op);
63 SDValue ExpandUINT_TO_FLOAT(SDValue Op);
65 SDValue ExpandSEXTINREG(SDValue Op);
68 SDValue ExpandVSELECT(SDValue Op);
69 SDValue ExpandSELECT(SDValue Op);
70 SDValue ExpandLoad(SDValue Op);
71 SDValue ExpandStore(SDValue Op);
72 SDValue ExpandFNEG(SDValue Op);
[all...] |
| /external/llvm/lib/Target/XCore/InstPrinter/ |
| XCoreInstPrinter.cpp | 73 const MCOperand &Op = MI->getOperand(OpNo);
74 if (Op.isReg()) {
75 printRegName(O, Op.getReg());
79 if (Op.isImm()) {
80 O << Op.getImm();
84 assert(Op.isExpr() && "unknown operand kind in printOperand");
85 printExpr(Op.getExpr(), O);
|
| /external/chromium_org/third_party/skia/src/utils/ |
| SkCanvasStack.h | 29 virtual void addCanvas(SkCanvas*) SK_OVERRIDE { SkASSERT(!"Invalid Op"); }
30 virtual void removeCanvas(SkCanvas*) SK_OVERRIDE { SkASSERT(!"Invalid Op"); }
33 virtual bool clipRect(const SkRect&, SkRegion::Op, bool) SK_OVERRIDE;
34 virtual bool clipRRect(const SkRRect&, SkRegion::Op, bool) SK_OVERRIDE;
35 virtual bool clipPath(const SkPath&, SkRegion::Op, bool) SK_OVERRIDE;
37 SkRegion::Op) SK_OVERRIDE;
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 100 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
103 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
104 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
105 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const;
106 SDValue LowerEH_LABEL(SDValue Op, SelectionDAG &DAG) const;
107 SDValue LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const;
113 SDValue LowerGLOBALADDRESS(SDValue Op, SelectionDAG &DAG) const;
114 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
127 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
128 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/skia/src/utils/ |
| SkCanvasStack.h | 29 virtual void addCanvas(SkCanvas*) SK_OVERRIDE { SkASSERT(!"Invalid Op"); }
30 virtual void removeCanvas(SkCanvas*) SK_OVERRIDE { SkASSERT(!"Invalid Op"); }
33 virtual bool clipRect(const SkRect&, SkRegion::Op, bool) SK_OVERRIDE;
34 virtual bool clipRRect(const SkRRect&, SkRegion::Op, bool) SK_OVERRIDE;
35 virtual bool clipPath(const SkPath&, SkRegion::Op, bool) SK_OVERRIDE;
37 SkRegion::Op) SK_OVERRIDE;
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 563 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
584 virtual bool IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const;
601 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
609 virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op,
632 virtual void LowerAsmOperandForConstraint(SDValue Op,
755 SDValue BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain, SDValue StackSlot,
830 std::pair<SDValue,SDValue> FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG
[all...] |
