| /art/compiler/dex/quick/x86/ |
| utility_x86.cc | 25 LIR* X86Mir2Lir::OpFpRegCopy(int r_dest, int r_src) {
28 DCHECK_EQ(X86_DOUBLEREG(r_dest), X86_DOUBLEREG(r_src));
33 if (X86_SINGLEREG(r_src)) {
39 DCHECK(X86_SINGLEREG(r_src));
44 LIR* res = RawLIR(current_dalvik_offset_, opcode, r_dest, r_src);
45 if (r_dest == r_src) {
269 LIR* X86Mir2Lir::OpRegRegImm(OpKind op, int r_dest, int r_src,
273 return NewLIR3(opcode, r_dest, r_src, value);
275 if (value == 0xFF && r_src < 4) {
276 return NewLIR2(kX86Movzx8RR, r_dest, r_src);
[all...] |
| codegen_x86.h | 41 LIR* StoreBaseDisp(int rBase, int displacement, int r_src, OpSize size);
43 LIR* StoreBaseIndexed(int rBase, int r_index, int r_src, int scale, OpSize size);
45 int r_src, int r_src_hi, OpSize size, int s_reg);
144 LIR* OpFpRegCopy(int r_dest, int r_src);
149 LIR* OpRegCopy(int r_dest, int r_src);
150 LIR* OpRegCopyNoInsert(int r_dest, int r_src);
|
| int_x86.cc | 112 LIR* X86Mir2Lir::OpRegCopyNoInsert(int r_dest, int r_src) {
113 if (X86_FPREG(r_dest) || X86_FPREG(r_src))
114 return OpFpRegCopy(r_dest, r_src);
116 r_dest, r_src);
117 if (r_dest == r_src) {
123 LIR* X86Mir2Lir::OpRegCopy(int r_dest, int r_src) {
124 LIR *res = OpRegCopyNoInsert(r_dest, r_src);
|
| /art/compiler/dex/quick/mips/ |
| utility_mips.cc | 24 LIR* MipsMir2Lir::OpFpRegCopy(int r_dest, int r_src) {
27 DCHECK_EQ(MIPS_DOUBLEREG(r_dest), MIPS_DOUBLEREG(r_src));
32 if (MIPS_SINGLEREG(r_src)) {
36 int t_opnd = r_src;
37 r_src = r_dest;
42 DCHECK(MIPS_SINGLEREG(r_src));
46 LIR* res = RawLIR(current_dalvik_offset_, opcode, r_src, r_dest);
47 if (!(cu_->disable_opt & (1 << kSafeOptimizations)) && r_dest == r_src) {
388 LIR* MipsMir2Lir::StoreBaseIndexed(int rBase, int r_index, int r_src,
395 if (MIPS_FPREG(r_src)) {
[all...] |
| codegen_mips.h | 41 LIR* StoreBaseDisp(int rBase, int displacement, int r_src, OpSize size);
43 LIR* StoreBaseIndexed(int rBase, int r_index, int r_src, int scale, OpSize size);
45 int r_src, int r_src_hi, OpSize size, int s_reg);
144 LIR* OpFpRegCopy(int r_dest, int r_src);
149 LIR* OpRegCopy(int r_dest, int r_src);
150 LIR* OpRegCopyNoInsert(int r_dest, int r_src);
166 LIR* StoreBaseDispBody(int rBase, int displacement, int r_src, int r_src_hi, OpSize size);
|
| int_mips.cc | 164 LIR* MipsMir2Lir::OpRegCopyNoInsert(int r_dest, int r_src) {
165 if (MIPS_FPREG(r_dest) || MIPS_FPREG(r_src))
166 return OpFpRegCopy(r_dest, r_src);
168 r_dest, r_src);
169 if (!(cu_->disable_opt & (1 << kSafeOptimizations)) && r_dest == r_src) {
175 LIR* MipsMir2Lir::OpRegCopy(int r_dest, int r_src) {
176 LIR *res = OpRegCopyNoInsert(r_dest, r_src);
|
| /art/compiler/dex/quick/arm/ |
| utility_arm.cc | 703 LIR* ArmMir2Lir::StoreBaseIndexed(int rBase, int r_index, int r_src,
705 bool all_low_regs = ARM_LOWREG(rBase) && ARM_LOWREG(r_index) && ARM_LOWREG(r_src);
711 if (ARM_FPREG(r_src)) {
712 if (ARM_SINGLEREG(r_src)) {
717 DCHECK(ARM_DOUBLEREG(r_src));
719 DCHECK_EQ((r_src & 0x1), 0);
738 store = NewLIR3(opcode, r_src, reg_ptr, 0);
756 store = NewLIR3(opcode, r_src, rBase, r_index);
758 store = NewLIR4(opcode, r_src, rBase, r_index, scale);
900 int r_src, int r_src_hi, OpSize size)
[all...] |
| codegen_arm.h | 40 LIR* StoreBaseDisp(int rBase, int displacement, int r_src, OpSize size);
42 LIR* StoreBaseIndexed(int rBase, int r_index, int r_src, int scale, OpSize size);
44 int r_src, int r_src_hi, OpSize size, int s_reg);
143 LIR* OpFpRegCopy(int r_dest, int r_src);
148 LIR* OpRegCopy(int r_dest, int r_src);
149 LIR* OpRegCopyNoInsert(int r_dest, int r_src);
166 LIR* StoreBaseDispBody(int rBase, int displacement, int r_src, int r_src_hi, OpSize size);
|
| int_arm.cc | 337 LIR* ArmMir2Lir::OpRegCopyNoInsert(int r_dest, int r_src) {
340 if (ARM_FPREG(r_dest) || ARM_FPREG(r_src))
341 return OpFpRegCopy(r_dest, r_src);
342 if (ARM_LOWREG(r_dest) && ARM_LOWREG(r_src))
344 else if (!ARM_LOWREG(r_dest) && !ARM_LOWREG(r_src))
350 res = RawLIR(current_dalvik_offset_, opcode, r_dest, r_src);
351 if (!(cu_->disable_opt & (1 << kSafeOptimizations)) && r_dest == r_src) {
357 LIR* ArmMir2Lir::OpRegCopy(int r_dest, int r_src) {
358 LIR* res = OpRegCopyNoInsert(r_dest, r_src);
[all...] |
| /external/valgrind/main/VEX/priv/ |
| host_ppc_isel.c | 472 static PPCInstr* mk_iMOVds_RR ( HReg r_dst, HReg r_src )
474 vassert(hregClass(r_dst) == hregClass(r_src));
475 vassert(hregClass(r_src) == HRcInt32 ||
476 hregClass(r_src) == HRcInt64);
477 return PPCInstr_Alu(Palu_OR, r_dst, r_src, PPCRH_Reg(r_src));
548 static HReg mk_LoadR64toFPR ( ISelEnv* env, HReg r_src )
554 vassert(hregClass(r_src) == HRcInt64);
560 addInstr(env, PPCInstr_Store( 8, am_addr0, r_src, env->mode64 ));
1008 HReg r_src; local
1100 HReg r_src; local
1650 HReg r_src = iselWordExpr_R(env, expr32); local
1678 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1687 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1701 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1714 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1727 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1742 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1753 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1779 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1840 HReg r_src, r_dst; local
1855 HReg r_src, r_dst; local
1867 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1877 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
2624 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
2660 HReg r_src = lookupIRTemp(env, e->Iex.RdTmp.tmp); local
3547 HReg r_src = newVRegI(env); local
3654 HReg r_src = iselDblExpr(env, e->Iex.Binop.arg2); local
3749 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
3860 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
4068 HReg r_src = iselDfp64Expr(env, e->Iex.Unop.arg); local
4075 HReg r_src = iselDfp64Expr(env, e->Iex.Unop.arg); local
4348 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
4595 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1); local
4606 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1); local
4617 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1); local
4628 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1); local
4698 HReg r_src = iselWordExpr_R(env, stmt->Ist.Store.data); local
4752 HReg r_src = iselWordExpr_R(env, stmt->Ist.Put.data); local
4807 HReg r_src = iselWordExpr_R(env, puti->data); local
4813 HReg r_src = iselWordExpr_R(env, puti->data); local
4828 HReg r_src = iselWordExpr_R(env, stmt->Ist.WrTmp.data); local
4938 HReg r_src = iselWordExpr_R(env, stmt->Ist.LLSC.storedata); local
[all...] |
| host_mips_isel.c | 308 static MIPSInstr *mk_iMOVds_RR(HReg r_dst, HReg r_src)
310 vassert(hregClass(r_dst) == hregClass(r_src));
311 vassert(hregClass(r_src) == HRcInt32 || hregClass(r_src) == HRcInt64);
312 return MIPSInstr_Alu(Malu_OR, r_dst, r_src, MIPSRH_Reg(r_src));
1086 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1189 HReg r_src, r_dst; local
1201 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1230 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1240 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1274 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1284 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1298 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1311 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1329 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1339 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
1347 HReg r_src; local
2530 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); local
2762 HReg r_src = iselWordExpr_R(env, stmt->Ist.Store.data); local
2795 HReg r_src = iselWordExpr_R(env, stmt->Ist.Put.data); local
2846 HReg r_src = iselWordExpr_R(env, stmt->Ist.WrTmp.data); local
2942 HReg r_src = iselWordExpr_R(env, stmt->Ist.LLSC.storedata); local
[all...] |
| host_mips_defs.c | 2925 UInt r_src = iregNo(i->Min.Unary.src, mode64); local
3102 UInt r_src = iregNo(i->Min.MtHL.src, mode64); local
3108 UInt r_src = iregNo(i->Min.MtHL.src, mode64); local
3126 UInt r_src = iregNo(i->Min.MtFCSR.src, mode64); local
3162 UInt r_src = iregNo(i->Min.Call.src, mode64); local
3414 UInt r_src = iregNo(i->Min.Store.src, mode64); local
3441 UInt r_src = iregNo(i->Min.Store.src, mode64); local
3469 UInt r_src = iregNo(am_addr->Mam.IR.base, mode64); local
3478 UInt r_src = iregNo(i->Min.StoreC.src, mode64); local
[all...] |
| host_ppc_defs.c | 3811 UInt r_src = iregNo(i->Pin.Unary.src, mode64); local
4121 UInt r_dst, r_src; local
4254 UInt r_src = iregNo(i->Pin.Store.src, mode64); local
[all...] |
| guest_x86_toIR.c | 3762 UInt r_src, r_dst; local
[all...] |
| guest_amd64_toIR.c | 5017 UInt r_src, r_dst; local
[all...] |
| /art/compiler/dex/quick/ |
| mir_to_lir.h | 514 LIR* StoreWordDisp(int rBase, int displacement, int r_src);
539 virtual LIR* StoreBaseDisp(int rBase, int displacement, int r_src, OpSize size) = 0;
541 virtual LIR* StoreBaseIndexed(int rBase, int r_index, int r_src, int scale, OpSize size) = 0;
543 int r_src, int r_src_hi, OpSize size, int s_reg) = 0;
[all...] |
| gen_loadstore.cc | 83 LIR* Mir2Lir::StoreWordDisp(int rBase, int displacement, int r_src) {
84 return StoreBaseDisp(rBase, displacement, r_src, kWord);
|
| gen_common.cc | 278 int r_src = AllocTemp(); local
297 OpRegRegImm(kOpAdd, r_src, TargetReg(kSp), SRegOffset(rl_first.s_reg_low));
306 LoadBaseIndexed(r_src, r_idx, r_val, 2, kWord);
[all...] |
| /external/libnl-headers/ |
| netlink-types.h | 298 struct nl_addr *r_src; member in struct:rtnl_rule
|
