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      1 //===-- MachineSink.cpp - Sinking for machine instructions ----------------===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This pass moves instructions into successor blocks when possible, so that
     11 // they aren't executed on paths where their results aren't needed.
     12 //
     13 // This pass is not intended to be a replacement or a complete alternative
     14 // for an LLVM-IR-level sinking pass. It is only designed to sink simple
     15 // constructs that are not exposed before lowering and instruction selection.
     16 //
     17 //===----------------------------------------------------------------------===//
     18 
     19 #define DEBUG_TYPE "machine-sink"
     20 #include "llvm/CodeGen/Passes.h"
     21 #include "llvm/ADT/SmallSet.h"
     22 #include "llvm/ADT/Statistic.h"
     23 #include "llvm/Analysis/AliasAnalysis.h"
     24 #include "llvm/CodeGen/MachineDominators.h"
     25 #include "llvm/CodeGen/MachineLoopInfo.h"
     26 #include "llvm/CodeGen/MachineRegisterInfo.h"
     27 #include "llvm/Support/CommandLine.h"
     28 #include "llvm/Support/Debug.h"
     29 #include "llvm/Support/raw_ostream.h"
     30 #include "llvm/Target/TargetInstrInfo.h"
     31 #include "llvm/Target/TargetMachine.h"
     32 #include "llvm/Target/TargetRegisterInfo.h"
     33 using namespace llvm;
     34 
     35 static cl::opt<bool>
     36 SplitEdges("machine-sink-split",
     37            cl::desc("Split critical edges during machine sinking"),
     38            cl::init(true), cl::Hidden);
     39 
     40 STATISTIC(NumSunk,      "Number of machine instructions sunk");
     41 STATISTIC(NumSplit,     "Number of critical edges split");
     42 STATISTIC(NumCoalesces, "Number of copies coalesced");
     43 
     44 namespace {
     45   class MachineSinking : public MachineFunctionPass {
     46     const TargetInstrInfo *TII;
     47     const TargetRegisterInfo *TRI;
     48     MachineRegisterInfo  *MRI;  // Machine register information
     49     MachineDominatorTree *DT;   // Machine dominator tree
     50     MachineLoopInfo *LI;
     51     AliasAnalysis *AA;
     52 
     53     // Remember which edges have been considered for breaking.
     54     SmallSet<std::pair<MachineBasicBlock*,MachineBasicBlock*>, 8>
     55     CEBCandidates;
     56 
     57   public:
     58     static char ID; // Pass identification
     59     MachineSinking() : MachineFunctionPass(ID) {
     60       initializeMachineSinkingPass(*PassRegistry::getPassRegistry());
     61     }
     62 
     63     virtual bool runOnMachineFunction(MachineFunction &MF);
     64 
     65     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
     66       AU.setPreservesCFG();
     67       MachineFunctionPass::getAnalysisUsage(AU);
     68       AU.addRequired<AliasAnalysis>();
     69       AU.addRequired<MachineDominatorTree>();
     70       AU.addRequired<MachineLoopInfo>();
     71       AU.addPreserved<MachineDominatorTree>();
     72       AU.addPreserved<MachineLoopInfo>();
     73     }
     74 
     75     virtual void releaseMemory() {
     76       CEBCandidates.clear();
     77     }
     78 
     79   private:
     80     bool ProcessBlock(MachineBasicBlock &MBB);
     81     bool isWorthBreakingCriticalEdge(MachineInstr *MI,
     82                                      MachineBasicBlock *From,
     83                                      MachineBasicBlock *To);
     84     MachineBasicBlock *SplitCriticalEdge(MachineInstr *MI,
     85                                          MachineBasicBlock *From,
     86                                          MachineBasicBlock *To,
     87                                          bool BreakPHIEdge);
     88     bool SinkInstruction(MachineInstr *MI, bool &SawStore);
     89     bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB,
     90                                  MachineBasicBlock *DefMBB,
     91                                  bool &BreakPHIEdge, bool &LocalUse) const;
     92     MachineBasicBlock *FindSuccToSinkTo(MachineInstr *MI, MachineBasicBlock *MBB,
     93                bool &BreakPHIEdge);
     94     bool isProfitableToSinkTo(unsigned Reg, MachineInstr *MI,
     95                               MachineBasicBlock *MBB,
     96                               MachineBasicBlock *SuccToSinkTo);
     97 
     98     bool PerformTrivialForwardCoalescing(MachineInstr *MI,
     99                                          MachineBasicBlock *MBB);
    100   };
    101 
    102   // SuccessorSorter - Sort Successors according to their loop depth.
    103   struct SuccessorSorter {
    104     SuccessorSorter(MachineLoopInfo *LoopInfo) : LI(LoopInfo) {}
    105     bool operator()(const MachineBasicBlock *LHS,
    106                     const MachineBasicBlock *RHS) const {
    107       return LI->getLoopDepth(LHS) < LI->getLoopDepth(RHS);
    108     }
    109     MachineLoopInfo *LI;
    110   };
    111 } // end anonymous namespace
    112 
    113 char MachineSinking::ID = 0;
    114 char &llvm::MachineSinkingID = MachineSinking::ID;
    115 INITIALIZE_PASS_BEGIN(MachineSinking, "machine-sink",
    116                 "Machine code sinking", false, false)
    117 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
    118 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
    119 INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
    120 INITIALIZE_PASS_END(MachineSinking, "machine-sink",
    121                 "Machine code sinking", false, false)
    122 
    123 bool MachineSinking::PerformTrivialForwardCoalescing(MachineInstr *MI,
    124                                                      MachineBasicBlock *MBB) {
    125   if (!MI->isCopy())
    126     return false;
    127 
    128   unsigned SrcReg = MI->getOperand(1).getReg();
    129   unsigned DstReg = MI->getOperand(0).getReg();
    130   if (!TargetRegisterInfo::isVirtualRegister(SrcReg) ||
    131       !TargetRegisterInfo::isVirtualRegister(DstReg) ||
    132       !MRI->hasOneNonDBGUse(SrcReg))
    133     return false;
    134 
    135   const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg);
    136   const TargetRegisterClass *DRC = MRI->getRegClass(DstReg);
    137   if (SRC != DRC)
    138     return false;
    139 
    140   MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
    141   if (DefMI->isCopyLike())
    142     return false;
    143   DEBUG(dbgs() << "Coalescing: " << *DefMI);
    144   DEBUG(dbgs() << "*** to: " << *MI);
    145   MRI->replaceRegWith(DstReg, SrcReg);
    146   MI->eraseFromParent();
    147   ++NumCoalesces;
    148   return true;
    149 }
    150 
    151 /// AllUsesDominatedByBlock - Return true if all uses of the specified register
    152 /// occur in blocks dominated by the specified block. If any use is in the
    153 /// definition block, then return false since it is never legal to move def
    154 /// after uses.
    155 bool
    156 MachineSinking::AllUsesDominatedByBlock(unsigned Reg,
    157                                         MachineBasicBlock *MBB,
    158                                         MachineBasicBlock *DefMBB,
    159                                         bool &BreakPHIEdge,
    160                                         bool &LocalUse) const {
    161   assert(TargetRegisterInfo::isVirtualRegister(Reg) &&
    162          "Only makes sense for vregs");
    163 
    164   // Ignore debug uses because debug info doesn't affect the code.
    165   if (MRI->use_nodbg_empty(Reg))
    166     return true;
    167 
    168   // BreakPHIEdge is true if all the uses are in the successor MBB being sunken
    169   // into and they are all PHI nodes. In this case, machine-sink must break
    170   // the critical edge first. e.g.
    171   //
    172   // BB#1: derived from LLVM BB %bb4.preheader
    173   //   Predecessors according to CFG: BB#0
    174   //     ...
    175   //     %reg16385<def> = DEC64_32r %reg16437, %EFLAGS<imp-def,dead>
    176   //     ...
    177   //     JE_4 <BB#37>, %EFLAGS<imp-use>
    178   //   Successors according to CFG: BB#37 BB#2
    179   //
    180   // BB#2: derived from LLVM BB %bb.nph
    181   //   Predecessors according to CFG: BB#0 BB#1
    182   //     %reg16386<def> = PHI %reg16434, <BB#0>, %reg16385, <BB#1>
    183   BreakPHIEdge = true;
    184   for (MachineRegisterInfo::use_nodbg_iterator
    185          I = MRI->use_nodbg_begin(Reg), E = MRI->use_nodbg_end();
    186        I != E; ++I) {
    187     MachineInstr *UseInst = &*I;
    188     MachineBasicBlock *UseBlock = UseInst->getParent();
    189     if (!(UseBlock == MBB && UseInst->isPHI() &&
    190           UseInst->getOperand(I.getOperandNo()+1).getMBB() == DefMBB)) {
    191       BreakPHIEdge = false;
    192       break;
    193     }
    194   }
    195   if (BreakPHIEdge)
    196     return true;
    197 
    198   for (MachineRegisterInfo::use_nodbg_iterator
    199          I = MRI->use_nodbg_begin(Reg), E = MRI->use_nodbg_end();
    200        I != E; ++I) {
    201     // Determine the block of the use.
    202     MachineInstr *UseInst = &*I;
    203     MachineBasicBlock *UseBlock = UseInst->getParent();
    204     if (UseInst->isPHI()) {
    205       // PHI nodes use the operand in the predecessor block, not the block with
    206       // the PHI.
    207       UseBlock = UseInst->getOperand(I.getOperandNo()+1).getMBB();
    208     } else if (UseBlock == DefMBB) {
    209       LocalUse = true;
    210       return false;
    211     }
    212 
    213     // Check that it dominates.
    214     if (!DT->dominates(MBB, UseBlock))
    215       return false;
    216   }
    217 
    218   return true;
    219 }
    220 
    221 bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
    222   DEBUG(dbgs() << "******** Machine Sinking ********\n");
    223 
    224   const TargetMachine &TM = MF.getTarget();
    225   TII = TM.getInstrInfo();
    226   TRI = TM.getRegisterInfo();
    227   MRI = &MF.getRegInfo();
    228   DT = &getAnalysis<MachineDominatorTree>();
    229   LI = &getAnalysis<MachineLoopInfo>();
    230   AA = &getAnalysis<AliasAnalysis>();
    231 
    232   bool EverMadeChange = false;
    233 
    234   while (1) {
    235     bool MadeChange = false;
    236 
    237     // Process all basic blocks.
    238     CEBCandidates.clear();
    239     for (MachineFunction::iterator I = MF.begin(), E = MF.end();
    240          I != E; ++I)
    241       MadeChange |= ProcessBlock(*I);
    242 
    243     // If this iteration over the code changed anything, keep iterating.
    244     if (!MadeChange) break;
    245     EverMadeChange = true;
    246   }
    247   return EverMadeChange;
    248 }
    249 
    250 bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
    251   // Can't sink anything out of a block that has less than two successors.
    252   if (MBB.succ_size() <= 1 || MBB.empty()) return false;
    253 
    254   // Don't bother sinking code out of unreachable blocks. In addition to being
    255   // unprofitable, it can also lead to infinite looping, because in an
    256   // unreachable loop there may be nowhere to stop.
    257   if (!DT->isReachableFromEntry(&MBB)) return false;
    258 
    259   bool MadeChange = false;
    260 
    261   // Walk the basic block bottom-up.  Remember if we saw a store.
    262   MachineBasicBlock::iterator I = MBB.end();
    263   --I;
    264   bool ProcessedBegin, SawStore = false;
    265   do {
    266     MachineInstr *MI = I;  // The instruction to sink.
    267 
    268     // Predecrement I (if it's not begin) so that it isn't invalidated by
    269     // sinking.
    270     ProcessedBegin = I == MBB.begin();
    271     if (!ProcessedBegin)
    272       --I;
    273 
    274     if (MI->isDebugValue())
    275       continue;
    276 
    277     bool Joined = PerformTrivialForwardCoalescing(MI, &MBB);
    278     if (Joined) {
    279       MadeChange = true;
    280       continue;
    281     }
    282 
    283     if (SinkInstruction(MI, SawStore))
    284       ++NumSunk, MadeChange = true;
    285 
    286     // If we just processed the first instruction in the block, we're done.
    287   } while (!ProcessedBegin);
    288 
    289   return MadeChange;
    290 }
    291 
    292 bool MachineSinking::isWorthBreakingCriticalEdge(MachineInstr *MI,
    293                                                  MachineBasicBlock *From,
    294                                                  MachineBasicBlock *To) {
    295   // FIXME: Need much better heuristics.
    296 
    297   // If the pass has already considered breaking this edge (during this pass
    298   // through the function), then let's go ahead and break it. This means
    299   // sinking multiple "cheap" instructions into the same block.
    300   if (!CEBCandidates.insert(std::make_pair(From, To)))
    301     return true;
    302 
    303   if (!MI->isCopy() && !MI->isAsCheapAsAMove())
    304     return true;
    305 
    306   // MI is cheap, we probably don't want to break the critical edge for it.
    307   // However, if this would allow some definitions of its source operands
    308   // to be sunk then it's probably worth it.
    309   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
    310     const MachineOperand &MO = MI->getOperand(i);
    311     if (!MO.isReg()) continue;
    312     unsigned Reg = MO.getReg();
    313     if (Reg == 0 || !TargetRegisterInfo::isPhysicalRegister(Reg))
    314       continue;
    315     if (MRI->hasOneNonDBGUse(Reg))
    316       return true;
    317   }
    318 
    319   return false;
    320 }
    321 
    322 MachineBasicBlock *MachineSinking::SplitCriticalEdge(MachineInstr *MI,
    323                                                      MachineBasicBlock *FromBB,
    324                                                      MachineBasicBlock *ToBB,
    325                                                      bool BreakPHIEdge) {
    326   if (!isWorthBreakingCriticalEdge(MI, FromBB, ToBB))
    327     return 0;
    328 
    329   // Avoid breaking back edge. From == To means backedge for single BB loop.
    330   if (!SplitEdges || FromBB == ToBB)
    331     return 0;
    332 
    333   // Check for backedges of more "complex" loops.
    334   if (LI->getLoopFor(FromBB) == LI->getLoopFor(ToBB) &&
    335       LI->isLoopHeader(ToBB))
    336     return 0;
    337 
    338   // It's not always legal to break critical edges and sink the computation
    339   // to the edge.
    340   //
    341   // BB#1:
    342   // v1024
    343   // Beq BB#3
    344   // <fallthrough>
    345   // BB#2:
    346   // ... no uses of v1024
    347   // <fallthrough>
    348   // BB#3:
    349   // ...
    350   //       = v1024
    351   //
    352   // If BB#1 -> BB#3 edge is broken and computation of v1024 is inserted:
    353   //
    354   // BB#1:
    355   // ...
    356   // Bne BB#2
    357   // BB#4:
    358   // v1024 =
    359   // B BB#3
    360   // BB#2:
    361   // ... no uses of v1024
    362   // <fallthrough>
    363   // BB#3:
    364   // ...
    365   //       = v1024
    366   //
    367   // This is incorrect since v1024 is not computed along the BB#1->BB#2->BB#3
    368   // flow. We need to ensure the new basic block where the computation is
    369   // sunk to dominates all the uses.
    370   // It's only legal to break critical edge and sink the computation to the
    371   // new block if all the predecessors of "To", except for "From", are
    372   // not dominated by "From". Given SSA property, this means these
    373   // predecessors are dominated by "To".
    374   //
    375   // There is no need to do this check if all the uses are PHI nodes. PHI
    376   // sources are only defined on the specific predecessor edges.
    377   if (!BreakPHIEdge) {
    378     for (MachineBasicBlock::pred_iterator PI = ToBB->pred_begin(),
    379            E = ToBB->pred_end(); PI != E; ++PI) {
    380       if (*PI == FromBB)
    381         continue;
    382       if (!DT->dominates(ToBB, *PI))
    383         return 0;
    384     }
    385   }
    386 
    387   return FromBB->SplitCriticalEdge(ToBB, this);
    388 }
    389 
    390 static bool AvoidsSinking(MachineInstr *MI, MachineRegisterInfo *MRI) {
    391   return MI->isInsertSubreg() || MI->isSubregToReg() || MI->isRegSequence();
    392 }
    393 
    394 /// collectDebgValues - Scan instructions following MI and collect any
    395 /// matching DBG_VALUEs.
    396 static void collectDebugValues(MachineInstr *MI,
    397                                SmallVectorImpl<MachineInstr *> &DbgValues) {
    398   DbgValues.clear();
    399   if (!MI->getOperand(0).isReg())
    400     return;
    401 
    402   MachineBasicBlock::iterator DI = MI; ++DI;
    403   for (MachineBasicBlock::iterator DE = MI->getParent()->end();
    404        DI != DE; ++DI) {
    405     if (!DI->isDebugValue())
    406       return;
    407     if (DI->getOperand(0).isReg() &&
    408         DI->getOperand(0).getReg() == MI->getOperand(0).getReg())
    409       DbgValues.push_back(DI);
    410   }
    411 }
    412 
    413 /// isPostDominatedBy - Return true if A is post dominated by B.
    414 static bool isPostDominatedBy(MachineBasicBlock *A, MachineBasicBlock *B) {
    415 
    416   // FIXME - Use real post dominator.
    417   if (A->succ_size() != 2)
    418     return false;
    419   MachineBasicBlock::succ_iterator I = A->succ_begin();
    420   if (B == *I)
    421     ++I;
    422   MachineBasicBlock *OtherSuccBlock = *I;
    423   if (OtherSuccBlock->succ_size() != 1 ||
    424       *(OtherSuccBlock->succ_begin()) != B)
    425     return false;
    426 
    427   return true;
    428 }
    429 
    430 /// isProfitableToSinkTo - Return true if it is profitable to sink MI.
    431 bool MachineSinking::isProfitableToSinkTo(unsigned Reg, MachineInstr *MI,
    432                                           MachineBasicBlock *MBB,
    433                                           MachineBasicBlock *SuccToSinkTo) {
    434   assert (MI && "Invalid MachineInstr!");
    435   assert (SuccToSinkTo && "Invalid SinkTo Candidate BB");
    436 
    437   if (MBB == SuccToSinkTo)
    438     return false;
    439 
    440   // It is profitable if SuccToSinkTo does not post dominate current block.
    441   if (!isPostDominatedBy(MBB, SuccToSinkTo))
    442       return true;
    443 
    444   // Check if only use in post dominated block is PHI instruction.
    445   bool NonPHIUse = false;
    446   for (MachineRegisterInfo::use_nodbg_iterator
    447          I = MRI->use_nodbg_begin(Reg), E = MRI->use_nodbg_end();
    448        I != E; ++I) {
    449     MachineInstr *UseInst = &*I;
    450     MachineBasicBlock *UseBlock = UseInst->getParent();
    451     if (UseBlock == SuccToSinkTo && !UseInst->isPHI())
    452       NonPHIUse = true;
    453   }
    454   if (!NonPHIUse)
    455     return true;
    456 
    457   // If SuccToSinkTo post dominates then also it may be profitable if MI
    458   // can further profitably sinked into another block in next round.
    459   bool BreakPHIEdge = false;
    460   // FIXME - If finding successor is compile time expensive then catch results.
    461   if (MachineBasicBlock *MBB2 = FindSuccToSinkTo(MI, SuccToSinkTo, BreakPHIEdge))
    462     return isProfitableToSinkTo(Reg, MI, SuccToSinkTo, MBB2);
    463 
    464   // If SuccToSinkTo is final destination and it is a post dominator of current
    465   // block then it is not profitable to sink MI into SuccToSinkTo block.
    466   return false;
    467 }
    468 
    469 /// FindSuccToSinkTo - Find a successor to sink this instruction to.
    470 MachineBasicBlock *MachineSinking::FindSuccToSinkTo(MachineInstr *MI,
    471                                    MachineBasicBlock *MBB,
    472                                    bool &BreakPHIEdge) {
    473 
    474   assert (MI && "Invalid MachineInstr!");
    475   assert (MBB && "Invalid MachineBasicBlock!");
    476 
    477   // Loop over all the operands of the specified instruction.  If there is
    478   // anything we can't handle, bail out.
    479 
    480   // SuccToSinkTo - This is the successor to sink this instruction to, once we
    481   // decide.
    482   MachineBasicBlock *SuccToSinkTo = 0;
    483   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
    484     const MachineOperand &MO = MI->getOperand(i);
    485     if (!MO.isReg()) continue;  // Ignore non-register operands.
    486 
    487     unsigned Reg = MO.getReg();
    488     if (Reg == 0) continue;
    489 
    490     if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
    491       if (MO.isUse()) {
    492         // If the physreg has no defs anywhere, it's just an ambient register
    493         // and we can freely move its uses. Alternatively, if it's allocatable,
    494         // it could get allocated to something with a def during allocation.
    495         if (!MRI->isConstantPhysReg(Reg, *MBB->getParent()))
    496           return NULL;
    497       } else if (!MO.isDead()) {
    498         // A def that isn't dead. We can't move it.
    499         return NULL;
    500       }
    501     } else {
    502       // Virtual register uses are always safe to sink.
    503       if (MO.isUse()) continue;
    504 
    505       // If it's not safe to move defs of the register class, then abort.
    506       if (!TII->isSafeToMoveRegClassDefs(MRI->getRegClass(Reg)))
    507         return NULL;
    508 
    509       // FIXME: This picks a successor to sink into based on having one
    510       // successor that dominates all the uses.  However, there are cases where
    511       // sinking can happen but where the sink point isn't a successor.  For
    512       // example:
    513       //
    514       //   x = computation
    515       //   if () {} else {}
    516       //   use x
    517       //
    518       // the instruction could be sunk over the whole diamond for the
    519       // if/then/else (or loop, etc), allowing it to be sunk into other blocks
    520       // after that.
    521 
    522       // Virtual register defs can only be sunk if all their uses are in blocks
    523       // dominated by one of the successors.
    524       if (SuccToSinkTo) {
    525         // If a previous operand picked a block to sink to, then this operand
    526         // must be sinkable to the same block.
    527         bool LocalUse = false;
    528         if (!AllUsesDominatedByBlock(Reg, SuccToSinkTo, MBB,
    529                                      BreakPHIEdge, LocalUse))
    530           return NULL;
    531 
    532         continue;
    533       }
    534 
    535       // Otherwise, we should look at all the successors and decide which one
    536       // we should sink to.
    537       // We give successors with smaller loop depth higher priority.
    538       SmallVector<MachineBasicBlock*, 4> Succs(MBB->succ_begin(), MBB->succ_end());
    539       std::stable_sort(Succs.begin(), Succs.end(), SuccessorSorter(LI));
    540       for (SmallVectorImpl<MachineBasicBlock *>::iterator SI = Succs.begin(),
    541              E = Succs.end(); SI != E; ++SI) {
    542         MachineBasicBlock *SuccBlock = *SI;
    543         bool LocalUse = false;
    544         if (AllUsesDominatedByBlock(Reg, SuccBlock, MBB,
    545                                     BreakPHIEdge, LocalUse)) {
    546           SuccToSinkTo = SuccBlock;
    547           break;
    548         }
    549         if (LocalUse)
    550           // Def is used locally, it's never safe to move this def.
    551           return NULL;
    552       }
    553 
    554       // If we couldn't find a block to sink to, ignore this instruction.
    555       if (SuccToSinkTo == 0)
    556         return NULL;
    557       else if (!isProfitableToSinkTo(Reg, MI, MBB, SuccToSinkTo))
    558         return NULL;
    559     }
    560   }
    561 
    562   // It is not possible to sink an instruction into its own block.  This can
    563   // happen with loops.
    564   if (MBB == SuccToSinkTo)
    565     return NULL;
    566 
    567   // It's not safe to sink instructions to EH landing pad. Control flow into
    568   // landing pad is implicitly defined.
    569   if (SuccToSinkTo && SuccToSinkTo->isLandingPad())
    570     return NULL;
    571 
    572   return SuccToSinkTo;
    573 }
    574 
    575 /// SinkInstruction - Determine whether it is safe to sink the specified machine
    576 /// instruction out of its current block into a successor.
    577 bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
    578   // Don't sink insert_subreg, subreg_to_reg, reg_sequence. These are meant to
    579   // be close to the source to make it easier to coalesce.
    580   if (AvoidsSinking(MI, MRI))
    581     return false;
    582 
    583   // Check if it's safe to move the instruction.
    584   if (!MI->isSafeToMove(TII, AA, SawStore))
    585     return false;
    586 
    587   // FIXME: This should include support for sinking instructions within the
    588   // block they are currently in to shorten the live ranges.  We often get
    589   // instructions sunk into the top of a large block, but it would be better to
    590   // also sink them down before their first use in the block.  This xform has to
    591   // be careful not to *increase* register pressure though, e.g. sinking
    592   // "x = y + z" down if it kills y and z would increase the live ranges of y
    593   // and z and only shrink the live range of x.
    594 
    595   bool BreakPHIEdge = false;
    596   MachineBasicBlock *ParentBlock = MI->getParent();
    597   MachineBasicBlock *SuccToSinkTo = FindSuccToSinkTo(MI, ParentBlock, BreakPHIEdge);
    598 
    599   // If there are no outputs, it must have side-effects.
    600   if (SuccToSinkTo == 0)
    601     return false;
    602 
    603 
    604   // If the instruction to move defines a dead physical register which is live
    605   // when leaving the basic block, don't move it because it could turn into a
    606   // "zombie" define of that preg. E.g., EFLAGS. (<rdar://problem/8030636>)
    607   for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) {
    608     const MachineOperand &MO = MI->getOperand(I);
    609     if (!MO.isReg()) continue;
    610     unsigned Reg = MO.getReg();
    611     if (Reg == 0 || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
    612     if (SuccToSinkTo->isLiveIn(Reg))
    613       return false;
    614   }
    615 
    616   DEBUG(dbgs() << "Sink instr " << *MI << "\tinto block " << *SuccToSinkTo);
    617 
    618   // If the block has multiple predecessors, this would introduce computation on
    619   // a path that it doesn't already exist.  We could split the critical edge,
    620   // but for now we just punt.
    621   if (SuccToSinkTo->pred_size() > 1) {
    622     // We cannot sink a load across a critical edge - there may be stores in
    623     // other code paths.
    624     bool TryBreak = false;
    625     bool store = true;
    626     if (!MI->isSafeToMove(TII, AA, store)) {
    627       DEBUG(dbgs() << " *** NOTE: Won't sink load along critical edge.\n");
    628       TryBreak = true;
    629     }
    630 
    631     // We don't want to sink across a critical edge if we don't dominate the
    632     // successor. We could be introducing calculations to new code paths.
    633     if (!TryBreak && !DT->dominates(ParentBlock, SuccToSinkTo)) {
    634       DEBUG(dbgs() << " *** NOTE: Critical edge found\n");
    635       TryBreak = true;
    636     }
    637 
    638     // Don't sink instructions into a loop.
    639     if (!TryBreak && LI->isLoopHeader(SuccToSinkTo)) {
    640       DEBUG(dbgs() << " *** NOTE: Loop header found\n");
    641       TryBreak = true;
    642     }
    643 
    644     // Otherwise we are OK with sinking along a critical edge.
    645     if (!TryBreak)
    646       DEBUG(dbgs() << "Sinking along critical edge.\n");
    647     else {
    648       MachineBasicBlock *NewSucc =
    649         SplitCriticalEdge(MI, ParentBlock, SuccToSinkTo, BreakPHIEdge);
    650       if (!NewSucc) {
    651         DEBUG(dbgs() << " *** PUNTING: Not legal or profitable to "
    652                         "break critical edge\n");
    653         return false;
    654       } else {
    655         DEBUG(dbgs() << " *** Splitting critical edge:"
    656               " BB#" << ParentBlock->getNumber()
    657               << " -- BB#" << NewSucc->getNumber()
    658               << " -- BB#" << SuccToSinkTo->getNumber() << '\n');
    659         SuccToSinkTo = NewSucc;
    660         ++NumSplit;
    661         BreakPHIEdge = false;
    662       }
    663     }
    664   }
    665 
    666   if (BreakPHIEdge) {
    667     // BreakPHIEdge is true if all the uses are in the successor MBB being
    668     // sunken into and they are all PHI nodes. In this case, machine-sink must
    669     // break the critical edge first.
    670     MachineBasicBlock *NewSucc = SplitCriticalEdge(MI, ParentBlock,
    671                                                    SuccToSinkTo, BreakPHIEdge);
    672     if (!NewSucc) {
    673       DEBUG(dbgs() << " *** PUNTING: Not legal or profitable to "
    674             "break critical edge\n");
    675       return false;
    676     }
    677 
    678     DEBUG(dbgs() << " *** Splitting critical edge:"
    679           " BB#" << ParentBlock->getNumber()
    680           << " -- BB#" << NewSucc->getNumber()
    681           << " -- BB#" << SuccToSinkTo->getNumber() << '\n');
    682     SuccToSinkTo = NewSucc;
    683     ++NumSplit;
    684   }
    685 
    686   // Determine where to insert into. Skip phi nodes.
    687   MachineBasicBlock::iterator InsertPos = SuccToSinkTo->begin();
    688   while (InsertPos != SuccToSinkTo->end() && InsertPos->isPHI())
    689     ++InsertPos;
    690 
    691   // collect matching debug values.
    692   SmallVector<MachineInstr *, 2> DbgValuesToSink;
    693   collectDebugValues(MI, DbgValuesToSink);
    694 
    695   // Move the instruction.
    696   SuccToSinkTo->splice(InsertPos, ParentBlock, MI,
    697                        ++MachineBasicBlock::iterator(MI));
    698 
    699   // Move debug values.
    700   for (SmallVectorImpl<MachineInstr *>::iterator DBI = DbgValuesToSink.begin(),
    701          DBE = DbgValuesToSink.end(); DBI != DBE; ++DBI) {
    702     MachineInstr *DbgMI = *DBI;
    703     SuccToSinkTo->splice(InsertPos, ParentBlock,  DbgMI,
    704                          ++MachineBasicBlock::iterator(DbgMI));
    705   }
    706 
    707   // Conservatively, clear any kill flags, since it's possible that they are no
    708   // longer correct.
    709   MI->clearKillInfo();
    710 
    711   return true;
    712 }
    713