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  /prebuilts/gcc/darwin-x86/mips/mips64el-linux-android-4.9/lib/gcc/mips64el-linux-android/4.9/include/
msa.h 35 typedef short v8i16 __attribute__((vector_size(16), aligned(16))); typedef
55 extern v8i16 __builtin_msa_sll_h(v8i16, v8i16);
63 extern v8i16 __builtin_msa_slli_h(v8i16, unsigned char);
71 extern v8i16 __builtin_msa_sra_h(v8i16, v8i16);
79 extern v8i16 __builtin_msa_srai_h(v8i16, unsigned char)
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  /prebuilts/gcc/linux-x86/mips/mips64el-linux-android-4.9/lib/gcc/mips64el-linux-android/4.9/include/
msa.h 35 typedef short v8i16 __attribute__((vector_size(16), aligned(16))); typedef
55 extern v8i16 __builtin_msa_sll_h(v8i16, v8i16);
63 extern v8i16 __builtin_msa_slli_h(v8i16, unsigned char);
71 extern v8i16 __builtin_msa_sra_h(v8i16, v8i16);
79 extern v8i16 __builtin_msa_srai_h(v8i16, unsigned char)
    [all...]
  /external/clang/test/CodeGen/
ppc64-vector.c 7 typedef short v8i16 __attribute__((vector_size (16))); typedef
37 v8i16 test_v8i16(v8i16 x)
builtins-mips-msa.c 6 typedef signed short v8i16 __attribute__ ((vector_size(16))); typedef
21 v8i16 v8i16_a = (v8i16) {0, 1, 2, 3, 4, 5, 6, 7};
22 v8i16 v8i16_b = (v8i16) {1, 2, 3, 4, 5, 6, 7, 8};
23 v8i16 v8i16_r;
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  /external/llvm/lib/Target/X86/
X86TargetTransformInfo.cpp 260 { ISD::SHL, MVT::v8i16, 1 }, // psllw.
265 { ISD::SRL, MVT::v8i16, 1 }, // psrlw.
270 { ISD::SRA, MVT::v8i16, 1 }, // psraw.
273 { ISD::SDIV, MVT::v8i16, 6 }, // pmulhw sequence
274 { ISD::UDIV, MVT::v8i16, 6 }, // pmulhuw sequence
293 if ((VT == MVT::v8i16 && ST->hasSSE2()) ||
315 { ISD::SHL, MVT::v8i16, 8*10 }, // Scalarized.
321 { ISD::SRL, MVT::v8i16, 8*10 }, // Scalarized.
326 { ISD::SRA, MVT::v8i16, 8*10 }, // Scalarized.
337 { ISD::SDIV, MVT::v8i16, 8*20 }
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X86ISelLowering.cpp     [all...]
X86FastISel.cpp 468 case MVT::v8i16:
    [all...]
  /external/llvm/include/llvm/CodeGen/
MachineValueType.h 75 v8i16 = 29, // 8 x i16 enumerator in enum:llvm::MVT::SimpleValueType
211 return (SimpleTy == MVT::v16i8 || SimpleTy == MVT::v8i16 ||
284 case v8i16:
329 case v8i16:
410 case v8i16:
530 if (NumElements == 8) return MVT::v8i16;
  /external/llvm/lib/Target/ARM/
ARMTargetTransformInfo.cpp 229 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 },
230 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 },
254 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 },
255 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 },
283 { ISD::FP_TO_SINT, MVT::v8i16, MVT::v8f32, 4 },
284 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 },
461 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 2},
486 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 16},
539 { ISD::SDIV, MVT::v8i16, 8 * FunctionCallDivCost},
540 { ISD::UDIV, MVT::v8i16, 8 * FunctionCallDivCost}
    [all...]
ARMISelDAGToDAG.cpp     [all...]
ARMISelLowering.cpp 434 addQRTypeForNEON(MVT::v8i16);
513 setOperationAction(ISD::MUL, MVT::v8i16, Custom);
541 setOperationAction(ISD::CTPOP, MVT::v8i16, Custom);
    [all...]
  /external/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp 461 case MVT::v8i16:
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AArch64ISelLowering.cpp 101 addRegisterClass(MVT::v8i16, &AArch64::FPR16RegClass);
113 addQRTypeForNEON(MVT::v8i16);
612 } else if (VT == MVT::v4i16 || VT == MVT::v8i16) {
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  /external/llvm/lib/IR/
ValueTypes.cpp 147 case MVT::v8i16: return "v8i16";
215 case MVT::v8i16: return VectorType::get(Type::getInt16Ty(Context), 8);
  /external/llvm/lib/Target/X86/InstPrinter/
X86InstComments.cpp 120 DecodePSHUFHWMask(MVT::v8i16,
142 DecodePSHUFLWMask(MVT::v8i16,
183 DecodeUNPCKHMask(MVT::v8i16, ShuffleMask);
256 DecodeUNPCKLMask(MVT::v8i16, ShuffleMask);
  /external/llvm/lib/Target/Mips/
MipsSEInstrInfo.cpp 213 else if (RC->hasType(MVT::v8i16) || RC->hasType(MVT::v8f16))
254 else if (RC->hasType(MVT::v8i16) || RC->hasType(MVT::v8f16))
MipsSEISelDAGToDAG.cpp 833 ViaVecTy = MVT::v8i16;
MipsSEISelLowering.cpp 90 addMSAIntType(MVT::v8i16, &Mips::MSA128HRegClass);
    [all...]
MipsISelLowering.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp 652 // only support the altivec types (v16i8, v8i16, v4i32, and v4f32).
662 else if (VecVT == MVT::v8i16)
678 else if (VecVT == MVT::v8i16)
693 else if (VecVT == MVT::v8i16)
726 // types (v16i8, v8i16, v4i32, and v4f32).
731 case MVT::v8i16:
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PPCISelLowering.cpp 503 addRegisterClass(MVT::v8i16, &PPC::VRRCRegClass);
515 setOperationAction(ISD::MUL, MVT::v8i16, Custom);
522 setOperationAction(ISD::BUILD_VECTOR, MVT::v8i16, Custom);
556 setOperationAction(ISD::VSELECT, MVT::v8i16, Legal);
    [all...]
  /external/llvm/utils/TableGen/
CodeGenTarget.cpp 88 case MVT::v8i16: return "MVT::v8i16";
  /external/llvm/lib/Target/R600/
SIISelLowering.cpp 145 setLoadExtAction(ISD::SEXTLOAD, MVT::v8i16, Expand);
163 setTruncStoreAction(MVT::v8i32, MVT::v8i16, Expand);
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