| /external/llvm/lib/Target/AArch64/ |
| AArch64AsmPrinter.cpp | 96 const TargetRegisterClass *RC, bool isVector,
252 const TargetRegisterClass *RC,
299 const TargetRegisterClass *RC;
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.h | 35 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
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| /external/llvm/lib/CodeGen/ |
| CalcSpillWeights.cpp | 64 const TargetRegisterClass *rc = mri.getRegClass(reg);
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| ExecutionDepsFix.cpp | 131 const TargetRegisterClass *const RC;
156 ExeDepsFix(const TargetRegisterClass *rc)
727 for (TargetRegisterClass::const_iterator I = RC->begin(), E = RC->end();
795 llvm::createExecutionDependencyFixPass(const TargetRegisterClass *RC) {
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| Spiller.cpp | 88 const TargetRegisterClass *trc = mri->getRegClass(li->reg);
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| PeepholeOptimizer.cpp | 279 const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg);
377 const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
453 const TargetRegisterClass *DefRC,
455 const TargetRegisterClass *SrcRC,
543 const TargetRegisterClass *DefRC = MRI->getRegClass(Def);
569 const TargetRegisterClass *SrcRC = MRI->getRegClass(Src);
[all...] |
| TargetInstrInfo.cpp | 41 const TargetRegisterClass*
284 bool TargetInstrInfo::getStackSlotRange(const TargetRegisterClass *RC,
341 static const TargetRegisterClass *canFoldCopy(const MachineInstr *MI,
361 const TargetRegisterClass *RC = MRI.getRegClass(FoldReg);
421 const TargetRegisterClass *RC =
495 const TargetRegisterClass *RC = canFoldCopy(MI, Ops[0]);
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| MachineInstr.cpp | [all...] |
| RegAllocFast.cpp | 168 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
202 int RAFast::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
288 const TargetRegisterClass *RC = MRI->getRegClass(LRI->VirtReg);
516 const TargetRegisterClass *RC = MRI->getRegClass(VirtReg);
626 const TargetRegisterClass *RC = MRI->getRegClass(VirtReg);
[all...] |
| PostRASchedulerList.cpp | 138 SmallVectorImpl<const TargetRegisterClass*> &CriticalPathRCs);
194 SmallVectorImpl<const TargetRegisterClass*> &CriticalPathRCs)
263 SmallVector<const TargetRegisterClass*, 4> CriticalPathRCs;
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| MachineSink.cpp | 126 const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg);
127 const TargetRegisterClass *DRC = MRI->getRegClass(DstReg);
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| TargetLoweringBase.cpp | 722 memset(RegClassForVT, 0,MVT::LAST_VALUETYPE*sizeof(TargetRegisterClass*));
[all...] |
| VirtRegMap.cpp | 76 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) {
105 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg);
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ResourcePriorityQueue.cpp | 371 const TargetRegisterClass *RC = *I;
378 const TargetRegisterClass *RC = *I;
491 const TargetRegisterClass *RC = TLI->getRegClassFor(VT);
502 const TargetRegisterClass *RC = TLI->getRegClassFor(VT);
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| ScheduleDAGFast.cpp | 104 const TargetRegisterClass*,
105 const TargetRegisterClass*,
389 const TargetRegisterClass *DestRC,
390 const TargetRegisterClass *SrcRC,
576 const TargetRegisterClass *RC =
578 const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC);
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 155 std::pair<unsigned, const TargetRegisterClass*>
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| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 98 std::pair<unsigned, const TargetRegisterClass*>
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| MSP430InstrInfo.cpp | 40 const TargetRegisterClass *RC,
68 const TargetRegisterClass *RC,
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.h | 35 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
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| /external/llvm/include/llvm/CodeGen/ |
| MachineFunction.h | 41 class TargetRegisterClass;
312 unsigned addLiveIn(unsigned PReg, const TargetRegisterClass *RC);
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| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 77 const TargetRegisterClass *RC =
78 (const TargetRegisterClass*)&Mips::CPU16RegsRegClass;
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| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 601 const TargetRegisterClass *RC =
637 const TargetRegisterClass *RC =
675 const TargetRegisterClass *FirstRC =
775 const TargetRegisterClass *RC,
853 const TargetRegisterClass *RC,
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 334 std::pair<unsigned, const TargetRegisterClass*>
352 const TargetRegisterClass *getRegClassFor(MVT VT) const override;
402 std::pair<const TargetRegisterClass*, uint8_t>
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| ARMBaseInstrInfo.h | 114 const TargetRegisterClass *RC,
120 const TargetRegisterClass *RC,
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| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 353 const TargetRegisterClass *RC,
391 const TargetRegisterClass *RC,
437 const TargetRegisterClass *PtrRC =
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