HomeSort by relevance Sort by last modified time
    Searched full:regsize (Results 1 - 25 of 31) sorted by null

1 2

  /ndk/sources/host-tools/sed-4.2.1/sed/
regexp.c 210 match_regex(regex, buf, buflen, buf_start_offset, regarray, regsize)
216 int regsize;
222 if (regsize > 10)
223 regmatch = (regmatch_t *) alloca (sizeof (regmatch_t) * regsize);
241 ret = regexec (&regex->pattern, buf, regsize, regmatch, REG_STARTEND);
243 if (regsize)
244 copy_regs (regarray, regmatch, regsize);
248 if (regex->pattern.no_sub && regsize)
249 compile_regex_1 (regex, regsize);
255 regsize ? regarray : NULL)
    [all...]
sed.h 202 struct re_registers *regarray, int regsize));
  /development/scripts/gdb/
dalvik.gdb 27 set $regSize = ((Method *) $method)->registersSize
30 while $index < $regSize
32 if $regSize - $index <= $insSize
33 printf " (in%d)\n", $insSize - $regSize + $index
  /external/strace/
process.c 1105 # define REGSIZE (sizeof(unsigned long))
1106 { REGSIZE*PT_R0, "r0" },
1107 { REGSIZE*PT_R1, "r1" },
1108 { REGSIZE*PT_R2, "r2" },
1109 { REGSIZE*PT_R3, "r3" },
1110 { REGSIZE*PT_R4, "r4" },
1111 { REGSIZE*PT_R5, "r5" },
1112 { REGSIZE*PT_R6, "r6" },
1113 { REGSIZE*PT_R7, "r7" },
1114 { REGSIZE*PT_R8, "r8" }
    [all...]
  /external/qemu/distrib/sdl-1.2.15/src/joystick/win32/
SDL_mmjoystick.c 81 DWORD regsize; local
100 regsize = sizeof(regname);
102 regresult = RegQueryValueExA(hKey, regvalue, 0, 0, (LPBYTE)regname, &regsize);
117 regsize = sizeof(regvalue);
118 regresult = RegQueryValueExA(hKey, REGSTR_VAL_JOYOEMNAME, 0, 0, NULL, &regsize);
121 name = (char *) SDL_malloc(regsize);
126 (LPBYTE) name, &regsize);
  /external/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64AddressingModes.h 213 static inline bool processLogicalImmediate(uint64_t imm, unsigned regSize,
216 (regSize != 64 && (imm >> regSize != 0 || imm == ~0U)))
223 while (size < regSize) {
224 unsigned numElts = regSize / size;
278 static inline bool isLogicalImmediate(uint64_t imm, unsigned regSize) {
280 return processLogicalImmediate(imm, regSize, encoding);
285 static inline uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize) {
287 bool res = processLogicalImmediate(imm, regSize, encoding);
295 /// integer value it represents with regSize bits
    [all...]
  /dalvik/dexgen/src/com/android/dexgen/dex/file/
DebugInfoDecoder.java 72 private final int regSize;
88 * @param regSize register size, in register units, of the register space
94 DebugInfoDecoder(byte[] encoded, int codesize, int regSize,
104 this.regSize = regSize;
109 lastEntryForReg = new LocalEntry[regSize];
230 * {@code regSize}
235 return regSize
DebugInfoEncoder.java 67 private final int regSize;
104 * @param regSize
109 DexFile file, int codeSize, int regSize,
117 this.regSize = regSize;
120 lastEntryForReg = new LocalList.Entry[regSize];
510 * {@code regSize}
515 return regSize
531 BitSet seen = new BitSet(regSize - argBase);
DebugInfoItem.java 179 int regSize = insns.getRegistersSize();
183 file, codeSize, regSize, isStatic, ref);
  /dalvik/dx/src/com/android/dx/dex/file/
DebugInfoDecoder.java 83 private final int regSize;
99 * @param regSize register size, in register units, of the register space
105 DebugInfoDecoder(byte[] encoded, int codesize, int regSize,
115 this.regSize = regSize;
120 lastEntryForReg = new LocalEntry[regSize];
240 * {@code regSize}
245 return regSize
DebugInfoEncoder.java 75 private final int regSize;
112 * @param regSize
117 DexFile file, int codeSize, int regSize,
125 this.regSize = regSize;
128 lastEntryForReg = new LocalList.Entry[regSize];
518 * {@code regSize}
523 return regSize
539 BitSet seen = new BitSet(regSize - argBase);
DebugInfoItem.java 176 int regSize = insns.getRegistersSize();
180 file, codeSize, regSize, isStatic, ref);
  /external/dexmaker/src/dx/java/com/android/dx/dex/file/
DebugInfoDecoder.java 73 private final int regSize;
89 * @param regSize register size, in register units, of the register space
95 DebugInfoDecoder(byte[] encoded, int codesize, int regSize,
105 this.regSize = regSize;
110 lastEntryForReg = new LocalEntry[regSize];
230 * {@code regSize}
235 return regSize
DebugInfoEncoder.java 67 private final int regSize;
104 * @param regSize
109 DexFile file, int codeSize, int regSize,
117 this.regSize = regSize;
120 lastEntryForReg = new LocalList.Entry[regSize];
510 * {@code regSize}
515 return regSize
531 BitSet seen = new BitSet(regSize - argBase);
DebugInfoItem.java 177 int regSize = insns.getRegistersSize();
181 file, codeSize, regSize, isStatic, ref);
  /external/llvm/lib/Target/Mips/
MipsSEFrameLowering.cpp 61 void expandLoadACC(MachineBasicBlock &MBB, Iter I, unsigned RegSize);
63 unsigned MFLoOpc, unsigned RegSize);
164 unsigned RegSize) {
177 const TargetRegisterClass *RC = RegInfo.intRegClass(RegSize);
188 TII.loadRegFromStack(MBB, I, VR1, FI, RC, &RegInfo, RegSize);
194 unsigned RegSize) {
207 const TargetRegisterClass *RC = RegInfo.intRegClass(RegSize);
217 TII.storeRegToStack(MBB, I, VR1, true, FI, RC, &RegInfo, RegSize);
MipsISelLowering.cpp     [all...]
MipsISelLowering.h 380 /// regSize - Size (in number of bits) of integer registers.
381 unsigned regSize() const { return IsO32 ? 4 : 8; }
  /external/valgrind/main/coregrind/
vgdb-invoker-ptrace.c 865 const int regsize = 4; local
868 sp = sp - regsize;
870 assert(regsize == sizeof(check));
873 regsize);
880 sp = sp - regsize;
886 regsize);
952 const int regsize = 8;
959 sp = sp - regsize;
    [all...]
  /external/llvm/lib/Target/SystemZ/
SystemZInstrInfo.cpp 632 LogicOp() : RegSize(0), ImmLSB(0), ImmSize(0) {}
633 LogicOp(unsigned regSize, unsigned immLSB, unsigned immSize)
634 : RegSize(regSize), ImmLSB(immLSB), ImmSize(immSize) {}
636 operator bool() const { return RegSize; }
638 unsigned RegSize, ImmLSB, ImmSize;
722 Imm |= allOnes(And.RegSize) & ~(allOnes(And.ImmSize) << And.ImmLSB);
724 if (isRxSBGMask(Imm, And.RegSize, Start, End)) {
726 if (And.RegSize == 64)
    [all...]
  /external/llvm/lib/CodeGen/AsmPrinter/
AsmPrinterDwarf.cpp 294 unsigned RegSize = TRI->getMinimalPhysRegClass(MLoc.getReg())->getSize() * 8;
297 SmallBitVector Coverage(RegSize, false);
306 SmallBitVector Intersection(RegSize, false);
  /external/llvm/include/llvm/MC/
MCRegisterInfo.h 41 const uint16_t RegSize, Alignment; // Size & Alignment of register in bytes
86 unsigned getSize() const { return RegSize; }
  /external/libunwind/src/ia64/
Gparser.c 165 alloc_spill_area (unsigned long *offp, unsigned long regsize,
175 *offp -= regsize;
  /external/llvm/lib/Target/AArch64/
AArch64LoadStoreOptimizer.cpp 704 unsigned RegSize = TII->getRegClass(MemMI->getDesc(), 0, TRI, MF)->getSize();
732 if (isMatchingUpdateInsn(MI, BaseReg, RegSize))
    [all...]
AArch64RegisterInfo.td 469 class TypedVecListAsmOperand<int count, int regsize, int lanes, string kind>
475 let RenderMethod = "addVectorList" # regsize # "Operands<" # count # ">";

Completed in 1681 milliseconds

1 2