| /external/llvm/include/llvm/CodeGen/ |
| LiveVariables.h | 103 /// findKill - Find a kill instruction in MBB. Return NULL if none is found.
104 MachineInstr *findKill(const MachineBasicBlock *MBB) const;
106 /// isLiveIn - Is Reg live in to MBB? This means that Reg is live through
107 /// MBB, or it is killed in MBB. If Reg is only used by PHI instructions in
108 /// MBB, it is not considered live in.
109 bool isLiveIn(const MachineBasicBlock &MBB,
278 void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
281 bool isLiveIn(unsigned Reg, const MachineBasicBlock &MBB) {
282 return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI)
[all...] |
| DFAPacketizer.h | 117 void PacketizeMIs(MachineBasicBlock *MBB,
133 void endPacket(MachineBasicBlock *MBB, MachineInstr *MI);
142 MachineBasicBlock *MBB) {
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| MachineFunction.h | 60 void addNodeToList(MachineBasicBlock* MBB);
61 void removeNodeFromList(MachineBasicBlock* MBB);
62 void deleteNode(MachineBasicBlock *MBB);
100 // numbered and this vector keeps track of the mapping from ID's to MBB's.
253 /// basic block can be found by using the MBB::getBlockNumber method, this
265 /// getNumBlockIDs - Return the number of MBB ID's allocated.
270 /// recomputes them. This guarantees that the MBB numbers are sequential,
334 void push_back (MachineBasicBlock *MBB) { BasicBlocks.push_back (MBB); }
335 void push_front(MachineBasicBlock *MBB) { BasicBlocks.push_front(MBB);
[all...] |
| /external/llvm/lib/CodeGen/ |
| DeadMachineInstructionElim.cpp | 101 MachineBasicBlock *MBB = &*I;
109 for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(),
110 E = MBB->succ_end(); S != E; S++)
117 for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
118 MIE = MBB->rend(); MII != MIE; ) {
139 MIE = MBB->rend();
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| LiveRangeCalc.h | 59 /// For every basic block, MBB, one of these conditions shall be true:
61 /// 1. !Seen.count(MBB->getNumber())
63 /// 2. LiveOut[MBB].second.getNode() == MBB
64 /// The live-out value is defined in MBB.
65 /// 3. forall P in preds(MBB): LiveOut[P] == LiveOut[MBB]
66 /// The live-out value passses through MBB. All predecessors must carry
199 /// setLiveOutValue - Indicate that VNI is live out from MBB. The
200 /// calculateValues() function will not add liveness for MBB, the calle
[all...] |
| LiveDebugVariables.cpp | 90 bool dominates(MachineBasicBlock *MBB) {
93 if (LBlocks.count(MBB) != 0 || LS.dominates(DL, MBB))
131 /// insertDebugValue - Insert a DBG_VALUE into MBB at Idx for LocNo.
132 void insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo,
477 MachineBasicBlock *MBB = MFI;
478 for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
485 SlotIndex Idx = MBBI == MBB->begin() ?
486 LIS->getMBBStartIdx(MBB)
[all...] |
| /external/llvm/lib/Target/R600/ |
| SIInstrInfo.h | 65 void copyPhysReg(MachineBasicBlock &MBB,
70 void storeRegToStackSlot(MachineBasicBlock &MBB,
76 void loadRegFromStackSlot(MachineBasicBlock &MBB,
96 MachineInstr *buildMovInstr(MachineBasicBlock *MBB,
160 MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB,
166 MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB,
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| SIFixSGPRLiveRanges.cpp | 83 MachineBasicBlock &MBB = *BI;
84 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
|
| R600InstrInfo.cpp | 49 R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
69 buildDefaultInstruction(MBB, MI, AMDGPU::MOV,
76 MachineInstr *NewMI = buildDefaultInstruction(MBB, MI, AMDGPU::MOV,
84 bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB,
674 findFirstPredicateSetterFrom(MachineBasicBlock &MBB,
676 while (I != MBB.begin()) {
697 R600InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
705 MachineBasicBlock::iterator I = MBB.end();
706 if (I == MBB.begin())
710 if (I == MBB.begin()
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.cpp | 62 MachineBasicBlock &MBB = *MI->getParent();
63 MachineFunction &MF = *MBB.getParent();
108 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
116 BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg)
121 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
122 BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg)
|
| SystemZInstrInfo.h | 128 void emitGRX32Move(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
143 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
147 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
148 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
158 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
169 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
172 void storeRegToStackSlot(MachineBasicBlock &MBB,
177 void loadRegFromStackSlot(MachineBasicBlock &MBB,
237 void loadImmediate(MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | 100 void UpdateBaseRegUses(MachineBasicBlock &MBB,
104 bool MergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
110 void MergeOpsUpdate(MachineBasicBlock &MBB,
124 void MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex, unsigned Base,
129 void AdvanceRS(MachineBasicBlock &MBB, MemOpQueue &MemOps);
130 bool FixInvalidRegPairOp(MachineBasicBlock &MBB,
132 bool MergeBaseUpdateLoadStore(MachineBasicBlock &MBB,
137 bool MergeBaseUpdateLSMultiple(MachineBasicBlock &MBB,
141 bool LoadStoreMultipleOpti(MachineBasicBlock &MBB);
142 bool MergeReturnIntoLDM(MachineBasicBlock &MBB);
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILFrameLowering.cpp | 46 AMDGPUFrameLowering::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
|
| SIInstrInfo.h | 33 virtual void copyPhysReg(MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.h | 38 const MachineBasicBlock *MBB) const override;
|
| HexagonInstrInfo.h | 62 bool AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
67 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
69 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
78 void copyPhysReg(MachineBasicBlock &MBB,
83 void storeRegToStackSlot(MachineBasicBlock &MBB,
94 void loadRegFromStackSlot(MachineBasicBlock &MBB,
124 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
148 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
156 const MachineBasicBlock *MBB,
|
| /external/llvm/lib/Target/Mips/ |
| Mips16RegisterInfo.h | 32 bool saveScavengerRegister(MachineBasicBlock &MBB,
|
| MipsConstantIslandPass.cpp | 393 void computeBlockSize(MachineBasicBlock *MBB);
603 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
605 MachineFunction::iterator MBBI = MBB;
607 if (std::next(MBBI) == MBB->getParent()->end())
611 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
612 E = MBB->succ_end(); I != E; ++I)
672 MachineBasicBlock &MBB = *MBBI;
674 // If this block doesn't fall through into the next MBB, then this is
676 if (!BBHasFallthrough(&MBB))
677 WaterList.push_back(&MBB);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcCodeEmitter.cpp | 68 MachineBasicBlock &MBB);
116 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
117 MBB != E; ++MBB){
118 MCE.StartMachineBasicBlock(MBB);
119 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(),
120 E = MBB->instr_end(); I != E;)
121 emitInstruction(*I++, *MBB);
129 MachineBasicBlock &MBB) {
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILFrameLowering.cpp | 46 AMDGPUFrameLowering::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
|
| SIInstrInfo.h | 33 virtual void copyPhysReg(MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.cpp | 109 MachineFunction &MF, MachineBasicBlock &MBB,
142 emitFrameOffset(MBB, I, DL, AArch64::SP, AArch64::SP, Amount, TII);
148 emitFrameOffset(MBB, I, DL, AArch64::SP, AArch64::SP, -CalleePopAmount,
151 MBB.erase(I);
155 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
157 MachineFunction &MF = *MBB.getParent();
162 DebugLoc DL = MBB.findDebugLoc(MBBI);
197 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
203 MachineBasicBlock &MBB = MF.front(); // Prologue goes in entry BB.
204 MachineBasicBlock::iterator MBBI = MBB.begin()
[all...] |
| AArch64ConditionalCompares.cpp | 182 /// Find the compare instruction in MBB that controls the conditional branch.
184 MachineInstr *findConvertibleCompare(MachineBasicBlock *MBB);
186 /// Return true if all non-terminator instructions in MBB can be safely
188 bool canSpeculateInstrs(MachineBasicBlock *MBB, const MachineInstr *CmpMI);
199 /// If the sub-CFG headed by MBB can be cmp-converted, initialize the
201 bool canConvert(MachineBasicBlock *MBB);
220 // PHI operands come in (VReg, MBB) pairs.
222 MachineBasicBlock *MBB = I.getOperand(oi + 1).getMBB();
224 if (MBB == Head) {
228 if (MBB == CmpBB)
[all...] |
| AArch64InstrInfo.cpp | 38 const MachineBasicBlock &MBB = *MI->getParent();
39 const MachineFunction *MF = MBB.getParent();
92 bool AArch64InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
98 MachineBasicBlock::iterator I = MBB.end();
99 if (I == MBB.begin())
103 if (I == MBB.begin())
115 if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
139 if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
151 if (SecondLastInst && I != MBB.begin() && isUnpredicatedTerminator(--I))
225 unsigned AArch64InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | 83 // Instructions are appended to FuncInfo.MBB. If the basic block already
87 if (!FuncInfo.MBB->empty())
88 EmitStartPt = &FuncInfo.MBB->back();
236 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
317 FuncInfo.MBB = FuncInfo.InsertPt->getParent();
320 FuncInfo.InsertPt = FuncInfo.MBB->getFirstNonPHI();
323 while (FuncInfo.InsertPt != FuncInfo.MBB->end() &&
350 if (FuncInfo.InsertPt != FuncInfo.MBB->begin())
645 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AdjStackDown))
649 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc
[all...] |
