1 //===-- SparcSubtarget.cpp - SPARC Subtarget Information ------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the SPARC specific subclass of TargetSubtargetInfo. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "SparcSubtarget.h" 15 #include "Sparc.h" 16 #include "llvm/Support/MathExtras.h" 17 #include "llvm/Support/TargetRegistry.h" 18 19 using namespace llvm; 20 21 #define DEBUG_TYPE "sparc-subtarget" 22 23 #define GET_SUBTARGETINFO_TARGET_DESC 24 #define GET_SUBTARGETINFO_CTOR 25 #include "SparcGenSubtargetInfo.inc" 26 27 void SparcSubtarget::anchor() { } 28 29 static std::string computeDataLayout(const SparcSubtarget &ST) { 30 // Sparc is big endian. 31 std::string Ret = "E-m:e"; 32 33 // Some ABIs have 32bit pointers. 34 if (!ST.is64Bit()) 35 Ret += "-p:32:32"; 36 37 // Alignments for 64 bit integers. 38 Ret += "-i64:64"; 39 40 // On SparcV9 128 floats are aligned to 128 bits, on others only to 64. 41 // On SparcV9 registers can hold 64 or 32 bits, on others only 32. 42 if (ST.is64Bit()) 43 Ret += "-n32:64"; 44 else 45 Ret += "-f128:64-n32"; 46 47 if (ST.is64Bit()) 48 Ret += "-S128"; 49 else 50 Ret += "-S64"; 51 52 return Ret; 53 } 54 55 SparcSubtarget &SparcSubtarget::initializeSubtargetDependencies(StringRef CPU, 56 StringRef FS) { 57 IsV9 = false; 58 V8DeprecatedInsts = false; 59 IsVIS = false; 60 HasHardQuad = false; 61 UsePopc = false; 62 63 // Determine default and user specified characteristics 64 std::string CPUName = CPU; 65 if (CPUName.empty()) 66 CPUName = (Is64Bit) ? "v9" : "v8"; 67 68 // Parse features string. 69 ParseSubtargetFeatures(CPUName, FS); 70 71 // Popc is a v9-only instruction. 72 if (!IsV9) 73 UsePopc = false; 74 75 return *this; 76 } 77 78 SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU, 79 const std::string &FS, TargetMachine &TM, 80 bool is64Bit) 81 : SparcGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit), 82 DL(computeDataLayout(initializeSubtargetDependencies(CPU, FS))), 83 InstrInfo(*this), TLInfo(TM), TSInfo(DL), FrameLowering(*this) {} 84 85 int SparcSubtarget::getAdjustedFrameSize(int frameSize) const { 86 87 if (is64Bit()) { 88 // All 64-bit stack frames must be 16-byte aligned, and must reserve space 89 // for spilling the 16 window registers at %sp+BIAS..%sp+BIAS+128. 90 frameSize += 128; 91 // Frames with calls must also reserve space for 6 outgoing arguments 92 // whether they are used or not. LowerCall_64 takes care of that. 93 assert(frameSize % 16 == 0 && "Stack size not 16-byte aligned"); 94 } else { 95 // Emit the correct save instruction based on the number of bytes in 96 // the frame. Minimum stack frame size according to V8 ABI is: 97 // 16 words for register window spill 98 // 1 word for address of returned aggregate-value 99 // + 6 words for passing parameters on the stack 100 // ---------- 101 // 23 words * 4 bytes per word = 92 bytes 102 frameSize += 92; 103 104 // Round up to next doubleword boundary -- a double-word boundary 105 // is required by the ABI. 106 frameSize = RoundUpToAlignment(frameSize, 8); 107 } 108 return frameSize; 109 } 110
