| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| SIMCCodeEmitter.cpp | 56 SmallVectorImpl<MCFixup> &Fixups,
61 SmallVectorImpl<MCFixup> &Fixups,
67 SmallVectorImpl<MCFixup> &Fixups,
183 SmallVectorImpl<MCFixup> &Fixups,
230 SmallVectorImpl<MCFixup> &Fixups,
246 SmallVectorImpl<MCFixup> &Fixups,
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| /external/llvm/lib/Target/R600/ |
| R600InstrInfo.h | 160 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
163 SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const override;
165 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const override;
191 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
192 const SmallVectorImpl<MachineOperand> &Pred2) const override;
198 const SmallVectorImpl<MachineOperand> &Pred) const override;
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| AMDGPUInstrInfo.cpp | 178 SmallVectorImpl<MachineInstr*> &NewMIs) const {
185 SmallVectorImpl<SDNode*> &NewNodes) const {
225 AMDGPUInstrInfo::ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond)
240 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
241 const SmallVectorImpl<MachineOperand> &Pred2)
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| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 626 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
781 bool isShuffleMaskLegal(const SmallVectorImpl<int> &Mask,
787 bool isVectorClearMaskLegal(const SmallVectorImpl<int> &Mask,
885 const SmallVectorImpl<ISD::InputArg> &Ins,
887 SmallVectorImpl<SDValue> &InVals) const;
890 const SmallVectorImpl<ISD::InputArg> &ArgInfo,
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 240 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
377 isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const override;
450 SmallVectorImpl<SDValue> &MemOpChains,
519 const SmallVectorImpl<ISD::InputArg> &Ins,
521 SmallVectorImpl<SDValue> &InVals,
527 const SmallVectorImpl<ISD::InputArg> &Ins,
529 SmallVectorImpl<SDValue> &InVals) const override;
546 SmallVectorImpl<SDValue> &InVals) const override;
559 const SmallVectorImpl<ISD::OutputArg> &Outs,
560 const SmallVectorImpl<SDValue> &OutVals
[all...] |
| ARMBaseInstrInfo.h | 57 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const override;
115 SmallVectorImpl<MachineOperand> &Cond,
120 const SmallVectorImpl<MachineOperand> &Cond,
124 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
136 const SmallVectorImpl<MachineOperand> &Pred) const override;
138 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
139 const SmallVectorImpl<MachineOperand> &Pred2) const override;
260 SmallVectorImpl<MachineOperand> &Cond,
|
| /external/llvm/lib/CodeGen/ |
| LexicalScopes.cpp | 55 SmallVectorImpl<InsnRange> &MIRanges,
224 const SmallVectorImpl<LexicalScope *> &Children = WS->getChildren();
226 for (SmallVectorImpl<LexicalScope *>::const_iterator SI = Children.begin(),
247 SmallVectorImpl<InsnRange> &MIRanges,
251 for (SmallVectorImpl<InsnRange>::const_iterator RI = MIRanges.begin(),
284 SmallVectorImpl<InsnRange> &InsnRanges = Scope->getRanges();
285 for (SmallVectorImpl<InsnRange>::iterator I = InsnRanges.begin(),
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| RegAllocBasic.cpp | 103 SmallVectorImpl<unsigned> &SplitVRegs) override;
112 SmallVectorImpl<unsigned> &SplitVRegs);
167 SmallVectorImpl<unsigned> &SplitVRegs) {
221 SmallVectorImpl<unsigned> &SplitVRegs) {
246 for (SmallVectorImpl<unsigned>::iterator PhysRegI = PhysRegSpillCands.begin(),
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| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 278 bool isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const override;
370 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL,
372 SmallVectorImpl<SDValue> &InVals) const override;
375 SmallVectorImpl<SDValue> &InVals) const override;
379 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL,
380 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
386 const SmallVectorImpl<ISD::OutputArg> &Outs,
387 const SmallVectorImpl<SDValue> &OutVals,
388 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
405 const SmallVectorImpl<ISD::OutputArg> &Outs
[all...] |
| AArch64CallingConvention.h | 44 static bool finishStackBlock(SmallVectorImpl<CCValAssign> &PendingMembers,
70 SmallVectorImpl<CCValAssign> &PendingMembers = State.getPendingLocs();
107 SmallVectorImpl<CCValAssign> &PendingMembers = State.getPendingLocs();
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 233 SmallVectorImpl<SDValue> &Results,
242 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
353 getOpndList(SmallVectorImpl<SDValue> &Ops,
392 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl,
393 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
433 SmallVectorImpl<SDValue> &InVals,
441 SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr,
456 const SmallVectorImpl<ISD::InputArg> &Ins,
458 SmallVectorImpl<SDValue> &InVals) const override;
465 SmallVectorImpl<SDValue> &InVals) const override
[all...] |
| /external/llvm/include/llvm/Bitcode/ |
| BitstreamWriter.h | 26 SmallVectorImpl<char> &Out;
96 explicit BitstreamWriter(SmallVectorImpl<char> &O)
295 void EmitRecordWithAbbrevImpl(unsigned Abbrev, SmallVectorImpl<uintty> &Vals,
390 void EmitRecord(unsigned Code, SmallVectorImpl<uintty> &Vals,
413 void EmitRecordWithAbbrev(unsigned Abbrev, SmallVectorImpl<uintty> &Vals) {
423 void EmitRecordWithBlob(unsigned Abbrev, SmallVectorImpl<uintty> &Vals,
428 void EmitRecordWithBlob(unsigned Abbrev, SmallVectorImpl<uintty> &Vals,
436 void EmitRecordWithArray(unsigned Abbrev, SmallVectorImpl<uintty> &Vals,
441 void EmitRecordWithArray(unsigned Abbrev, SmallVectorImpl<uintty> &Vals,
|
| /external/clang/lib/StaticAnalyzer/Checkers/ |
| MallocOverflowSecurityChecker.cpp | 47 SmallVectorImpl<MallocOverflowCheck> &PossibleMallocOverflows,
51 SmallVectorImpl<MallocOverflowCheck> &PossibleMallocOverflows,
58 SmallVectorImpl<MallocOverflowCheck> &PossibleMallocOverflows,
114 typedef SmallVectorImpl<MallocOverflowCheck> theVecType;
200 SmallVectorImpl<MallocOverflowCheck> &PossibleMallocOverflows,
|
| /external/llvm/include/llvm/Support/ |
| raw_ostream.h | 26 template <typename T> class SmallVectorImpl;
185 raw_ostream &operator<<(const llvm::SmallVectorImpl<char> &Str) {
476 SmallVectorImpl<char> &OS;
487 explicit raw_svector_ostream(SmallVectorImpl<char> &O, unsigned);
495 explicit raw_svector_ostream(SmallVectorImpl<char> &O);
|
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfCompileUnit.h | 119 SmallVectorImpl<std::unique_ptr<DIE>> &FinalChildren);
128 const SmallVectorImpl<InsnRange> &Ranges);
147 SmallVectorImpl<std::unique_ptr<DIE>> &Children,
220 const SmallVectorImpl<RangeSpanList> &getRangeLists() const {
225 const SmallVectorImpl<RangeSpan> &getRanges() const { return CURanges; }
|
| /external/llvm/lib/Transforms/Scalar/ |
| LoopDeletion.cpp | 55 bool isLoopDead(Loop *L, SmallVectorImpl<BasicBlock *> &exitingBlocks,
56 SmallVectorImpl<BasicBlock *> &exitBlocks,
81 SmallVectorImpl<BasicBlock *> &exitingBlocks,
82 SmallVectorImpl<BasicBlock *> &exitBlocks,
216 for (SmallVectorImpl<DomTreeNode *>::iterator DI = ChildNodes.begin(),
|
| /external/clang/include/clang/AST/ |
| CXXInheritance.h | 83 SmallVectorImpl<CXXBasePathElement>::clear();
291 typedef SmallVectorImpl<UniqueVirtualMethod>::iterator
293 typedef SmallVectorImpl<UniqueVirtualMethod>::const_iterator
|
| /external/clang/include/clang/Basic/ |
| FileManager.h | 265 void FixupRelativePath(SmallVectorImpl<char> &path) const;
270 SmallVectorImpl<const FileEntry *> &UIDToFiles) const;
278 static bool removeDotPaths(SmallVectorImpl<char> &Path);
|
| DiagnosticIDs.h | 241 SmallVectorImpl<diag::kind> &Diags) const;
245 SmallVectorImpl<diag::kind> &Diags) const;
|
| /external/clang/include/clang/Serialization/ |
| ModuleManager.h | 107 typedef SmallVectorImpl<ModuleFile*>::iterator ModuleIterator;
108 typedef SmallVectorImpl<ModuleFile*>::const_iterator ModuleConstIterator;
109 typedef SmallVectorImpl<ModuleFile*>::reverse_iterator ModuleReverseIterator;
|
| /external/llvm/include/llvm/CodeGen/ |
| LiveVariables.h | 160 SmallVectorImpl<unsigned> &Defs);
161 void UpdatePhysRegDefs(MachineInstr *MI, SmallVectorImpl<unsigned> &Defs);
179 void runOnInstr(MachineInstr *MI, SmallVectorImpl<unsigned> &Defs);
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMUnwindOpAsm.cpp | 29 SmallVectorImpl<uint8_t> &Vec;
33 UnwindOpcodeStreamer(SmallVectorImpl<uint8_t> &V) : Vec(V), Pos(3) {
155 SmallVectorImpl<uint8_t> &Result) {
|
| /external/llvm/include/llvm/Analysis/ |
| LazyCallGraph.h | 108 typedef SmallVectorImpl<PointerUnion<Function *, Node *>> NodeVectorImplT;
223 internalDFS(SmallVectorImpl<std::pair<Node *, Node::iterator>> &DFSStack,
224 SmallVectorImpl<Node *> &PendingSCCStack, Node *N,
225 SmallVectorImpl<SCC *> &ResultSCCs);
228 typedef SmallVectorImpl<Node *>::const_iterator iterator;
514 SCC *formSCC(Node *RootN, SmallVectorImpl<Node *> &NodeStack);
|
| SparsePropagation.h | 35 template<typename T> class SmallVectorImpl;
195 void getFeasibleSuccessors(TerminatorInst &TI, SmallVectorImpl<bool> &Succs,
|
| /external/lldb/include/lldb/Symbol/ |
| ClangExternalASTSourceCallbacks.h | 36 typedef void (*FindExternalVisibleDeclsByNameCallback)(void *baton, const clang::DeclContext *DC, clang::DeclarationName Name, llvm::SmallVectorImpl <clang::NamedDecl *> *results);
108 llvm::SmallVectorImpl<clang::Decl*> &decls)
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