1 /* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude (at) gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 22 23 #include "draw/draw_context.h" 24 25 #include "util/u_memory.h" 26 #include "util/u_sampler.h" 27 #include "util/u_simple_list.h" 28 #include "util/u_upload_mgr.h" 29 #include "os/os_time.h" 30 #include "vl/vl_decoder.h" 31 #include "vl/vl_video_buffer.h" 32 33 #include "r300_cb.h" 34 #include "r300_context.h" 35 #include "r300_emit.h" 36 #include "r300_screen.h" 37 #include "r300_screen_buffer.h" 38 39 static void r300_release_referenced_objects(struct r300_context *r300) 40 { 41 struct pipe_framebuffer_state *fb = 42 (struct pipe_framebuffer_state*)r300->fb_state.state; 43 struct r300_textures_state *textures = 44 (struct r300_textures_state*)r300->textures_state.state; 45 unsigned i; 46 47 /* Framebuffer state. */ 48 util_unreference_framebuffer_state(fb); 49 50 /* Textures. */ 51 for (i = 0; i < textures->sampler_view_count; i++) 52 pipe_sampler_view_reference( 53 (struct pipe_sampler_view**)&textures->sampler_views[i], NULL); 54 55 /* The special dummy texture for texkill. */ 56 if (r300->texkill_sampler) { 57 pipe_sampler_view_reference( 58 (struct pipe_sampler_view**)&r300->texkill_sampler, 59 NULL); 60 } 61 62 /* Manually-created vertex buffers. */ 63 pipe_resource_reference(&r300->dummy_vb.buffer, NULL); 64 pipe_resource_reference(&r300->vbo, NULL); 65 66 r300->context.delete_depth_stencil_alpha_state(&r300->context, 67 r300->dsa_decompress_zmask); 68 } 69 70 static void r300_destroy_context(struct pipe_context* context) 71 { 72 struct r300_context* r300 = r300_context(context); 73 74 if (r300->cs && r300->hyperz_enabled) { 75 r300->rws->cs_request_feature(r300->cs, RADEON_FID_R300_HYPERZ_ACCESS, FALSE); 76 } 77 78 if (r300->blitter) 79 util_blitter_destroy(r300->blitter); 80 if (r300->draw) 81 draw_destroy(r300->draw); 82 83 if (r300->uploader) 84 u_upload_destroy(r300->uploader); 85 86 /* XXX: This function assumes r300->query_list was initialized */ 87 r300_release_referenced_objects(r300); 88 89 if (r300->cs) 90 r300->rws->cs_destroy(r300->cs); 91 92 /* XXX: No way to tell if this was initialized or not? */ 93 util_slab_destroy(&r300->pool_transfers); 94 95 /* Free the structs allocated in r300_setup_atoms() */ 96 if (r300->aa_state.state) { 97 FREE(r300->aa_state.state); 98 FREE(r300->blend_color_state.state); 99 FREE(r300->clip_state.state); 100 FREE(r300->fb_state.state); 101 FREE(r300->gpu_flush.state); 102 FREE(r300->hyperz_state.state); 103 FREE(r300->invariant_state.state); 104 FREE(r300->rs_block_state.state); 105 FREE(r300->scissor_state.state); 106 FREE(r300->textures_state.state); 107 FREE(r300->vap_invariant_state.state); 108 FREE(r300->viewport_state.state); 109 FREE(r300->ztop_state.state); 110 FREE(r300->fs_constants.state); 111 FREE(r300->vs_constants.state); 112 if (!r300->screen->caps.has_tcl) { 113 FREE(r300->vertex_stream_state.state); 114 } 115 } 116 FREE(r300); 117 } 118 119 static void r300_flush_callback(void *data, unsigned flags) 120 { 121 struct r300_context* const cs_context_copy = data; 122 123 r300_flush(&cs_context_copy->context, flags, NULL); 124 } 125 126 #define R300_INIT_ATOM(atomname, atomsize) \ 127 do { \ 128 r300->atomname.name = #atomname; \ 129 r300->atomname.state = NULL; \ 130 r300->atomname.size = atomsize; \ 131 r300->atomname.emit = r300_emit_##atomname; \ 132 r300->atomname.dirty = FALSE; \ 133 } while (0) 134 135 #define R300_ALLOC_ATOM(atomname, statetype) \ 136 do { \ 137 r300->atomname.state = CALLOC_STRUCT(statetype); \ 138 if (r300->atomname.state == NULL) \ 139 return FALSE; \ 140 } while (0) 141 142 static boolean r300_setup_atoms(struct r300_context* r300) 143 { 144 boolean is_rv350 = r300->screen->caps.is_rv350; 145 boolean is_r500 = r300->screen->caps.is_r500; 146 boolean has_tcl = r300->screen->caps.has_tcl; 147 boolean drm_2_6_0 = r300->screen->info.drm_minor >= 6; 148 149 /* Create the actual atom list. 150 * 151 * Some atoms never change size, others change every emit - those have 152 * the size of 0 here. 153 * 154 * NOTE: The framebuffer state is split into these atoms: 155 * - gpu_flush (unpipelined regs) 156 * - aa_state (unpipelined regs) 157 * - fb_state (unpipelined regs) 158 * - hyperz_state (unpipelined regs followed by pipelined ones) 159 * - fb_state_pipelined (pipelined regs) 160 * The motivation behind this is to be able to emit a strict 161 * subset of the regs, and to have reasonable register ordering. */ 162 /* SC, GB (unpipelined), RB3D (unpipelined), ZB (unpipelined). */ 163 R300_INIT_ATOM(gpu_flush, 9); 164 R300_INIT_ATOM(aa_state, 4); 165 R300_INIT_ATOM(fb_state, 0); 166 R300_INIT_ATOM(hyperz_state, is_r500 || (is_rv350 && drm_2_6_0) ? 10 : 8); 167 /* ZB (unpipelined), SC. */ 168 R300_INIT_ATOM(ztop_state, 2); 169 /* ZB, FG. */ 170 R300_INIT_ATOM(dsa_state, is_r500 ? (drm_2_6_0 ? 10 : 8) : 6); 171 /* RB3D. */ 172 R300_INIT_ATOM(blend_state, 8); 173 R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2); 174 /* SC. */ 175 R300_INIT_ATOM(scissor_state, 3); 176 /* GB, FG, GA, SU, SC, RB3D. */ 177 R300_INIT_ATOM(invariant_state, 16 + (is_rv350 ? 4 : 0) + (is_r500 ? 4 : 0)); 178 /* VAP. */ 179 R300_INIT_ATOM(viewport_state, 9); 180 R300_INIT_ATOM(pvs_flush, 2); 181 R300_INIT_ATOM(vap_invariant_state, is_r500 ? 11 : 9); 182 R300_INIT_ATOM(vertex_stream_state, 0); 183 R300_INIT_ATOM(vs_state, 0); 184 R300_INIT_ATOM(vs_constants, 0); 185 R300_INIT_ATOM(clip_state, has_tcl ? 3 + (6 * 4) : 0); 186 /* VAP, RS, GA, GB, SU, SC. */ 187 R300_INIT_ATOM(rs_block_state, 0); 188 R300_INIT_ATOM(rs_state, 0); 189 /* SC, US. */ 190 R300_INIT_ATOM(fb_state_pipelined, 8); 191 /* US. */ 192 R300_INIT_ATOM(fs, 0); 193 R300_INIT_ATOM(fs_rc_constant_state, 0); 194 R300_INIT_ATOM(fs_constants, 0); 195 /* TX. */ 196 R300_INIT_ATOM(texture_cache_inval, 2); 197 R300_INIT_ATOM(textures_state, 0); 198 /* HiZ Clear */ 199 R300_INIT_ATOM(hiz_clear, r300->screen->caps.hiz_ram > 0 ? 4 : 0); 200 /* zmask clear */ 201 R300_INIT_ATOM(zmask_clear, r300->screen->caps.zmask_ram > 0 ? 4 : 0); 202 /* ZB (unpipelined), SU. */ 203 R300_INIT_ATOM(query_start, 4); 204 205 /* Replace emission functions for r500. */ 206 if (is_r500) { 207 r300->fs.emit = r500_emit_fs; 208 r300->fs_rc_constant_state.emit = r500_emit_fs_rc_constant_state; 209 r300->fs_constants.emit = r500_emit_fs_constants; 210 } 211 212 /* Some non-CSO atoms need explicit space to store the state locally. */ 213 R300_ALLOC_ATOM(aa_state, r300_aa_state); 214 R300_ALLOC_ATOM(blend_color_state, r300_blend_color_state); 215 R300_ALLOC_ATOM(clip_state, r300_clip_state); 216 R300_ALLOC_ATOM(hyperz_state, r300_hyperz_state); 217 R300_ALLOC_ATOM(invariant_state, r300_invariant_state); 218 R300_ALLOC_ATOM(textures_state, r300_textures_state); 219 R300_ALLOC_ATOM(vap_invariant_state, r300_vap_invariant_state); 220 R300_ALLOC_ATOM(viewport_state, r300_viewport_state); 221 R300_ALLOC_ATOM(ztop_state, r300_ztop_state); 222 R300_ALLOC_ATOM(fb_state, pipe_framebuffer_state); 223 R300_ALLOC_ATOM(gpu_flush, pipe_framebuffer_state); 224 R300_ALLOC_ATOM(scissor_state, pipe_scissor_state); 225 R300_ALLOC_ATOM(rs_block_state, r300_rs_block); 226 R300_ALLOC_ATOM(fs_constants, r300_constant_buffer); 227 R300_ALLOC_ATOM(vs_constants, r300_constant_buffer); 228 if (!r300->screen->caps.has_tcl) { 229 R300_ALLOC_ATOM(vertex_stream_state, r300_vertex_stream_state); 230 } 231 232 /* Some non-CSO atoms don't use the state pointer. */ 233 r300->fb_state_pipelined.allow_null_state = TRUE; 234 r300->fs_rc_constant_state.allow_null_state = TRUE; 235 r300->pvs_flush.allow_null_state = TRUE; 236 r300->query_start.allow_null_state = TRUE; 237 r300->texture_cache_inval.allow_null_state = TRUE; 238 239 /* Some states must be marked as dirty here to properly set up 240 * hardware in the first command stream. */ 241 r300_mark_atom_dirty(r300, &r300->invariant_state); 242 r300_mark_atom_dirty(r300, &r300->pvs_flush); 243 r300_mark_atom_dirty(r300, &r300->vap_invariant_state); 244 r300_mark_atom_dirty(r300, &r300->texture_cache_inval); 245 r300_mark_atom_dirty(r300, &r300->textures_state); 246 247 return TRUE; 248 } 249 250 /* Not every state tracker calls every driver function before the first draw 251 * call and we must initialize the command buffers somehow. */ 252 static void r300_init_states(struct pipe_context *pipe) 253 { 254 struct r300_context *r300 = r300_context(pipe); 255 struct pipe_blend_color bc = {{0}}; 256 struct pipe_clip_state cs = {{{0}}}; 257 struct pipe_scissor_state ss = {0}; 258 struct r300_gpu_flush *gpuflush = 259 (struct r300_gpu_flush*)r300->gpu_flush.state; 260 struct r300_vap_invariant_state *vap_invariant = 261 (struct r300_vap_invariant_state*)r300->vap_invariant_state.state; 262 struct r300_invariant_state *invariant = 263 (struct r300_invariant_state*)r300->invariant_state.state; 264 265 CB_LOCALS; 266 267 pipe->set_blend_color(pipe, &bc); 268 pipe->set_clip_state(pipe, &cs); 269 pipe->set_scissor_state(pipe, &ss); 270 271 /* Initialize the GPU flush. */ 272 { 273 BEGIN_CB(gpuflush->cb_flush_clean, 6); 274 275 /* Flush and free renderbuffer caches. */ 276 OUT_CB_REG(R300_RB3D_DSTCACHE_CTLSTAT, 277 R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS | 278 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D); 279 OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT, 280 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | 281 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); 282 283 /* Wait until the GPU is idle. 284 * This fixes random pixels sometimes appearing probably caused 285 * by incomplete rendering. */ 286 OUT_CB_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN); 287 END_CB; 288 } 289 290 /* Initialize the VAP invariant state. */ 291 { 292 BEGIN_CB(vap_invariant->cb, r300->vap_invariant_state.size); 293 OUT_CB_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff); 294 OUT_CB_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); 295 OUT_CB_32F(1.0); 296 OUT_CB_32F(1.0); 297 OUT_CB_32F(1.0); 298 OUT_CB_32F(1.0); 299 OUT_CB_REG(R300_VAP_PSC_SGN_NORM_CNTL, R300_SGN_NORM_NO_ZERO); 300 301 if (r300->screen->caps.is_r500) { 302 OUT_CB_REG(R500_VAP_TEX_TO_COLOR_CNTL, 0); 303 } 304 END_CB; 305 } 306 307 /* Initialize the invariant state. */ 308 { 309 BEGIN_CB(invariant->cb, r300->invariant_state.size); 310 OUT_CB_REG(R300_GB_SELECT, 0); 311 OUT_CB_REG(R300_FG_FOG_BLEND, 0); 312 OUT_CB_REG(R300_GA_OFFSET, 0); 313 OUT_CB_REG(R300_SU_TEX_WRAP, 0); 314 OUT_CB_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF); 315 OUT_CB_REG(R300_SU_DEPTH_OFFSET, 0); 316 OUT_CB_REG(R300_SC_EDGERULE, 0x2DA49525); 317 OUT_CB_REG(R300_SC_SCREENDOOR, 0xffffff); 318 319 if (r300->screen->caps.is_rv350) { 320 OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x01010101); 321 OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFEFEFEFE); 322 } 323 324 if (r300->screen->caps.is_r500) { 325 OUT_CB_REG(R500_GA_COLOR_CONTROL_PS3, 0); 326 OUT_CB_REG(R500_SU_TEX_WRAP_PS3, 0); 327 } 328 END_CB; 329 } 330 331 /* Initialize the hyperz state. */ 332 { 333 struct r300_hyperz_state *hyperz = 334 (struct r300_hyperz_state*)r300->hyperz_state.state; 335 BEGIN_CB(&hyperz->cb_flush_begin, r300->hyperz_state.size); 336 OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT, 337 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE); 338 OUT_CB_REG(R300_ZB_BW_CNTL, 0); 339 OUT_CB_REG(R300_ZB_DEPTHCLEARVALUE, 0); 340 OUT_CB_REG(R300_SC_HYPERZ, R300_SC_HYPERZ_ADJ_2); 341 342 if (r300->screen->caps.is_r500 || 343 (r300->screen->caps.is_rv350 && 344 r300->screen->info.drm_minor >= 6)) { 345 OUT_CB_REG(R300_GB_Z_PEQ_CONFIG, 0); 346 } 347 END_CB; 348 } 349 } 350 351 struct pipe_context* r300_create_context(struct pipe_screen* screen, 352 void *priv) 353 { 354 struct r300_context* r300 = CALLOC_STRUCT(r300_context); 355 struct r300_screen* r300screen = r300_screen(screen); 356 struct radeon_winsys *rws = r300screen->rws; 357 358 if (!r300) 359 return NULL; 360 361 r300->rws = rws; 362 r300->screen = r300screen; 363 364 r300->context.screen = screen; 365 r300->context.priv = priv; 366 367 r300->context.destroy = r300_destroy_context; 368 369 util_slab_create(&r300->pool_transfers, 370 sizeof(struct pipe_transfer), 64, 371 UTIL_SLAB_SINGLETHREADED); 372 373 r300->cs = rws->cs_create(rws); 374 if (r300->cs == NULL) 375 goto fail; 376 377 if (!r300screen->caps.has_tcl) { 378 /* Create a Draw. This is used for SW TCL. */ 379 r300->draw = draw_create(&r300->context); 380 if (r300->draw == NULL) 381 goto fail; 382 /* Enable our renderer. */ 383 draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300)); 384 /* Disable converting points/lines to triangles. */ 385 draw_wide_line_threshold(r300->draw, 10000000.f); 386 draw_wide_point_threshold(r300->draw, 10000000.f); 387 draw_wide_point_sprites(r300->draw, FALSE); 388 draw_enable_line_stipple(r300->draw, TRUE); 389 draw_enable_point_sprites(r300->draw, FALSE); 390 } 391 392 if (!r300_setup_atoms(r300)) 393 goto fail; 394 395 r300_init_blit_functions(r300); 396 r300_init_flush_functions(r300); 397 r300_init_query_functions(r300); 398 r300_init_state_functions(r300); 399 r300_init_resource_functions(r300); 400 r300_init_render_functions(r300); 401 r300_init_states(&r300->context); 402 403 r300->context.create_video_decoder = vl_create_decoder; 404 r300->context.create_video_buffer = vl_video_buffer_create; 405 406 if (r300screen->caps.has_tcl) { 407 r300->uploader = u_upload_create(&r300->context, 256 * 1024, 4, 408 PIPE_BIND_INDEX_BUFFER); 409 } 410 411 r300->blitter = util_blitter_create(&r300->context); 412 if (r300->blitter == NULL) 413 goto fail; 414 r300->blitter->draw_rectangle = r300_blitter_draw_rectangle; 415 416 rws->cs_set_flush_callback(r300->cs, r300_flush_callback, r300); 417 418 /* The KIL opcode needs the first texture unit to be enabled 419 * on r3xx-r4xx. In order to calm down the CS checker, we bind this 420 * dummy texture there. */ 421 if (!r300->screen->caps.is_r500) { 422 struct pipe_resource *tex; 423 struct pipe_resource rtempl = {{0}}; 424 struct pipe_sampler_view vtempl = {{0}}; 425 426 rtempl.target = PIPE_TEXTURE_2D; 427 rtempl.format = PIPE_FORMAT_I8_UNORM; 428 rtempl.bind = PIPE_BIND_SAMPLER_VIEW; 429 rtempl.usage = PIPE_USAGE_IMMUTABLE; 430 rtempl.width0 = 1; 431 rtempl.height0 = 1; 432 rtempl.depth0 = 1; 433 tex = screen->resource_create(screen, &rtempl); 434 435 u_sampler_view_default_template(&vtempl, tex, tex->format); 436 437 r300->texkill_sampler = (struct r300_sampler_view*) 438 r300->context.create_sampler_view(&r300->context, tex, &vtempl); 439 440 pipe_resource_reference(&tex, NULL); 441 } 442 443 if (r300screen->caps.has_tcl) { 444 struct pipe_resource vb; 445 memset(&vb, 0, sizeof(vb)); 446 vb.target = PIPE_BUFFER; 447 vb.format = PIPE_FORMAT_R8_UNORM; 448 vb.bind = PIPE_BIND_VERTEX_BUFFER; 449 vb.usage = PIPE_USAGE_IMMUTABLE; 450 vb.width0 = sizeof(float) * 16; 451 vb.height0 = 1; 452 vb.depth0 = 1; 453 454 r300->dummy_vb.buffer = screen->resource_create(screen, &vb); 455 } 456 457 { 458 struct pipe_depth_stencil_alpha_state dsa; 459 memset(&dsa, 0, sizeof(dsa)); 460 dsa.depth.writemask = 1; 461 462 r300->dsa_decompress_zmask = 463 r300->context.create_depth_stencil_alpha_state(&r300->context, 464 &dsa); 465 } 466 467 r300->hyperz_time_of_last_flush = os_time_get(); 468 469 /* Print driver info. */ 470 #ifdef DEBUG 471 { 472 #else 473 if (DBG_ON(r300, DBG_INFO)) { 474 #endif 475 fprintf(stderr, 476 "r300: DRM version: %d.%d.%d, Name: %s, ID: 0x%04x, GB: %d, Z: %d\n" 477 "r300: GART size: %d MB, VRAM size: %d MB\n" 478 "r300: AA compression RAM: %s, Z compression RAM: %s, HiZ RAM: %s\n", 479 r300->screen->info.drm_major, 480 r300->screen->info.drm_minor, 481 r300->screen->info.drm_patchlevel, 482 screen->get_name(screen), 483 r300->screen->info.pci_id, 484 r300->screen->info.r300_num_gb_pipes, 485 r300->screen->info.r300_num_z_pipes, 486 r300->screen->info.gart_size >> 20, 487 r300->screen->info.vram_size >> 20, 488 "YES", /* XXX really? */ 489 r300->screen->caps.zmask_ram ? "YES" : "NO", 490 r300->screen->caps.hiz_ram ? "YES" : "NO"); 491 } 492 493 return &r300->context; 494 495 fail: 496 r300_destroy_context(&r300->context); 497 return NULL; 498 } 499
