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  /external/llvm/lib/Target/SystemZ/
SystemZCallingConv.cpp 1 //===-- SystemZCallingConv.cpp - Calling conventions for SystemZ ----------===//
15 const unsigned SystemZ::ArgGPRs[SystemZ::NumArgGPRs] = {
16 SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D
19 const unsigned SystemZ::ArgFPRs[SystemZ::NumArgFPRs] =
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SystemZInstrInfo.cpp 1 //===-- SystemZInstrInfo.cpp - SystemZ instruction information ------------===//
10 // This file contains the SystemZ implementation of the TargetInstrInfo class.
34 if (SystemZ::GRH32BitRegClass.contains(Reg))
36 assert(SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32");
44 : SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP),
63 HighRegOp.setReg(RI.getSubReg(HighRegOp.getReg(), SystemZ::subreg_h64));
64 LowRegOp.setReg(RI.getSubReg(LowRegOp.getReg(), SystemZ::subreg_l64));
96 unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset);
133 DestReg, SrcReg, SystemZ::LR, 32
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SystemZShortenInst.cpp 24 #define DEBUG_TYPE "systemz-shorten-inst"
33 return "SystemZ Instruction Shortening";
77 unsigned thisSubRegIdx = (SystemZ::GRH32BitRegClass.contains(Reg) ?
78 SystemZ::subreg_h32 : SystemZ::subreg_l32);
79 unsigned otherSubRegIdx = (thisSubRegIdx == SystemZ::subreg_l32 ?
80 SystemZ::subreg_h32 : SystemZ::subreg_l32);
82 &SystemZ::GR64BitRegClass);
88 if (SystemZ::isImmLL(Imm))
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SystemZLongBranch.cpp 1 //===-- SystemZLongBranch.cpp - Branch lengthening for SystemZ ------------===//
35 // On SystemZ, long branches are only needed for functions bigger than 64k,
69 #define DEBUG_TYPE "systemz-long-branch"
138 return "SystemZ Long Branch";
215 case SystemZ::J:
219 case SystemZ::BRC:
223 case SystemZ::BRCT:
224 case SystemZ::BRCTG:
228 case SystemZ::CRJ:
229 case SystemZ::CLRJ
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SystemZAsmPrinter.cpp 1 //===-- SystemZAsmPrinter.cpp - SystemZ LLVM assembly printer -------------===//
10 // Streams SystemZ assembly language and associated data, in the form of
108 case SystemZ::Return:
109 LoweredMI = MCInstBuilder(SystemZ::BR).addReg(SystemZ::R14D);
112 case SystemZ::CallBRASL:
113 LoweredMI = MCInstBuilder(SystemZ::BRASL)
114 .addReg(SystemZ::R14D)
118 case SystemZ::CallBASR:
119 LoweredMI = MCInstBuilder(SystemZ::BASR
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SystemZFrameLowering.cpp 1 //===-- SystemZFrameLowering.cpp - Frame lowering for SystemZ -------------===//
28 { SystemZ::R2D, 0x10 },
29 { SystemZ::R3D, 0x18 },
30 { SystemZ::R4D, 0x20 },
31 { SystemZ::R5D, 0x28 },
32 { SystemZ::R6D, 0x30 },
33 { SystemZ::R7D, 0x38 },
34 { SystemZ::R8D, 0x40 },
35 { SystemZ::R9D, 0x48 },
36 { SystemZ::R10D, 0x50 }
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SystemZRegisterInfo.cpp 1 //===-- SystemZRegisterInfo.cpp - SystemZ register information ------------===//
23 : SystemZGenRegisterInfo(SystemZ::R14D) {}
43 Reserved.set(SystemZ::R11D);
44 Reserved.set(SystemZ::R11L);
45 Reserved.set(SystemZ::R11H);
46 Reserved.set(SystemZ::R10Q);
50 Reserved.set(SystemZ::R15D);
51 Reserved.set(SystemZ::R15L);
52 Reserved.set(SystemZ::R15H);
53 Reserved.set(SystemZ::R14Q)
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SystemZElimCompare.cpp 29 #define DEBUG_TYPE "systemz-elim-compare"
63 return "SystemZ Comparison Elimination";
95 if ((*SI)->isLiveIn(SystemZ::CC))
109 case SystemZ::LR:
110 case SystemZ::LGR:
111 case SystemZ::LGFR:
112 case SystemZ::LTR:
113 case SystemZ::LTGR:
114 case SystemZ::LTGFR:
115 case SystemZ::LER
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SystemZISelLowering.cpp 1 //===-- SystemZISelLowering.cpp - SystemZ DAG lowering implementation -----===//
28 #define DEBUG_TYPE "systemz-lower"
91 addRegisterClass(MVT::i32, &SystemZ::GRX32BitRegClass);
93 addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass);
94 addRegisterClass(MVT::i64, &SystemZ::GR64BitRegClass);
96 addRegisterClass(MVT::f32, &SystemZ::VR32BitRegClass);
97 addRegisterClass(MVT::f64, &SystemZ::VR64BitRegClass);
99 addRegisterClass(MVT::f32, &SystemZ::FP32BitRegClass);
100 addRegisterClass(MVT::f64, &SystemZ::FP64BitRegClass);
102 addRegisterClass(MVT::f128, &SystemZ::FP128BitRegClass)
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Makefile 1 ##===- lib/Target/SystemZ/Makefile -------------------------*- Makefile -*-===##
12 TARGET = SystemZ
SystemZLDCleanup.cpp 37 return "SystemZ Local Dynamic TLS Access Clean-up";
93 case SystemZ::TLS_LDCALL:
118 TII->get(TargetOpcode::COPY), SystemZ::R2D)
133 *TLSBaseAddrReg = RegInfo.createVirtualRegister(&SystemZ::GR64BitRegClass);
139 .addReg(SystemZ::R2D);
SystemZISelDAGToDAG.cpp 1 //===-- SystemZISelDAGToDAG.cpp - A dag to dag inst selector for SystemZ --===//
10 // This file defines an instruction selector for the SystemZ target.
22 #define DEBUG_TYPE "systemz-isel"
342 return "SystemZ DAG->DAG Pattern Instruction Selection";
745 if (RxSBG.Opcode == SystemZ::RNSBG)
769 if (RxSBG.Opcode != SystemZ::RNSBG)
811 if (RxSBG.Opcode != SystemZ::RNSBG) {
843 if (RxSBG.Opcode == SystemZ::RNSBG) {
870 if (RxSBG.Opcode == SystemZ::RNSBG || Opcode == ISD::SRA) {
898 return CurDAG->getTargetInsertSubreg(SystemZ::subreg_l32
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SystemZRegisterInfo.h 1 //===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===//
13 #include "SystemZ.h"
21 namespace SystemZ {
30 } // end namespace SystemZ
SystemZCallingConv.h 1 //===-- SystemZCallingConv.h - Calling conventions for SystemZ --*- C++ -*-===//
17 namespace SystemZ {
23 } // end namespace SystemZ
SystemZ.h 1 //==- SystemZ.h - Top-Level Interface for SystemZ representation -*- C++ -*-==//
11 // the LLVM SystemZ backend.
25 namespace SystemZ {
133 } // end namespace SystemZ
SystemZSelectionDAGInfo.cpp 1 //===-- SystemZSelectionDAGInfo.cpp - SystemZ SelectionDAG Info -----------===//
19 #define DEBUG_TYPE "systemz-selectiondag-info"
180 DAG.getConstant(SystemZ::IPM_CC, DL, MVT::i32));
221 DAG.getConstant(SystemZ::CCMASK_SRST, DL, MVT::i32),
222 DAG.getConstant(SystemZ::CCMASK_SRST_FOUND, DL, MVT::i32),
SystemZISelLowering.h 1 //===-- SystemZISelLowering.h - SystemZ DAG lowering interface --*- C++ -*-===//
10 // This file defines the interfaces that SystemZ uses to lower LLVM code into a
18 #include "SystemZ.h"
416 return SystemZ::R6D;
423 return SystemZ::R7D;
  /external/llvm/lib/Target/SystemZ/MCTargetDesc/
SystemZMCTargetDesc.cpp 1 //===-- SystemZMCTargetDesc.cpp - SystemZ target descriptions -------------===//
32 SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L,
33 SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L,
34 SystemZ::R8L, SystemZ::R9L, SystemZ::R10L, SystemZ::R11L
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SystemZMCFixups.h 1 //===-- SystemZMCFixups.h - SystemZ-specific fixup entries ------*- C++ -*-===//
16 namespace SystemZ {
27 } // end namespace SystemZ
SystemZMCObjectWriter.cpp 1 //===-- SystemZMCObjectWriter.cpp - SystemZ ELF writer --------------------===//
56 case SystemZ::FK_390_PC16DBL: return ELF::R_390_PC16DBL;
57 case SystemZ::FK_390_PC32DBL: return ELF::R_390_PC32DBL;
85 case SystemZ::FK_390_TLS_CALL: return ELF::R_390_TLS_LDCALL;
95 case SystemZ::FK_390_TLS_CALL: return ELF::R_390_TLS_GDCALL;
103 case SystemZ::FK_390_PC16DBL: return ELF::R_390_PLT16DBL;
104 case SystemZ::FK_390_PC32DBL: return ELF::R_390_PLT32DBL;
125 if (IsPCRel && Kind == SystemZ::FK_390_PC32DBL)
142 if (IsPCRel && Kind == SystemZ::FK_390_PC32DBL)
SystemZMCAsmBackend.cpp 1 //===-- SystemZMCAsmBackend.cpp - SystemZ assembler backend ---------------===//
28 case SystemZ::FK_390_PC16DBL:
29 case SystemZ::FK_390_PC32DBL:
32 case SystemZ::FK_390_TLS_CALL:
48 return SystemZ::NumTargetFixupKinds;
62 llvm_unreachable("SystemZ does do not have assembler relaxation");
73 const static MCFixupKindInfo Infos[SystemZ::NumTargetFixupKinds] = {
SystemZMCCodeEmitter.cpp 1 //===-- SystemZMCCodeEmitter.cpp - Convert SystemZ code to machine code ---===//
93 SystemZ::FK_390_PC16DBL, 2, false);
99 SystemZ::FK_390_PC32DBL, 2, false);
105 SystemZ::FK_390_PC16DBL, 2, true);
111 SystemZ::FK_390_PC32DBL, 2, true);
238 (MCFixupKind)SystemZ::FK_390_TLS_CALL));
  /external/clang/include/clang/Basic/
TargetBuiltins.h 179 /// \brief SystemZ builtins
180 namespace SystemZ {
  /external/clang/lib/Sema/
SemaChecking.cpp 592 case llvm::Triple::systemz:
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  /external/clang/lib/CodeGen/
CGBuiltin.cpp     [all...]

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