1 //===-- SystemZMCTargetDesc.cpp - SystemZ target descriptions -------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "SystemZMCTargetDesc.h" 11 #include "InstPrinter/SystemZInstPrinter.h" 12 #include "SystemZMCAsmInfo.h" 13 #include "llvm/MC/MCCodeGenInfo.h" 14 #include "llvm/MC/MCInstrInfo.h" 15 #include "llvm/MC/MCRegisterInfo.h" 16 #include "llvm/MC/MCStreamer.h" 17 #include "llvm/MC/MCSubtargetInfo.h" 18 #include "llvm/Support/TargetRegistry.h" 19 20 using namespace llvm; 21 22 #define GET_INSTRINFO_MC_DESC 23 #include "SystemZGenInstrInfo.inc" 24 25 #define GET_SUBTARGETINFO_MC_DESC 26 #include "SystemZGenSubtargetInfo.inc" 27 28 #define GET_REGINFO_MC_DESC 29 #include "SystemZGenRegisterInfo.inc" 30 31 const unsigned SystemZMC::GR32Regs[16] = { 32 SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L, 33 SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L, 34 SystemZ::R8L, SystemZ::R9L, SystemZ::R10L, SystemZ::R11L, 35 SystemZ::R12L, SystemZ::R13L, SystemZ::R14L, SystemZ::R15L 36 }; 37 38 const unsigned SystemZMC::GRH32Regs[16] = { 39 SystemZ::R0H, SystemZ::R1H, SystemZ::R2H, SystemZ::R3H, 40 SystemZ::R4H, SystemZ::R5H, SystemZ::R6H, SystemZ::R7H, 41 SystemZ::R8H, SystemZ::R9H, SystemZ::R10H, SystemZ::R11H, 42 SystemZ::R12H, SystemZ::R13H, SystemZ::R14H, SystemZ::R15H 43 }; 44 45 const unsigned SystemZMC::GR64Regs[16] = { 46 SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, 47 SystemZ::R4D, SystemZ::R5D, SystemZ::R6D, SystemZ::R7D, 48 SystemZ::R8D, SystemZ::R9D, SystemZ::R10D, SystemZ::R11D, 49 SystemZ::R12D, SystemZ::R13D, SystemZ::R14D, SystemZ::R15D 50 }; 51 52 const unsigned SystemZMC::GR128Regs[16] = { 53 SystemZ::R0Q, 0, SystemZ::R2Q, 0, 54 SystemZ::R4Q, 0, SystemZ::R6Q, 0, 55 SystemZ::R8Q, 0, SystemZ::R10Q, 0, 56 SystemZ::R12Q, 0, SystemZ::R14Q, 0 57 }; 58 59 const unsigned SystemZMC::FP32Regs[16] = { 60 SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S, 61 SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S, 62 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S, 63 SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S 64 }; 65 66 const unsigned SystemZMC::FP64Regs[16] = { 67 SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D, 68 SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D, 69 SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D, 70 SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D 71 }; 72 73 const unsigned SystemZMC::FP128Regs[16] = { 74 SystemZ::F0Q, SystemZ::F1Q, 0, 0, 75 SystemZ::F4Q, SystemZ::F5Q, 0, 0, 76 SystemZ::F8Q, SystemZ::F9Q, 0, 0, 77 SystemZ::F12Q, SystemZ::F13Q, 0, 0 78 }; 79 80 const unsigned SystemZMC::VR32Regs[32] = { 81 SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S, 82 SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S, 83 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S, 84 SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S, 85 SystemZ::F16S, SystemZ::F17S, SystemZ::F18S, SystemZ::F19S, 86 SystemZ::F20S, SystemZ::F21S, SystemZ::F22S, SystemZ::F23S, 87 SystemZ::F24S, SystemZ::F25S, SystemZ::F26S, SystemZ::F27S, 88 SystemZ::F28S, SystemZ::F29S, SystemZ::F30S, SystemZ::F31S 89 }; 90 91 const unsigned SystemZMC::VR64Regs[32] = { 92 SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D, 93 SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D, 94 SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D, 95 SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D, 96 SystemZ::F16D, SystemZ::F17D, SystemZ::F18D, SystemZ::F19D, 97 SystemZ::F20D, SystemZ::F21D, SystemZ::F22D, SystemZ::F23D, 98 SystemZ::F24D, SystemZ::F25D, SystemZ::F26D, SystemZ::F27D, 99 SystemZ::F28D, SystemZ::F29D, SystemZ::F30D, SystemZ::F31D 100 }; 101 102 const unsigned SystemZMC::VR128Regs[32] = { 103 SystemZ::V0, SystemZ::V1, SystemZ::V2, SystemZ::V3, 104 SystemZ::V4, SystemZ::V5, SystemZ::V6, SystemZ::V7, 105 SystemZ::V8, SystemZ::V9, SystemZ::V10, SystemZ::V11, 106 SystemZ::V12, SystemZ::V13, SystemZ::V14, SystemZ::V15, 107 SystemZ::V16, SystemZ::V17, SystemZ::V18, SystemZ::V19, 108 SystemZ::V20, SystemZ::V21, SystemZ::V22, SystemZ::V23, 109 SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, 110 SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 111 }; 112 113 unsigned SystemZMC::getFirstReg(unsigned Reg) { 114 static unsigned Map[SystemZ::NUM_TARGET_REGS]; 115 static bool Initialized = false; 116 if (!Initialized) { 117 for (unsigned I = 0; I < 16; ++I) { 118 Map[GR32Regs[I]] = I; 119 Map[GRH32Regs[I]] = I; 120 Map[GR64Regs[I]] = I; 121 Map[GR128Regs[I]] = I; 122 Map[FP128Regs[I]] = I; 123 } 124 for (unsigned I = 0; I < 32; ++I) { 125 Map[VR32Regs[I]] = I; 126 Map[VR64Regs[I]] = I; 127 Map[VR128Regs[I]] = I; 128 } 129 } 130 assert(Reg < SystemZ::NUM_TARGET_REGS); 131 return Map[Reg]; 132 } 133 134 static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI, 135 const Triple &TT) { 136 MCAsmInfo *MAI = new SystemZMCAsmInfo(TT); 137 MCCFIInstruction Inst = 138 MCCFIInstruction::createDefCfa(nullptr, 139 MRI.getDwarfRegNum(SystemZ::R15D, true), 140 SystemZMC::CFAOffsetFromInitialSP); 141 MAI->addInitialFrameState(Inst); 142 return MAI; 143 } 144 145 static MCInstrInfo *createSystemZMCInstrInfo() { 146 MCInstrInfo *X = new MCInstrInfo(); 147 InitSystemZMCInstrInfo(X); 148 return X; 149 } 150 151 static MCRegisterInfo *createSystemZMCRegisterInfo(const Triple &TT) { 152 MCRegisterInfo *X = new MCRegisterInfo(); 153 InitSystemZMCRegisterInfo(X, SystemZ::R14D); 154 return X; 155 } 156 157 static MCSubtargetInfo * 158 createSystemZMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { 159 return createSystemZMCSubtargetInfoImpl(TT, CPU, FS); 160 } 161 162 static MCCodeGenInfo *createSystemZMCCodeGenInfo(const Triple &TT, 163 Reloc::Model RM, 164 CodeModel::Model CM, 165 CodeGenOpt::Level OL) { 166 MCCodeGenInfo *X = new MCCodeGenInfo(); 167 168 // Static code is suitable for use in a dynamic executable; there is no 169 // separate DynamicNoPIC model. 170 if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC) 171 RM = Reloc::Static; 172 173 // For SystemZ we define the models as follows: 174 // 175 // Small: BRASL can call any function and will use a stub if necessary. 176 // Locally-binding symbols will always be in range of LARL. 177 // 178 // Medium: BRASL can call any function and will use a stub if necessary. 179 // GOT slots and locally-defined text will always be in range 180 // of LARL, but other symbols might not be. 181 // 182 // Large: Equivalent to Medium for now. 183 // 184 // Kernel: Equivalent to Medium for now. 185 // 186 // This means that any PIC module smaller than 4GB meets the 187 // requirements of Small, so Small seems like the best default there. 188 // 189 // All symbols bind locally in a non-PIC module, so the choice is less 190 // obvious. There are two cases: 191 // 192 // - When creating an executable, PLTs and copy relocations allow 193 // us to treat external symbols as part of the executable. 194 // Any executable smaller than 4GB meets the requirements of Small, 195 // so that seems like the best default. 196 // 197 // - When creating JIT code, stubs will be in range of BRASL if the 198 // image is less than 4GB in size. GOT entries will likewise be 199 // in range of LARL. However, the JIT environment has no equivalent 200 // of copy relocs, so locally-binding data symbols might not be in 201 // the range of LARL. We need the Medium model in that case. 202 if (CM == CodeModel::Default) 203 CM = CodeModel::Small; 204 else if (CM == CodeModel::JITDefault) 205 CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium; 206 X->initMCCodeGenInfo(RM, CM, OL); 207 return X; 208 } 209 210 static MCInstPrinter *createSystemZMCInstPrinter(const Triple &T, 211 unsigned SyntaxVariant, 212 const MCAsmInfo &MAI, 213 const MCInstrInfo &MII, 214 const MCRegisterInfo &MRI) { 215 return new SystemZInstPrinter(MAI, MII, MRI); 216 } 217 218 extern "C" void LLVMInitializeSystemZTargetMC() { 219 // Register the MCAsmInfo. 220 TargetRegistry::RegisterMCAsmInfo(TheSystemZTarget, 221 createSystemZMCAsmInfo); 222 223 // Register the MCCodeGenInfo. 224 TargetRegistry::RegisterMCCodeGenInfo(TheSystemZTarget, 225 createSystemZMCCodeGenInfo); 226 227 // Register the MCCodeEmitter. 228 TargetRegistry::RegisterMCCodeEmitter(TheSystemZTarget, 229 createSystemZMCCodeEmitter); 230 231 // Register the MCInstrInfo. 232 TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget, 233 createSystemZMCInstrInfo); 234 235 // Register the MCRegisterInfo. 236 TargetRegistry::RegisterMCRegInfo(TheSystemZTarget, 237 createSystemZMCRegisterInfo); 238 239 // Register the MCSubtargetInfo. 240 TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget, 241 createSystemZMCSubtargetInfo); 242 243 // Register the MCAsmBackend. 244 TargetRegistry::RegisterMCAsmBackend(TheSystemZTarget, 245 createSystemZMCAsmBackend); 246 247 // Register the MCInstPrinter. 248 TargetRegistry::RegisterMCInstPrinter(TheSystemZTarget, 249 createSystemZMCInstPrinter); 250 } 251
