| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIInstrInfo.h | 33 virtual void copyPhysReg(MachineBasicBlock &MBB,
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| AMDGPUMCInstLower.cpp | 67 const MachineBasicBlock *MBB = MI->getParent();
70 while (I != MBB->end() && I->isInsideBundle()) {
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| SIInstrInfo.cpp | 37 SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
48 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg)
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| AMDGPUInstrInfo.h | 45 MachineBasicBlock &MBB) const;
73 virtual void copyPhysReg(MachineBasicBlock &MBB,
78 void storeRegToStackSlot(MachineBasicBlock &MBB,
83 void loadRegFromStackSlot(MachineBasicBlock &MBB,
114 void insertNoop(MachineBasicBlock &MBB,
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| /external/llvm/lib/Target/ARM/ |
| ARMConstantIslandPass.cpp | 289 bool BBHasFallthrough(MachineBasicBlock *MBB);
328 void computeBlockSize(MachineBasicBlock *MBB);
350 MachineBasicBlock *MBB = &*MBBI;
351 unsigned MBBId = MBB->getNumber();
598 for (MachineBasicBlock &MBB : *MF) {
599 auto MI = MBB.getLastNonDebugInstr();
600 if (MI == MBB.end())
630 MF->insert(std::next(MachineFunction::iterator(MBB)), JumpTableBB);
640 LastCorrectlyNumberedBB = &MBB;
650 bool ARMConstantIslands::BBHasFallthrough(MachineBasicBlock *MBB) {
[all...] |
| ARMBaseInstrInfo.h | 125 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
129 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
130 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
170 void copyToCPSR(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
173 void copyFromCPSR(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
177 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
181 void storeRegToStackSlot(MachineBasicBlock &MBB,
187 void loadRegFromStackSlot(MachineBasicBlock &MBB,
195 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
231 const MachineBasicBlock *MBB,
[all...] |
| ARMInstrInfo.cpp | 119 MachineBasicBlock &MBB = *MI->getParent();
124 MIB = BuildMI(MBB, MI, DL, get(ARM::MOV_ga_pcrel_ldr), Reg)
127 MachineMemOperand *MMO = MBB.getParent()->getMachineMemOperand(
128 MachinePointerInfo::getGOT(*MBB.getParent()), Flag, 4, 4);
130 MIB = BuildMI(MBB, MI, DL, get(ARM::LDRi12), Reg);
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| /external/llvm/lib/Target/Mips/ |
| MipsConstantIslandPass.cpp | 391 void computeBlockSize(MachineBasicBlock *MBB);
599 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
601 MachineFunction::iterator MBBI = MBB->getIterator();
603 if (std::next(MBBI) == MBB->getParent()->end())
607 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
608 E = MBB->succ_end(); I != E; ++I)
668 MachineBasicBlock &MBB = *MBBI;
670 // If this block doesn't fall through into the next MBB, then this is
672 if (!BBHasFallthrough(&MBB))
673 WaterList.push_back(&MBB);
[all...] |
| /external/llvm/lib/CodeGen/ |
| LiveDebugVariables.cpp | 91 bool dominates(MachineBasicBlock *MBB) {
94 return LBlocks.count(MBB) != 0 || LS.dominates(DL, MBB);
131 /// insertDebugValue - Insert a DBG_VALUE into MBB at Idx for LocNo.
132 void insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo,
513 MachineBasicBlock *MBB = &*MFI;
514 for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
521 SlotIndex Idx = MBBI == MBB->begin() ?
522 LIS->getMBBStartIdx(MBB)
[all...] |
| RegisterScavenging.cpp | 52 if (!MBB)
56 for (const auto &LI : MBB->liveins())
60 const MachineFunction &MF = *MBB->getParent();
66 void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
67 MachineFunction &MF = *mbb->getParent();
81 if (!MBB) {
89 MBB = mbb;
161 if (MBBI == MBB->begin()) {
171 MBBI = MBB->begin()
[all...] |
| MachineBlockPlacement.cpp | 194 for (MachineBasicBlock *MBB : *this)
195 MBB->dump();
310 /// \brief Helper to print the name of a MBB.
322 /// \brief Helper to print the number of a MBB.
346 for (MachineBasicBlock *MBB : Chain) {
351 for (MachineBasicBlock *Succ : MBB->successors()) {
529 for (MachineBasicBlock *MBB : WorkList) {
530 BlockChain &SuccChain = *BlockToChain[MBB];
532 DEBUG(dbgs() << " " << getBlockName(MBB) << " -> Already merged!\n");
537 BlockFrequency CandidateFreq = MBFI->getBlockFreq(MBB);
[all...] |
| SlotIndexes.cpp | 45 // Iterate over all MBBs, and within each MBB all MIs, keeping the MI
59 "Index -> MBB mapping non-empty at initial numbering?");
61 "MBB -> Index mapping non-empty at initial numbering?");
74 MachineBasicBlock *mbb = &*mbbItr; local
76 // Insert an index for the MBB start.
79 for (MachineBasicBlock::iterator miItr = mbb->begin(), miEnd = mbb->end();
96 MBBRanges[mbb->getNumber()].first = blockStartIndex;
97 MBBRanges[mbb->getNumber()].second = SlotIndex(&indexList.back(),
99 idx2MBBMap.push_back(IdxMBBPair(blockStartIndex, mbb));
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ConditionOptimizer.cpp | 101 MachineInstr *findSuitableCompare(MachineBasicBlock *MBB);
139 MachineBasicBlock *MBB) {
140 MachineBasicBlock::iterator I = MBB->getFirstTerminator();
141 if (I == MBB->end())
148 for (MachineBasicBlock::iterator B = MBB->begin(); I != B;) {
194 DEBUG(dbgs() << "Flags not defined in BB#" << MBB->getNumber() << '\n');
259 MachineBasicBlock *const MBB = CmpMI->getParent();
262 BuildMI(*MBB, CmpMI, CmpMI->getDebugLoc(), TII->get(Opc))
271 MachineInstr *BrMI = MBB->getFirstTerminator();
274 BuildMI(*MBB, BrMI, BrMI->getDebugLoc(), TII->get(AArch64::Bcc)
[all...] |
| AArch64ConditionalCompares.cpp | 182 /// Find the compare instruction in MBB that controls the conditional branch.
184 MachineInstr *findConvertibleCompare(MachineBasicBlock *MBB);
186 /// Return true if all non-terminator instructions in MBB can be safely
188 bool canSpeculateInstrs(MachineBasicBlock *MBB, const MachineInstr *CmpMI);
199 /// If the sub-CFG headed by MBB can be cmp-converted, initialize the
201 bool canConvert(MachineBasicBlock *MBB);
220 // PHI operands come in (VReg, MBB) pairs.
222 MachineBasicBlock *MBB = I.getOperand(oi + 1).getMBB();
224 if (MBB == Head) {
228 if (MBB == CmpBB)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 57 /// Analyze the branching code at the end of MBB, returning
82 bool AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
87 /// Remove the branching code at the end of the specific MBB.
90 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
102 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
111 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
128 /// of specified accumulated instruction latencies in the specified MBB to
133 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
144 void copyPhysReg(MachineBasicBlock &MBB,
153 void storeRegToStackSlot(MachineBasicBlock &MBB,
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600InstrInfo.cpp | 47 R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
67 buildDefaultInstruction(MBB, MI, AMDGPU::MOV,
74 MachineInstr *NewMI = buildDefaultInstruction(MBB, MI, AMDGPU::MOV,
82 bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB,
669 findFirstPredicateSetterFrom(MachineBasicBlock &MBB,
671 while (I != MBB.begin()) {
692 R600InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
700 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
701 if (I == MBB.end())
713 while (I != MBB.begin() && std::prev(I)->getOpcode() == AMDGPU::JUMP)
[all...] |
| AMDGPUFrameLowering.cpp | 109 MachineBasicBlock &MBB) const {}
112 MachineBasicBlock &MBB) const {
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| R600EmitClauseMarkers.cpp | 227 MakeALUClause(MachineBasicBlock &MBB, MachineBasicBlock::iterator I) {
232 for (MachineBasicBlock::iterator E = MBB.end(); I != E; ++I) {
276 BuildMI(MBB, ClauseHead, MBB.findDebugLoc(ClauseHead), TII->get(Opcode))
305 MachineBasicBlock &MBB = *BB;
306 MachineBasicBlock::iterator I = MBB.begin();
309 for (MachineBasicBlock::iterator E = MBB.end(); I != E;) {
311 I = MakeALUClause(MBB, I);
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| SIFixControlFlowLiveIntervals.cpp | 70 for (const MachineBasicBlock &MBB : MF) {
71 for (const MachineInstr &MI : MBB) {
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| R600ExpandSpecialInstrs.cpp | 75 MachineBasicBlock &MBB = *BB;
76 MachineBasicBlock::iterator I = MBB.begin();
77 while (I != MBB.end()) {
86 MachineInstr *Mov = TII->buildMovInstr(&MBB, I,
105 MachineInstr *PredSet = TII->buildDefaultInstruction(MBB, I,
133 BMI = TII->buildDefaultInstruction(MBB, I, AMDGPU::INTERP_XY,
162 BMI = TII->buildDefaultInstruction(MBB, I, AMDGPU::INTERP_ZW,
186 BMI = TII->buildDefaultInstruction(MBB, I, AMDGPU::INTERP_LOAD_P0,
210 TII->buildSlotOfVectorInstruction(MBB, &MI, Chan, SubDstReg);
328 TII->buildDefaultInstruction(MBB, I, Opcode, DstReg, Src0, Src1)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCTOCRegDeps.cpp | 115 bool processBlock(MachineBasicBlock &MBB) {
118 for (auto &MI : MBB) {
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| PPCCTRLoops.cpp | 605 static bool verifyCTRBranch(MachineBasicBlock *MBB,
612 if (I == MBB->begin()) {
613 Visited.insert(MBB);
619 Visited.insert(MBB);
620 if (I == MBB->end())
624 for (MachineBasicBlock::iterator IE = MBB->begin();; --I) {
632 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " (" <<
633 MBB->getFullName() << ") instruction " << *I <<
650 if (MachineFunction::iterator(MBB) == MBB->getParent()->begin())
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyPeephole.cpp | 53 for (auto &MBB : MF)
54 for (auto &MI : MBB)
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| /external/llvm/include/llvm/CodeGen/ |
| MachineFunction.h | 64 void addNodeToList(MachineBasicBlock* MBB);
65 void removeNodeFromList(MachineBasicBlock* MBB);
66 void deleteNode(MachineBasicBlock *MBB);
117 // numbered and this vector keeps track of the mapping from ID's to MBB's.
288 /// basic block can be found by using the MBB::getBlockNumber method, this
300 /// getNumBlockIDs - Return the number of MBB ID's allocated.
305 /// recomputes them. This guarantees that the MBB numbers are sequential,
375 void push_back (MachineBasicBlock *MBB) { BasicBlocks.push_back (MBB); }
376 void push_front(MachineBasicBlock *MBB) { BasicBlocks.push_front(MBB);
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 52 MachineBasicBlock *MBB = MI->getParent();
53 MachineFunction &MF = *MBB->getParent();
58 MBB->insert(MI, EarlierMI);
88 MachineBasicBlock *MBB = MI->getParent();
89 MachineFunction &MF = *MBB->getParent();
164 // DestReg before MBBI in MBB. Use LowLowOpcode when both DestReg and SrcReg
168 void SystemZInstrInfo::emitGRX32Move(MachineBasicBlock &MBB,
183 BuildMI(MBB, MBBI, DL, get(LowLowOpcode), DestReg)
188 BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)
247 bool SystemZInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
[all...] |
