| /external/llvm/lib/CodeGen/ |
| TargetInstrInfo.cpp | 64 void TargetInstrInfo::insertNoop(MachineBasicBlock &MBB,
105 MachineBasicBlock *MBB = Tail->getParent();
107 // Remove all the old successors of MBB from the CFG.
108 while (!MBB->succ_empty())
109 MBB->removeSuccessor(MBB->succ_begin());
111 // Remove all the dead instructions from the end of MBB.
112 MBB->erase(Tail, MBB->end());
114 // If MBB isn't immediately before MBB, insert a branch to it
[all...] |
| TwoAddressInstructionPass.cpp | 84 MachineBasicBlock *MBB;
227 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot();
247 if (!KillMI || KillMI->getParent() != MBB || KillMI == MI ||
304 MBB->remove(MI);
305 MBB->insert(KillPos, MI);
340 MachineInstr *Def = getSingleDef(TmpReg, MBB, MRI);
353 /// in the MBB that defines the specified register and the two-address
362 if (MI->getParent() != MBB || MI->isDebugValue())
492 MachineInstr *findOnlyInterestingUse(unsigned Reg, MachineBasicBlock *MBB,
501 if (UseMI.getParent() != MBB)
[all...] |
| IfConversion.cpp | 201 void AnalyzeBlock(MachineBasicBlock *MBB, std::vector<IfcvtToken*> &Tokens);
767 void IfConverter::AnalyzeBlock(MachineBasicBlock *MBB,
770 BBState(MachineBasicBlock *BB) : MBB(BB), SuccsAnalyzed(false) {}
771 MachineBasicBlock *MBB;
773 /// This flag is true if MBB's successors have been analyzed.
777 // Push MBB to the stack.
778 SmallVector<BBState, 16> BBStack(1, MBB);
782 MachineBasicBlock *BB = State.MBB;
[all...] |
| RegisterCoalescer.cpp | 135 /// Coalesce copies in the specified MBB, putting
137 void copyCoalesceInMBB(MachineBasicBlock *MBB);
292 static bool isSplitEdge(const MachineBasicBlock *MBB) {
293 if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
296 for (const auto &MI : *MBB) {
709 MachineBasicBlock *MBB = DefMI->getParent();
721 MBB->insert(Pos, NewMI);
722 MBB->erase(DefMI);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | 38 const MachineBasicBlock &MBB = *MI->getParent();
39 const MachineFunction *MF = MBB.getParent();
92 bool AArch64InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
98 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
99 if (I == MBB.end())
110 if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
134 if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
146 if (SecondLastInst && I != MBB.begin() && isUnpredicatedTerminator(--I))
220 unsigned AArch64InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
221 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr()
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIInstrInfo.cpp | 312 SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
368 BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DestReg)
375 BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), AMDGPU::VCC)
380 BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32))
389 BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg)
411 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg)
460 MachineInstrBuilder Builder = BuildMI(MBB, MI, DL,
539 void SIInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
545 MachineFunction *MF = MBB.getParent();
548 DebugLoc DL = MBB.findDebugLoc(MI)
[all...] |
| AMDILCFGStructurizer.cpp | 213 int getSCCNum(MachineBasicBlock *MBB) const;
215 bool hasBackEdge(MachineBasicBlock *MBB) const;
217 bool isRetiredBlock(MachineBasicBlock *MBB) const;
218 bool isActiveLoophead(MachineBasicBlock *MBB) const;
223 bool needMigrateBlock(MachineBasicBlock *MBB) const;
231 void insertInstrEnd(MachineBasicBlock *MBB, int NewOpcode,
233 MachineInstr *insertInstrBefore(MachineBasicBlock *MBB, int NewOpcode,
238 void insertCondBranchBefore(MachineBasicBlock *MBB,
241 void insertCondBranchEnd(MachineBasicBlock *MBB, int NewOpcode, int RegNum);
247 static void setTrueBranch(MachineInstr *MI, MachineBasicBlock *MBB);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMAsmPrinter.cpp | [all...] |
| ARMExpandPseudoInsts.cpp | 60 bool ExpandMI(MachineBasicBlock &MBB,
62 bool ExpandMBB(MachineBasicBlock &MBB);
68 void ExpandMOV32BitImm(MachineBasicBlock &MBB,
379 MachineBasicBlock &MBB = *MI.getParent();
386 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
444 MachineBasicBlock &MBB = *MI.getParent();
451 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
497 MachineBasicBlock &MBB = *MI.getParent();
505 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
587 MachineBasicBlock &MBB = *MI.getParent()
[all...] |
| ARMLoadStoreOptimizer.cpp | 130 void moveLiveRegsBefore(const MachineBasicBlock &MBB,
133 void UpdateBaseRegUses(MachineBasicBlock &MBB,
137 MachineInstr *CreateLoadStoreMulti(MachineBasicBlock &MBB,
141 MachineInstr *CreateLoadStoreDouble(MachineBasicBlock &MBB,
147 bool FixInvalidRegPairOp(MachineBasicBlock &MBB,
152 bool LoadStoreMultipleOpti(MachineBasicBlock &MBB);
153 bool MergeReturnIntoLDM(MachineBasicBlock &MBB);
154 bool CombineMovBx(MachineBasicBlock &MBB);
440 ARMLoadStoreOpt::UpdateBaseRegUses(MachineBasicBlock &MBB,
448 for (; MBBI != MBB.end(); ++MBBI)
[all...] |
| ARMConstantIslandPass.cpp | 289 bool BBHasFallthrough(MachineBasicBlock *MBB);
328 void computeBlockSize(MachineBasicBlock *MBB);
350 MachineBasicBlock *MBB = &*MBBI;
351 unsigned MBBId = MBB->getNumber();
598 for (MachineBasicBlock &MBB : *MF) {
599 auto MI = MBB.getLastNonDebugInstr();
600 if (MI == MBB.end())
630 MF->insert(std::next(MachineFunction::iterator(MBB)), JumpTableBB);
640 LastCorrectlyNumberedBB = &MBB;
650 bool ARMConstantIslands::BBHasFallthrough(MachineBasicBlock *MBB) {
[all...] |
| ARMBaseInstrInfo.cpp | 278 ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
285 MachineBasicBlock::iterator I = MBB.end();
286 if (I == MBB.begin())
301 if (I == MBB.begin())
346 while (DI != MBB.end()) {
357 if (I == MBB.begin())
369 unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
370 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
371 if (I == MBB.end())
381 I = MBB.end()
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.cpp | [all...] |
| HexagonFrameLowering.cpp | 232 bool needsStackFrame(const MachineBasicBlock &MBB, const BitVector &CSR) {
233 for (auto &I : MBB) {
268 /// Returns true if MBB has a machine instructions that indicates a tail call
270 bool hasTailCall(const MachineBasicBlock &MBB) {
271 MachineBasicBlock::const_iterator I = MBB.getLastNonDebugInstr();
276 /// Returns true if MBB contains an instruction that returns.
277 bool hasReturn(const MachineBasicBlock &MBB) {
278 for (auto I = MBB.getFirstTerminator(), E = MBB.end(); I != E; ++I)
395 MachineBasicBlock &MBB) const
[all...] |
| HexagonHardwareLoops.cpp | 218 MachineBasicBlock *MBB, MachineLoop *L,
225 MachineBasicBlock *MBB, MachineLoop *L,
573 MachineBasicBlock *MBB = IV_Phi->getOperand(i+1).getMBB();
574 if (MBB == Preheader)
576 else if (MBB == Latch)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsConstantIslandPass.cpp | 391 void computeBlockSize(MachineBasicBlock *MBB);
599 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
601 MachineFunction::iterator MBBI = MBB->getIterator();
603 if (std::next(MBBI) == MBB->getParent()->end())
607 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
608 E = MBB->succ_end(); I != E; ++I)
668 MachineBasicBlock &MBB = *MBBI;
670 // If this block doesn't fall through into the next MBB, then this is
672 if (!BBHasFallthrough(&MBB))
673 WaterList.push_back(&MBB);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCAsmPrinter.cpp | 338 const MachineBasicBlock &MBB = *MI.getParent();
342 if (MII == MBB.end() || MII->isCall() ||
[all...] |
| PPCInstrInfo.cpp | 420 void PPCInstrInfo::insertNoop(MachineBasicBlock &MBB,
434 BuildMI(MBB, MI, DL, get(Opcode));
445 bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
452 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
453 if (I == MBB.end())
463 if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
525 if (SecondLastInst && I != MBB.begin() &&
607 unsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
608 MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
609 if (I == MBB.end()
[all...] |
| PPCFrameLowering.cpp | 328 const MachineBasicBlock &MBB = *BI;
329 if (!MBB.isReturnBlock())
331 const MachineInstr &Ret = MBB.back();
559 bool PPCFrameLowering::findScratchRegister(MachineBasicBlock *MBB,
568 // If MBB is an entry or exit block, use R0 as the scratch register
569 if ((UseAtEnd && MBB->isReturnBlock()) ||
570 (!UseAtEnd && (&MBB->getParent()->front() == MBB)))
573 RS.enterBasicBlock(MBB);
575 if (UseAtEnd && !MBB->empty())
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 52 MachineBasicBlock *MBB = MI->getParent();
53 MachineFunction &MF = *MBB->getParent();
58 MBB->insert(MI, EarlierMI);
88 MachineBasicBlock *MBB = MI->getParent();
89 MachineFunction &MF = *MBB->getParent();
164 // DestReg before MBBI in MBB. Use LowLowOpcode when both DestReg and SrcReg
168 void SystemZInstrInfo::emitGRX32Move(MachineBasicBlock &MBB,
183 BuildMI(MBB, MBBI, DL, get(LowLowOpcode), DestReg)
188 BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)
247 bool SystemZInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FloatingPoint.cpp | 121 static unsigned calcLiveInMask(MachineBasicBlock *MBB) {
123 for (const auto &LI : MBB->liveins()) {
134 MachineBasicBlock *MBB; // Current basic block
153 // Set up our stack model to match the incoming registers to MBB.
206 DebugLoc dl = I == MBB->end() ? DebugLoc() : I->getDebugLoc();
221 BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg);
226 DebugLoc dl = I == MBB->end() ? DebugLoc() : I->getDebugLoc();
230 BuildMI(*MBB, I, dl, TII->get(X86::LD_Frr)).addReg(STReg);
257 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB);
277 void setKillFlags(MachineBasicBlock &MBB) const
[all...] |
| X86MCInstLower.cpp | [all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| AsmPrinter.cpp | 845 for (auto &MBB : *MF) {
847 EmitBasicBlockStart(MBB);
848 for (auto &MI : MBB) {
910 EmitBasicBlockEnd(MBB);
[all...] |
| /external/llvm/lib/CodeGen/MIRParser/ |
| MIParser.cpp | 106 bool parseStandaloneMBB(MachineBasicBlock *&MBB);
114 bool parseBasicBlock(MachineBasicBlock &MBB);
115 bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
116 bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
130 bool parseMBBReference(MachineBasicBlock *&MBB);
361 auto *MBB = MF.CreateMachineBasicBlock(BB);
362 MF.insert(MF.end(), MBB);
363 bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;
368 MBB->setAlignment(Alignment);
370 MBB->setHasAddressTaken()
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGISel.cpp | 328 // When new basic blocks are inserted and the edges from MBB to its successors
333 MachineBasicBlock *MBB) const {
587 for (const auto &MBB : *MF) {
591 for (const auto &MI : MBB) {
720 FuncInfo->MBB->getBasicBlock()->getName().str());
728 BlockNumber = FuncInfo->MBB->getNumber();
730 (MF->getName() + ":" + FuncInfo->MBB->getBasicBlock()->getName()).str();
[all...] |
