| /external/v8/src/regexp/arm64/ |
| regexp-macro-assembler-arm64.cc | 248 Operand(current_input_offset(), SXTW));
321 Operand(capture_start_offset, SXTW));
324 Operand(capture_length, SXTW));
327 Operand(current_input_offset(), SXTW));
331 Operand(capture_length, SXTW));
368 Operand(capture_length, SXTW));
371 __ Cmp(current_input_offset().X(), Operand(current_input_offset(), SXTW));
393 __ Add(x0, input_end(), Operand(capture_start_offset, SXTW));
397 __ Add(x1, input_end(), Operand(current_input_offset(), SXTW));
399 __ Sub(x1, x1, Operand(capture_length, SXTW));
[all...] |
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AddressingModes.h | 47 SXTW,
66 case AArch64_AM::SXTW: return "sxtw";
133 case 6: return AArch64_AM::SXTW;
149 /// 110 ==> sxtw
160 case AArch64_AM::SXTW: return 6; break;
196 /// 110 ==> sxtw
|
| /external/v8/test/cctest/ |
| test-disasm-arm64.cc | 137 COMPARE(dci(0x93407c00), "sxtw x0, w0");
157 COMPARE(Mov(x16, Operand(x20, SXTW, 3)), "sbfiz x16, x20, #3, #32");
397 COMPARE(add(x24, x25, Operand(x26, SXTW, 1)), "add x24, x25, w26, sxtw #1");
423 COMPARE(sub(x24, x25, Operand(x26, SXTW, 1)), "sub x24, x25, w26, sxtw #1");
534 COMPARE(sxtw(x8, x9), "sxtw x8, w9");
537 COMPARE(sxtw(x4, w5), "sxtw x4, w5")
[all...] |
| test-assembler-arm64.cc | 315 __ Mvn(x15, Operand(w2, SXTW, 4));
573 __ Orr(x12, x0, Operand(x1, SXTW, 2));
670 __ Orn(x12, x0, Operand(x1, SXTW, 2));
739 __ And(x12, x0, Operand(x1, SXTW, 2));
880 __ Bic(x12, x0, Operand(x1, SXTW, 2));
1008 __ Eor(x12, x0, Operand(x1, SXTW, 2));
1077 __ Eon(x12, x0, Operand(x1, SXTW, 2));
[all...] |
| /external/vixl/test/ |
| test-disasm-a64.cc | 142 COMPARE(dci(0x93407c00), "sxtw x0, w0");
162 COMPARE(Mov(x16, Operand(x17, SXTW, 3)), "sbfiz x16, x17, #3, #32");
396 COMPARE(add(x24, x25, Operand(x26, SXTW, 1)), "add x24, x25, w26, sxtw #1");
422 COMPARE(sub(x24, x25, Operand(x26, SXTW, 1)), "sub x24, x25, w26, sxtw #1");
544 COMPARE(sxtw(x8, x9), "sxtw x8, w9");
547 COMPARE(sxtw(x4, w5), "sxtw x4, w5")
[all...] |
| test-assembler-a64.cc | 305 __ Mvn(x15, Operand(w2, SXTW, 4));
564 __ Orr(x12, x0, Operand(x1, SXTW, 2));
658 __ Orn(x12, x0, Operand(x1, SXTW, 2));
725 __ And(x12, x0, Operand(x1, SXTW, 2));
863 __ Bic(x12, x0, Operand(x1, SXTW, 2));
987 __ Eor(x12, x0, Operand(x1, SXTW, 2));
1054 __ Eon(x12, x0, Operand(x1, SXTW, 2));
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| addsub.s | 102 .irp extend, UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW, SXTX
|
| /external/v8/src/arm64/ |
| codegen-arm64.cc | 445 __ Ldrh(result, MemOperand(string, index, SXTW, 1));
449 __ Ldrb(result, MemOperand(string, index, SXTW));
|
| assembler-arm64-inl.h | 480 DCHECK((extend == UXTW) || (extend == SXTW) || (extend == SXTX));
533 DCHECK((extend_ == UXTW) || (extend_ == SXTW) || (extend_ == SXTX));
[all...] |
| constants-arm64.h | 345 SXTW = 6,
[all...] |
| simulator-arm64.cc | 993 case SXTW:
[all...] |
| assembler-arm64.cc | [all...] |
| /art/compiler/optimizing/ |
| common_arm64.h | 285 case HArm64DataProcWithShifterOp::kSXTW: return vixl::SXTW;
|
| code_generator_arm64.cc | [all...] |
| /external/v8/src/crankshaft/arm64/ |
| lithium-codegen-arm64.cc | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | 681 Addr.setExtendType(AArch64_AM::SXTW);
765 Addr.setExtendType(AArch64_AM::SXTW);
823 Addr.setExtendType(AArch64_AM::SXTW);
[all...] |
| AArch64ISelDAGToDAG.cpp | 379 return AArch64_AM::SXTW;
787 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl,
859 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl,
871 SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl,
[all...] |
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | 1004 ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW ||
1039 return (ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW) &&
[all...] |
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 512 SXTW,
[all...] |
| /external/vixl/src/vixl/a64/ |
| assembler-a64.cc | 391 VIXL_ASSERT((extend == UXTW) || (extend == SXTW) || (extend == SXTX));
442 VIXL_ASSERT((extend_ == UXTW) || (extend_ == SXTW) || (extend_ == SXTX));
[all...] |
| constants-a64.h | 282 SXTW = 6,
[all...] |
| simulator-a64.cc | 370 case SXTW:
[all...] |
