| /external/llvm/test/CodeGen/AMDGPU/ |
| schedule-fs-loop-nested-if.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=cayman -stress-sched -verify-misched -verify-machineinstrs
55 call void @llvm.R600.store.swizzle(<4 x float> %34, i32 0, i32 0)
79 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| schedule-fs-loop-nested.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=cayman -stress-sched -verify-misched -verify-machineinstrs
54 call void @llvm.R600.store.swizzle(<4 x float> %37, i32 0, i32 0)
86 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| schedule-if-2.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=cayman -stress-sched -verify-misched -verify-machineinstrs
69 call void @llvm.R600.store.swizzle(<4 x float> %47, i32 0, i32 0)
92 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| sgpr-control-flow.ll | 43 %tid = call i32 @llvm.r600.read.tidig.x() #0
80 %tid = call i32 @llvm.r600.read.tidig.x() #0
103 declare i32 @llvm.r600.read.tidig.x() #0
|
| trunc.ll | 2 ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
4 declare i32 @llvm.r600.read.tidig.x() nounwind readnone
91 %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
|
| llvm.AMDGPU.class.ll | 5 declare i32 @llvm.r600.read.tidig.x() #1
136 %tid = call i32 @llvm.r600.read.tidig.x() #1
154 %tid = call i32 @llvm.r600.read.tidig.x() #1
174 %tid = call i32 @llvm.r600.read.tidig.x() #1
294 %tid = call i32 @llvm.r600.read.tidig.x() #1
310 %tid = call i32 @llvm.r600.read.tidig.x() #1
325 %tid = call i32 @llvm.r600.read.tidig.x() #1
342 %tid = call i32 @llvm.r600.read.tidig.x() #1
362 %tid = call i32 @llvm.r600.read.tidig.x() #1
385 %tid = call i32 @llvm.r600.read.tidig.x() #
[all...] |
| indirect-addressing-si.ll | 90 %id = call i32 @llvm.r600.read.tidig.x() #1
155 %id = call i32 @llvm.r600.read.tidig.x() #1
170 %id = call i32 @llvm.r600.read.tidig.x() #1
177 declare i32 @llvm.r600.read.tidig.x() #1
|
| kcache-fold.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
47 call void @llvm.R600.store.swizzle(<4 x float> %39, i32 0, i32 0)
95 call void @llvm.R600.store.swizzle(<4 x float> %39, i32 0, i32 0)
100 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| literals.ll | 1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
|
| llvm.AMDGPU.abs.ll | 3 ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
|
| llvm.AMDGPU.bfi.ll | 3 ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
|
| llvm.AMDGPU.read.workdim.ll | 3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
|
| sampler-resource-id.ll | 1 ; RUN: llc -march=r600 -mcpu=juniper < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
|
| schedule-global-loads.ll | 4 declare i32 @llvm.r600.read.tidig.x() #1
|
| schedule-vs-if-nested-loop.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=cayman -stress-sched -verify-misched
88 call void @llvm.R600.store.swizzle(<4 x float> %74, i32 60, i32 1)
93 call void @llvm.R600.store.swizzle(<4 x float> %78, i32 0, i32 2)
130 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| structurize.ll | 1 ; RUN: llc < %s -march=r600 -mcpu=redwood -mattr=disable-irstructurizer | FileCheck %s
|
| structurize1.ll | 1 ; RUN: llc < %s -march=r600 -mattr=disable-ifcvt -mcpu=redwood | FileCheck %s
|
| udiv.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG %s
|
| /external/mesa3d/src/gallium/drivers/r600/ |
| r600_pipe.c | 52 R600_ERR("r600: failed to create bo for fence objects\n");
79 R600_ERR("r600: too many concurrent fences\n");
249 case R600:
305 if (rctx->chip_class == R600)
335 case CHIP_R600: return "AMD R600";
418 /* Supported except the original R600. */
421 /* R600 doesn't support per-MRT blends */
527 /* XXX: all these should be fixed, since r600 surely supports much more! */
608 strcpy(ret, "r600--");
917 fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->info.pci_id)
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUTargetMachine.cpp | 12 /// information needed to emit code for R600 and SI GPUs.
69 SchedCustomRegistry("r600", "Run R600's custom scheduler",
102 // R600 Target Machine (R600 -> Cayman)
236 // R600 Pass Setup
|
| /external/mesa3d/docs/ |
| relnotes-7.9.html | 44 <li>New, very experimental Gallium driver for R600-R700 Radeons.
53 <li>GL_ARB_depth_clamp and GL_NV_depth_clamp extensions (in nv50 and r600
55 <li>GL_ARB_half_float_vertex extension (in nvfx, r300, r600, softpipe,
57 <li>GL_EXT_draw_buffers2 (in nv50, r600, softpipe, and llvmpipe Gallium
59 <li>GL_EXT_texture_swizzle (in nvfx, r300, r600, softpipe, and llvmpipe
61 <li>GL_ATI_texture_mirror_once (in nvfx, nv50, r300, r600, softpipe, and
|
| relnotes-8.0.html | 71 <li>Removed the classic Mesa r300 and r600 drivers, which are superseded
|
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| radeonsi_pipe.c | 46 #include "r600.h"
69 R600_ERR("r600: failed to create bo for fence objects\n");
96 R600_ERR("r600: too many concurrent fences\n");
433 /* TODO: all these should be fixed, since r600 surely supports much more! */
671 fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->info.pci_id);
680 fprintf(stderr, "r600: Unsupported family %d\n", rscreen->family);
|
| /external/mesa3d/src/gallium/targets/egl-static/ |
| Makefile | 122 # r600
124 ifneq ($(findstring r600,$(GALLIUM_DRIVERS_DIRS)),)
128 $(TOP)/src/gallium/drivers/r600/libr600.a
|
| /external/drm_gralloc/radeon/ |
| radeon.h | 71 CHIP_FAMILY_R600, /* r600 */
|
