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      1 /* tc-cris.c -- Assembler code for the CRIS CPU core.
      2    Copyright (C) 2000-2014 Free Software Foundation, Inc.
      3 
      4    Contributed by Axis Communications AB, Lund, Sweden.
      5    Originally written for GAS 1.38.1 by Mikael Asker.
      6    Updates, BFDizing, GNUifying and ELF support by Hans-Peter Nilsson.
      7 
      8    This file is part of GAS, the GNU Assembler.
      9 
     10    GAS is free software; you can redistribute it and/or modify
     11    it under the terms of the GNU General Public License as published by
     12    the Free Software Foundation; either version 3, or (at your option)
     13    any later version.
     14 
     15    GAS is distributed in the hope that it will be useful,
     16    but WITHOUT ANY WARRANTY; without even the implied warranty of
     17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     18    GNU General Public License for more details.
     19 
     20    You should have received a copy of the GNU General Public License
     21    along with GAS; see the file COPYING.  If not, write to the
     22    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
     23    MA 02110-1301, USA.  */
     24 
     25 #include "as.h"
     26 #include "safe-ctype.h"
     27 #include "subsegs.h"
     28 #include "opcode/cris.h"
     29 #include "dwarf2dbg.h"
     30 
     31 /* Conventions used here:
     32    Generally speaking, pointers to binutils types such as "fragS" and
     33    "expressionS" get parameter and variable names ending in "P", such as
     34    "fragP", to harmonize with the rest of the binutils code.  Other
     35    pointers get a "p" suffix, such as "bufp".  Any function or type-name
     36    that could clash with a current or future binutils or GAS function get
     37    a "cris_" prefix.  */
     38 
     39 #define SYNTAX_RELAX_REG_PREFIX "no_register_prefix"
     40 #define SYNTAX_ENFORCE_REG_PREFIX "register_prefix"
     41 #define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore"
     42 #define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore"
     43 #define REGISTER_PREFIX_CHAR '$'
     44 
     45 /* True for expressions where getting X_add_symbol and X_add_number is
     46    enough to get the "base" and "offset"; no need to make_expr_symbol.
     47    It's not enough to check if X_op_symbol is NULL; that misses unary
     48    operations like O_uminus.  */
     49 #define SIMPLE_EXPR(EXP) \
     50  ((EXP)->X_op == O_constant || (EXP)->X_op == O_symbol)
     51 
     52 /* Like in ":GOT", ":GOTOFF" etc.  Other ports use '@', but that's in
     53    line_separator_chars for CRIS, so we avoid it.  */
     54 #define RELOC_SUFFIX_CHAR ':'
     55 
     56 /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only.
     57    Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL.  */
     58 enum cris_insn_kind
     59 {
     60   CRIS_INSN_NORMAL, CRIS_INSN_NONE, CRIS_INSN_BRANCH, CRIS_INSN_MUL
     61 };
     62 
     63 /* An instruction will have one of these prefixes.
     64    Although the same bit-pattern, we handle BDAP with an immediate
     65    expression (eventually quick or [pc+]) different from when we only have
     66    register expressions.  */
     67 enum prefix_kind
     68 {
     69   PREFIX_NONE, PREFIX_BDAP_IMM, PREFIX_BDAP, PREFIX_BIAP, PREFIX_DIP,
     70   PREFIX_PUSH
     71 };
     72 
     73 /* The prefix for an instruction.  */
     74 struct cris_prefix
     75 {
     76   enum prefix_kind kind;
     77   int base_reg_number;
     78   unsigned int opcode;
     79 
     80   /* There might be an expression to be evaluated, like I in [rN+I].  */
     81   expressionS expr;
     82 
     83   /* If there's an expression, we might need a relocation.  Here's the
     84      type of what relocation to start relaxaton with.
     85      The relocation is assumed to start immediately after the prefix insn,
     86      so we don't provide an offset.  */
     87   enum bfd_reloc_code_real reloc;
     88 };
     89 
     90 /* The description of the instruction being assembled.  */
     91 struct cris_instruction
     92 {
     93   /* If CRIS_INSN_NONE, then this insn is of zero length.  */
     94   enum cris_insn_kind insn_type;
     95 
     96   /* If a special register was mentioned, this is its description, else
     97      it is NULL.  */
     98   const struct cris_spec_reg *spec_reg;
     99 
    100   unsigned int opcode;
    101 
    102   /* An insn may have at most one expression; theoretically there could be
    103      another in its prefix (but I don't see how that could happen).  */
    104   expressionS expr;
    105 
    106   /* The expression might need a relocation.  Here's one to start
    107      relaxation with.  */
    108   enum bfd_reloc_code_real reloc;
    109 
    110   /* The size in bytes of an immediate expression, or zero if
    111      nonapplicable.  */
    112   int imm_oprnd_size;
    113 };
    114 
    115 enum cris_archs
    116 {
    117   arch_cris_unknown,
    118   arch_crisv0, arch_crisv3, arch_crisv8, arch_crisv10,
    119   arch_cris_any_v0_v10, arch_crisv32, arch_cris_common_v10_v32
    120 };
    121 
    122 static enum cris_archs cris_arch_from_string (char **);
    123 static int cris_insn_ver_valid_for_arch (enum cris_insn_version_usage,
    124 					 enum cris_archs);
    125 
    126 static void cris_process_instruction (char *, struct cris_instruction *,
    127 				      struct cris_prefix *);
    128 static int get_bwd_size_modifier (char **, int *);
    129 static int get_bw_size_modifier (char **, int *);
    130 static int get_gen_reg (char **, int *);
    131 static int get_spec_reg (char **, const struct cris_spec_reg **);
    132 static int get_sup_reg (char **, int *);
    133 static int get_autoinc_prefix_or_indir_op (char **, struct cris_prefix *,
    134 					   int *, int *, int *,
    135 					   expressionS *);
    136 static int get_3op_or_dip_prefix_op (char **, struct cris_prefix *);
    137 static int cris_get_expression (char **, expressionS *);
    138 static int get_flags (char **, int *);
    139 static void gen_bdap (int, expressionS *);
    140 static int branch_disp (int);
    141 static void gen_cond_branch_32 (char *, char *, fragS *, symbolS *, symbolS *,
    142 				long int);
    143 static void cris_number_to_imm (char *, long, int, fixS *, segT);
    144 static void s_syntax (int);
    145 static void s_cris_file (int);
    146 static void s_cris_loc (int);
    147 static void s_cris_arch (int);
    148 static void s_cris_dtpoff (int);
    149 
    150 /* Get ":GOT", ":GOTOFF", ":PLT" etc. suffixes.  */
    151 static void cris_get_reloc_suffix (char **, bfd_reloc_code_real_type *,
    152 				   expressionS *);
    153 static unsigned int cris_get_specified_reloc_size (bfd_reloc_code_real_type);
    154 
    155 /* All the .syntax functions.  */
    156 static void cris_force_reg_prefix (void);
    157 static void cris_relax_reg_prefix (void);
    158 static void cris_sym_leading_underscore (void);
    159 static void cris_sym_no_leading_underscore (void);
    160 static char *cris_insn_first_word_frag (void);
    161 
    162 /* Handle to the opcode hash table.  */
    163 static struct hash_control *op_hash = NULL;
    164 
    165 /* If we target cris-axis-linux-gnu (as opposed to generic cris-axis-elf),
    166    we default to no underscore and required register-prefixes.  The
    167    difference is in the default values.  */
    168 #ifdef TE_LINUX
    169 #define DEFAULT_CRIS_AXIS_LINUX_GNU TRUE
    170 #else
    171 #define DEFAULT_CRIS_AXIS_LINUX_GNU FALSE
    172 #endif
    173 
    174 /* Whether we demand that registers have a `$' prefix.  Default here.  */
    175 static bfd_boolean demand_register_prefix = DEFAULT_CRIS_AXIS_LINUX_GNU;
    176 
    177 /* Whether global user symbols have a leading underscore.  Default here.  */
    178 static bfd_boolean symbols_have_leading_underscore
    179   = !DEFAULT_CRIS_AXIS_LINUX_GNU;
    180 
    181 /* Whether or not we allow PIC, and expand to PIC-friendly constructs.  */
    182 static bfd_boolean pic = FALSE;
    183 
    184 /* Whether or not we allow TLS suffixes.  For the moment, we always do.  */
    185 static const bfd_boolean tls = TRUE;
    186 
    187 /* If we're configured for "cris", default to allow all v0..v10
    188    instructions and register names.  */
    189 #ifndef DEFAULT_CRIS_ARCH
    190 #define DEFAULT_CRIS_ARCH cris_any_v0_v10
    191 #endif
    192 
    193 /* No whitespace in the CONCAT2 parameter list.  */
    194 static enum cris_archs cris_arch = XCONCAT2 (arch_,DEFAULT_CRIS_ARCH);
    195 
    196 const pseudo_typeS md_pseudo_table[] =
    197 {
    198   {"dword", cons, 4},
    199   {"dtpoffd", s_cris_dtpoff, 4},
    200   {"syntax", s_syntax, 0},
    201   {"file", s_cris_file, 0},
    202   {"loc", s_cris_loc, 0},
    203   {"arch", s_cris_arch, 0},
    204   {NULL, 0, 0}
    205 };
    206 
    207 static int warn_for_branch_expansion = 0;
    208 
    209 /* Whether to emit error when a MULS/MULU could be located last on a
    210    cache-line.  */
    211 static int err_for_dangerous_mul_placement
    212  = (XCONCAT2 (arch_,DEFAULT_CRIS_ARCH) != arch_crisv32);
    213 
    214 const char cris_comment_chars[] = ";";
    215 
    216 /* This array holds the chars that only start a comment at the beginning of
    217    a line.  If the line seems to have the form '# 123 filename'
    218    .line and .file directives will appear in the pre-processed output.  */
    219 /* Note that input_file.c hand-checks for '#' at the beginning of the
    220    first line of the input file.  This is because the compiler outputs
    221    #NO_APP at the beginning of its output.  */
    222 /* Also note that slash-star will always start a comment.  */
    223 const char line_comment_chars[] = "#";
    224 const char line_separator_chars[] = "@";
    225 
    226 /* Now all floating point support is shut off.  See md_atof.  */
    227 const char EXP_CHARS[] = "";
    228 const char FLT_CHARS[] = "";
    229 
    230 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
    231 		       2		 1		   0
    232       ---/ /--+-----------------+-----------------+-----------------+
    233 	      |	 what state ?	|	     how long ?		    |
    234       ---/ /--+-----------------+-----------------+-----------------+
    235 
    236    The "how long" bits are 00 = byte, 01 = word, 10 = dword (long).
    237    Not all lengths are legit for a given value of (what state).
    238 
    239    Groups for CRIS address relaxing:
    240 
    241    1. Bcc (pre-V32)
    242       length: byte, word, 10-byte expansion
    243 
    244    2. BDAP
    245       length: byte, word, dword
    246 
    247    3. MULS/MULU
    248       Not really a relaxation (no infrastructure to get delay-slots
    249       right), just an alignment and placement checker for the v10
    250       multiply/cache-bug.
    251 
    252    4. Bcc (V32 and later)
    253       length: byte, word, 14-byte expansion
    254 
    255    5. Bcc (V10+V32)
    256       length: byte, word, error
    257 
    258    6. BA (V32)
    259       length: byte, word, dword
    260 
    261    7. LAPC (V32)
    262       length: byte, dword
    263   */
    264 
    265 #define STATE_COND_BRANCH           (1)
    266 #define STATE_BASE_PLUS_DISP_PREFIX (2)
    267 #define STATE_MUL		    (3)
    268 #define STATE_COND_BRANCH_V32       (4)
    269 #define STATE_COND_BRANCH_COMMON    (5)
    270 #define STATE_ABS_BRANCH_V32	    (6)
    271 #define STATE_LAPC		    (7)
    272 #define STATE_COND_BRANCH_PIC       (8)
    273 
    274 #define STATE_LENGTH_MASK	    (3)
    275 #define STATE_BYTE		    (0)
    276 #define STATE_WORD		    (1)
    277 #define STATE_DWORD		    (2)
    278 /* Symbol undefined.  */
    279 #define STATE_UNDF		    (3)
    280 #define STATE_MAX_LENGTH	    (3)
    281 
    282 /* These displacements are relative to the address following the opcode
    283    word of the instruction.  The first letter is Byte, Word.  The 2nd
    284    letter is Forward, Backward.  */
    285 
    286 #define BRANCH_BF ( 254)
    287 #define BRANCH_BB (-256)
    288 #define BRANCH_BF_V32 ( 252)
    289 #define BRANCH_BB_V32 (-258)
    290 #define BRANCH_WF (2 +  32767)
    291 #define BRANCH_WB (2 + -32768)
    292 #define BRANCH_WF_V32 (-2 + 32767)
    293 #define BRANCH_WB_V32 (-2 + -32768)
    294 
    295 #define BDAP_BF	  ( 127)
    296 #define BDAP_BB	  (-128)
    297 #define BDAP_WF	  ( 32767)
    298 #define BDAP_WB	  (-32768)
    299 
    300 #define ENCODE_RELAX(what, length) (((what) << 2) + (length))
    301 
    302 const relax_typeS md_cris_relax_table[] =
    303 {
    304   /* Error sentinel (0, 0).  */
    305   {1,	      1,	 0,  0},
    306 
    307   /* Unused (0, 1).  */
    308   {1,	      1,	 0,  0},
    309 
    310   /* Unused (0, 2).  */
    311   {1,	      1,	 0,  0},
    312 
    313   /* Unused (0, 3).  */
    314   {1,	      1,	 0,  0},
    315 
    316   /* Bcc o (1, 0).  */
    317   {BRANCH_BF, BRANCH_BB, 0,  ENCODE_RELAX (1, 1)},
    318 
    319   /* Bcc [PC+] (1, 1).  */
    320   {BRANCH_WF, BRANCH_WB, 2,  ENCODE_RELAX (1, 2)},
    321 
    322   /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
    323      (1, 2).  */
    324   {0,	      0,	 10, 0},
    325 
    326   /* Unused (1, 3).  */
    327   {1,	      1,	 0,  0},
    328 
    329   /* BDAP o (2, 0).  */
    330   {BDAP_BF,   BDAP_BB,	 0,  ENCODE_RELAX (2, 1)},
    331 
    332   /* BDAP.[bw] [PC+] (2, 1).  */
    333   {BDAP_WF,   BDAP_WB,	 2,  ENCODE_RELAX (2, 2)},
    334 
    335   /* BDAP.d [PC+] (2, 2).  */
    336   {0,	      0,	 4,  0},
    337 
    338   /* Unused (2, 3).  */
    339   {1,	      1,	 0,  0},
    340 
    341   /* MULS/MULU (3, 0).  Positions (3, 1..3) are unused.  */
    342   {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0},
    343 
    344   /* V32: Bcc o (4, 0).  */
    345   {BRANCH_BF_V32, BRANCH_BB_V32, 0,  ENCODE_RELAX (4, 1)},
    346 
    347   /* V32: Bcc [PC+] (4, 1).  */
    348   {BRANCH_WF_V32, BRANCH_WB_V32, 2,  ENCODE_RELAX (4, 2)},
    349 
    350   /* V32: BA .+12; NOP; BA32 target; NOP; Bcc .-6  (4, 2).  */
    351   {0,	      0,	 12, 0},
    352 
    353   /* Unused (4, 3).  */
    354   {1,	      1,	 0,  0},
    355 
    356   /* COMMON: Bcc o (5, 0).  The offsets are calculated as for v32.  Code
    357      should contain two nop insns (or four if offset size is large or
    358      unknown) after every label.  */
    359   {BRANCH_BF_V32, BRANCH_BB_V32, 0,  ENCODE_RELAX (5, 1)},
    360 
    361   /* COMMON: Bcc [PC+] (5, 1).  */
    362   {BRANCH_WF_V32, BRANCH_WB_V32, 2,  ENCODE_RELAX (5, 2)},
    363 
    364   /* COMMON: FIXME: ???.  Treat as error currently.  */
    365   {0,	      0,	 12, 0},
    366 
    367   /* Unused (5, 3).  */
    368   {1,	      1,	 0,  0},
    369 
    370   /* V32: BA o (6, 0).  */
    371   {BRANCH_BF_V32, BRANCH_BB_V32, 0,  ENCODE_RELAX (6, 1)},
    372 
    373   /* V32: BA.W (6, 1).  */
    374   {BRANCH_WF_V32, BRANCH_WB_V32, 2,  ENCODE_RELAX (6, 2)},
    375 
    376   /* V32: BA.D (6, 2).  */
    377   {0,	      0,	 4, 0},
    378 
    379   /* Unused (6, 3).  */
    380   {1,	      1,	 0,  0},
    381 
    382   /* LAPC: LAPCQ .+0..15*2,Rn  (7, 0).  */
    383   {14*2,   -1*2,	 0,  ENCODE_RELAX (7, 2)},
    384 
    385   /* Unused (7, 1).
    386      While there's a shorter sequence, e.g. LAPCQ + an ADDQ or SUBQ,
    387      that would affect flags, so we can't do that as it wouldn't be a
    388      proper insn expansion of LAPCQ.  This row is associated with a
    389      2-byte expansion, so it's unused rather than the next.  */
    390   {1,	      1,	 0,  0},
    391 
    392   /* LAPC: LAPC.D (7, 2).  */
    393   {0,	      0,	 4, 0},
    394 
    395   /* Unused (7, 3).  */
    396   {1,	      1,	 0,  0},
    397 
    398   /* PIC for pre-v32: Bcc o (8, 0).  */
    399   {BRANCH_BF, BRANCH_BB, 0,  ENCODE_RELAX (STATE_COND_BRANCH_PIC, 1)},
    400 
    401   /* Bcc [PC+] (8, 1).  */
    402   {BRANCH_WF, BRANCH_WB, 2,  ENCODE_RELAX (STATE_COND_BRANCH_PIC, 2)},
    403 
    404   /* 32-bit expansion, PIC (8, 2).  */
    405   {0,	      0,	 12, 0},
    406 
    407   /* Unused (8, 3).  */
    408   {1,	      1,	 0,  0}
    409 };
    410 
    411 #undef BDAP_BF
    412 #undef BDAP_BB
    413 #undef BDAP_WF
    414 #undef BDAP_WB
    415 
    416 /* Target-specific multicharacter options, not const-declared.  */
    417 struct option md_longopts[] =
    418 {
    419 #define OPTION_NO_US (OPTION_MD_BASE + 0)
    420   {"no-underscore", no_argument, NULL, OPTION_NO_US},
    421 #define OPTION_US (OPTION_MD_BASE + 1)
    422   {"underscore", no_argument, NULL, OPTION_US},
    423 #define OPTION_PIC (OPTION_US + 1)
    424   {"pic", no_argument, NULL, OPTION_PIC},
    425 #define OPTION_MULBUG_ABORT_ON (OPTION_PIC + 1)
    426   {"mul-bug-abort", no_argument, NULL, OPTION_MULBUG_ABORT_ON},
    427 #define OPTION_MULBUG_ABORT_OFF (OPTION_MULBUG_ABORT_ON + 1)
    428   {"no-mul-bug-abort", no_argument, NULL, OPTION_MULBUG_ABORT_OFF},
    429 #define OPTION_ARCH (OPTION_MULBUG_ABORT_OFF + 1)
    430   {"march", required_argument, NULL, OPTION_ARCH},
    431   {NULL, no_argument, NULL, 0}
    432 };
    433 
    434 /* Not const-declared.  */
    435 size_t md_longopts_size = sizeof (md_longopts);
    436 const char *md_shortopts = "hHN";
    437 
    438 /* At first glance, this may seems wrong and should be 4 (ba + nop); but
    439    since a short_jump must skip a *number* of long jumps, it must also be
    440    a long jump.  Here, we hope to make it a "ba [16bit_offs]" and a "nop"
    441    for the delay slot and hope that the jump table at most needs
    442    32767/4=8191 long-jumps.  A branch is better than a jump, since it is
    443    relative; we will not have a reloc to fix up somewhere.
    444 
    445    Note that we can't add relocs, because relaxation uses these fixed
    446    numbers, and md_create_short_jump is called after relaxation.  */
    447 
    448 int md_short_jump_size = 6;
    449 
    450 /* The v32 version has a delay-slot, hence two bytes longer.
    451    The pre-v32 PIC version uses a prefixed insn.  */
    452 #define cris_any_v0_v10_long_jump_size 6
    453 #define cris_any_v0_v10_long_jump_size_pic 8
    454 #define crisv32_long_jump_size 8
    455 
    456 int md_long_jump_size = XCONCAT2 (DEFAULT_CRIS_ARCH,_long_jump_size);
    457 
    458 /* Report output format.  Small changes in output format (like elf
    459    variants below) can happen until all options are parsed, but after
    460    that, the output format must remain fixed.  */
    461 
    462 const char *
    463 cris_target_format (void)
    464 {
    465   switch (OUTPUT_FLAVOR)
    466     {
    467     case bfd_target_aout_flavour:
    468       return "a.out-cris";
    469 
    470     case bfd_target_elf_flavour:
    471       if (symbols_have_leading_underscore)
    472 	return "elf32-us-cris";
    473       return "elf32-cris";
    474 
    475     default:
    476       abort ();
    477       return NULL;
    478     }
    479 }
    480 
    481 /* Return a bfd_mach_cris... value corresponding to the value of
    482    cris_arch.  */
    483 
    484 unsigned int
    485 cris_mach (void)
    486 {
    487   unsigned int retval = 0;
    488 
    489   switch (cris_arch)
    490     {
    491     case arch_cris_common_v10_v32:
    492       retval = bfd_mach_cris_v10_v32;
    493       break;
    494 
    495     case arch_crisv32:
    496       retval = bfd_mach_cris_v32;
    497       break;
    498 
    499     case arch_crisv10:
    500     case arch_cris_any_v0_v10:
    501       retval = bfd_mach_cris_v0_v10;
    502       break;
    503 
    504     default:
    505       BAD_CASE (cris_arch);
    506     }
    507 
    508   return retval;
    509 }
    510 
    511 /* We need a port-specific relaxation function to cope with sym2 - sym1
    512    relative expressions with both symbols in the same segment (but not
    513    necessarily in the same frag as this insn), for example:
    514      move.d [pc+sym2-(sym1-2)],r10
    515     sym1:
    516    The offset can be 8, 16 or 32 bits long.  */
    517 
    518 long
    519 cris_relax_frag (segT seg ATTRIBUTE_UNUSED, fragS *fragP,
    520 		 long stretch ATTRIBUTE_UNUSED)
    521 {
    522   long growth;
    523   offsetT aim = 0;
    524   symbolS *symbolP;
    525   const relax_typeS *this_type;
    526   const relax_typeS *start_type;
    527   relax_substateT next_state;
    528   relax_substateT this_state;
    529   const relax_typeS *table = TC_GENERIC_RELAX_TABLE;
    530 
    531   /* We only have to cope with frags as prepared by
    532      md_estimate_size_before_relax.  The dword cases may get here
    533      because of the different reasons that they aren't relaxable.  */
    534   switch (fragP->fr_subtype)
    535     {
    536     case ENCODE_RELAX (STATE_COND_BRANCH_PIC, STATE_DWORD):
    537     case ENCODE_RELAX (STATE_COND_BRANCH, STATE_DWORD):
    538     case ENCODE_RELAX (STATE_COND_BRANCH_V32, STATE_DWORD):
    539     case ENCODE_RELAX (STATE_COND_BRANCH_COMMON, STATE_DWORD):
    540     case ENCODE_RELAX (STATE_ABS_BRANCH_V32, STATE_DWORD):
    541     case ENCODE_RELAX (STATE_LAPC, STATE_DWORD):
    542     case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
    543       /* When we get to these states, the frag won't grow any more.  */
    544       return 0;
    545 
    546     case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
    547     case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
    548       if (fragP->fr_symbol == NULL
    549 	  || S_GET_SEGMENT (fragP->fr_symbol) != absolute_section)
    550 	as_fatal (_("internal inconsistency problem in %s: fr_symbol %lx"),
    551 		  __FUNCTION__, (long) fragP->fr_symbol);
    552       symbolP = fragP->fr_symbol;
    553       if (symbol_resolved_p (symbolP))
    554 	as_fatal (_("internal inconsistency problem in %s: resolved symbol"),
    555 		  __FUNCTION__);
    556       aim = S_GET_VALUE (symbolP);
    557       break;
    558 
    559     case ENCODE_RELAX (STATE_MUL, STATE_BYTE):
    560       /* Nothing to do here.  */
    561       return 0;
    562 
    563     default:
    564       as_fatal (_("internal inconsistency problem in %s: fr_subtype %d"),
    565 		  __FUNCTION__, fragP->fr_subtype);
    566     }
    567 
    568   /* The rest is stolen from relax_frag.  There's no obvious way to
    569      share the code, but fortunately no requirement to keep in sync as
    570      long as fragP->fr_symbol does not have its segment changed.  */
    571 
    572   this_state = fragP->fr_subtype;
    573   start_type = this_type = table + this_state;
    574 
    575   if (aim < 0)
    576     {
    577       /* Look backwards.  */
    578       for (next_state = this_type->rlx_more; next_state;)
    579 	if (aim >= this_type->rlx_backward)
    580 	  next_state = 0;
    581 	else
    582 	  {
    583 	    /* Grow to next state.  */
    584 	    this_state = next_state;
    585 	    this_type = table + this_state;
    586 	    next_state = this_type->rlx_more;
    587 	  }
    588     }
    589   else
    590     {
    591       /* Look forwards.  */
    592       for (next_state = this_type->rlx_more; next_state;)
    593 	if (aim <= this_type->rlx_forward)
    594 	  next_state = 0;
    595 	else
    596 	  {
    597 	    /* Grow to next state.  */
    598 	    this_state = next_state;
    599 	    this_type = table + this_state;
    600 	    next_state = this_type->rlx_more;
    601 	  }
    602     }
    603 
    604   growth = this_type->rlx_length - start_type->rlx_length;
    605   if (growth != 0)
    606     fragP->fr_subtype = this_state;
    607   return growth;
    608 }
    609 
    610 /* Prepare machine-dependent frags for relaxation.
    611 
    612    Called just before relaxation starts. Any symbol that is now undefined
    613    will not become defined.
    614 
    615    Return the correct fr_subtype in the frag.
    616 
    617    Return the initial "guess for fr_var" to caller.  The guess for fr_var
    618    is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
    619    or fr_var contributes to our returned value.
    620 
    621    Although it may not be explicit in the frag, pretend
    622    fr_var starts with a value.  */
    623 
    624 int
    625 md_estimate_size_before_relax (fragS *fragP, segT segment_type)
    626 {
    627   int old_fr_fix;
    628   symbolS *symbolP = fragP->fr_symbol;
    629 
    630 #define HANDLE_RELAXABLE(state)						\
    631     case ENCODE_RELAX (state, STATE_UNDF):				\
    632       if (symbolP != NULL						\
    633 	  && S_GET_SEGMENT (symbolP) == segment_type			\
    634 	  && !S_IS_WEAK (symbolP))					\
    635 	/* The symbol lies in the same segment - a relaxable		\
    636 	   case.  */							\
    637 	fragP->fr_subtype						\
    638 	  = ENCODE_RELAX (state, STATE_BYTE);				\
    639       else								\
    640 	/* Unknown or not the same segment, so not relaxable.  */	\
    641 	fragP->fr_subtype						\
    642 	  = ENCODE_RELAX (state, STATE_DWORD);				\
    643       fragP->fr_var							\
    644 	= md_cris_relax_table[fragP->fr_subtype].rlx_length;		\
    645       break
    646 
    647   old_fr_fix = fragP->fr_fix;
    648 
    649   switch (fragP->fr_subtype)
    650     {
    651       HANDLE_RELAXABLE (STATE_COND_BRANCH);
    652       HANDLE_RELAXABLE (STATE_COND_BRANCH_V32);
    653       HANDLE_RELAXABLE (STATE_COND_BRANCH_COMMON);
    654       HANDLE_RELAXABLE (STATE_COND_BRANCH_PIC);
    655       HANDLE_RELAXABLE (STATE_ABS_BRANCH_V32);
    656 
    657     case ENCODE_RELAX (STATE_LAPC, STATE_UNDF):
    658       if (symbolP != NULL
    659 	  && S_GET_SEGMENT (symbolP) == segment_type
    660 	  && !S_IS_WEAK (symbolP))
    661 	{
    662 	  /* The symbol lies in the same segment - a relaxable case.
    663 	     Check if we currently have an odd offset; we can't code
    664 	     that into the instruction.  Relaxing presumably only cause
    665 	     multiple-of-two changes, so we should only need to adjust
    666 	     for that here.  */
    667 	  bfd_vma target_address
    668 	    = (symbolP
    669 	       ? S_GET_VALUE (symbolP)
    670 	       : 0) + fragP->fr_offset;
    671 	  bfd_vma var_part_offset = fragP->fr_fix;
    672 	  bfd_vma address_of_var_part = fragP->fr_address + var_part_offset;
    673 	  long offset = target_address - (address_of_var_part - 2);
    674 
    675 	  fragP->fr_subtype
    676 	    = (offset & 1)
    677 	    ? ENCODE_RELAX (STATE_LAPC, STATE_DWORD)
    678 	    : ENCODE_RELAX (STATE_LAPC, STATE_BYTE);
    679 	}
    680       else
    681 	/* Unknown or not the same segment, so not relaxable.  */
    682 	fragP->fr_subtype
    683 	  = ENCODE_RELAX (STATE_LAPC, STATE_DWORD);
    684       fragP->fr_var
    685 	= md_cris_relax_table[fragP->fr_subtype].rlx_length;
    686       break;
    687 
    688     case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF):
    689       /* Note that we can not do anything sane with relaxing
    690 	 [rX + a_known_symbol_in_text], it will have to be a 32-bit
    691 	 value.
    692 
    693 	 We could play tricks with managing a constant pool and make
    694 	 a_known_symbol_in_text a "bdap [pc + offset]" pointing there
    695 	 (like the GOT for ELF shared libraries), but that's no use, it
    696 	 would in general be no shorter or faster code, only more
    697 	 complicated.  */
    698 
    699       if (S_GET_SEGMENT (symbolP) != absolute_section)
    700 	{
    701 	  /* Go for dword if not absolute or same segment.  */
    702 	  fragP->fr_subtype
    703 	    = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD);
    704 	  fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length;
    705 	}
    706       else if (!symbol_resolved_p (fragP->fr_symbol))
    707 	{
    708 	  /* The symbol will eventually be completely resolved as an
    709 	     absolute expression, but right now it depends on the result
    710 	     of relaxation and we don't know anything else about the
    711 	     value.  We start relaxation with the assumption that it'll
    712 	     fit in a byte.  */
    713 	  fragP->fr_subtype
    714 	    = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE);
    715 	  fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length;
    716 	}
    717       else
    718 	{
    719 	  /* Absolute expression.  */
    720 	  long int value;
    721 	  value = (symbolP != NULL
    722 		   ? S_GET_VALUE (symbolP) : 0) + fragP->fr_offset;
    723 
    724 	  if (value >= -128 && value <= 127)
    725 	    {
    726 	      /* Byte displacement.  */
    727 	      (fragP->fr_opcode)[0] = value;
    728 	    }
    729 	  else
    730 	    {
    731 	      /* Word or dword displacement.  */
    732 	      int pow2_of_size = 1;
    733 	      char *writep;
    734 
    735 	      if (value < -32768 || value > 32767)
    736 		{
    737 		  /* Outside word range, make it a dword.  */
    738 		  pow2_of_size = 2;
    739 		}
    740 
    741 	      /* Modify the byte-offset BDAP into a word or dword offset
    742 		 BDAP.	Or really, a BDAP rX,8bit into a
    743 		 BDAP.[wd] rX,[PC+] followed by a word or dword.  */
    744 	      (fragP->fr_opcode)[0] = BDAP_PC_LOW + pow2_of_size * 16;
    745 
    746 	      /* Keep the register number in the highest four bits.  */
    747 	      (fragP->fr_opcode)[1] &= 0xF0;
    748 	      (fragP->fr_opcode)[1] |= BDAP_INCR_HIGH;
    749 
    750 	      /* It grew by two or four bytes.  */
    751 	      fragP->fr_fix += 1 << pow2_of_size;
    752 	      writep = fragP->fr_literal + old_fr_fix;
    753 	      md_number_to_chars (writep, value, 1 << pow2_of_size);
    754 	    }
    755 	  frag_wane (fragP);
    756 	}
    757       break;
    758 
    759     case ENCODE_RELAX (STATE_COND_BRANCH, STATE_BYTE):
    760     case ENCODE_RELAX (STATE_COND_BRANCH, STATE_WORD):
    761     case ENCODE_RELAX (STATE_COND_BRANCH, STATE_DWORD):
    762     case ENCODE_RELAX (STATE_COND_BRANCH_PIC, STATE_BYTE):
    763     case ENCODE_RELAX (STATE_COND_BRANCH_PIC, STATE_WORD):
    764     case ENCODE_RELAX (STATE_COND_BRANCH_PIC, STATE_DWORD):
    765     case ENCODE_RELAX (STATE_COND_BRANCH_V32, STATE_BYTE):
    766     case ENCODE_RELAX (STATE_COND_BRANCH_V32, STATE_WORD):
    767     case ENCODE_RELAX (STATE_COND_BRANCH_V32, STATE_DWORD):
    768     case ENCODE_RELAX (STATE_COND_BRANCH_COMMON, STATE_BYTE):
    769     case ENCODE_RELAX (STATE_COND_BRANCH_COMMON, STATE_WORD):
    770     case ENCODE_RELAX (STATE_COND_BRANCH_COMMON, STATE_DWORD):
    771     case ENCODE_RELAX (STATE_ABS_BRANCH_V32, STATE_BYTE):
    772     case ENCODE_RELAX (STATE_ABS_BRANCH_V32, STATE_WORD):
    773     case ENCODE_RELAX (STATE_ABS_BRANCH_V32, STATE_DWORD):
    774     case ENCODE_RELAX (STATE_LAPC, STATE_BYTE):
    775     case ENCODE_RELAX (STATE_LAPC, STATE_DWORD):
    776     case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
    777     case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
    778     case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
    779       /* When relaxing a section for the second time, we don't need to
    780 	 do anything except making sure that fr_var is set right.  */
    781       fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length;
    782       break;
    783 
    784     case ENCODE_RELAX (STATE_MUL, STATE_BYTE):
    785       /* Nothing to do here.  */
    786       break;
    787 
    788     default:
    789       BAD_CASE (fragP->fr_subtype);
    790     }
    791 
    792   return fragP->fr_var + (fragP->fr_fix - old_fr_fix);
    793 }
    794 
    795 /* Perform post-processing of machine-dependent frags after relaxation.
    796    Called after relaxation is finished.
    797    In:	Address of frag.
    798 	fr_type == rs_machine_dependent.
    799 	fr_subtype is what the address relaxed to.
    800 
    801    Out: Any fixS:s and constants are set up.
    802 
    803    The caller will turn the frag into a ".space 0".  */
    804 
    805 void
    806 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT sec ATTRIBUTE_UNUSED,
    807 		 fragS *fragP)
    808 {
    809   /* Pointer to first byte in variable-sized part of the frag.  */
    810   char *var_partp;
    811 
    812   /* Pointer to first opcode byte in frag.  */
    813   char *opcodep;
    814 
    815   /* Used to check integrity of the relaxation.
    816      One of 2 = long, 1 = word, or 0 = byte.  */
    817   int length_code ATTRIBUTE_UNUSED;
    818 
    819   /* Size in bytes of variable-sized part of frag.  */
    820   int var_part_size = 0;
    821 
    822   /* This is part of *fragP.  It contains all information about addresses
    823      and offsets to varying parts.  */
    824   symbolS *symbolP;
    825   unsigned long var_part_offset;
    826 
    827   /* Where, in file space, is _var of *fragP?  */
    828   unsigned long address_of_var_part = 0;
    829 
    830   /* Where, in file space, does addr point?  */
    831   unsigned long target_address;
    832 
    833   know (fragP->fr_type == rs_machine_dependent);
    834 
    835   length_code = fragP->fr_subtype & STATE_LENGTH_MASK;
    836   know (length_code >= 0 && length_code < STATE_MAX_LENGTH);
    837 
    838   var_part_offset = fragP->fr_fix;
    839   var_partp = fragP->fr_literal + var_part_offset;
    840   opcodep = fragP->fr_opcode;
    841 
    842   symbolP = fragP->fr_symbol;
    843   target_address = (symbolP ? S_GET_VALUE (symbolP) : 0) + fragP->fr_offset;
    844   address_of_var_part = fragP->fr_address + var_part_offset;
    845 
    846   switch (fragP->fr_subtype)
    847     {
    848     case ENCODE_RELAX (STATE_COND_BRANCH, STATE_BYTE):
    849     case ENCODE_RELAX (STATE_COND_BRANCH_PIC, STATE_BYTE):
    850     case ENCODE_RELAX (STATE_COND_BRANCH_V32, STATE_BYTE):
    851     case ENCODE_RELAX (STATE_COND_BRANCH_COMMON, STATE_BYTE):
    852     case ENCODE_RELAX (STATE_ABS_BRANCH_V32, STATE_BYTE):
    853       opcodep[0] = branch_disp ((target_address - address_of_var_part));
    854       var_part_size = 0;
    855       break;
    856 
    857     case ENCODE_RELAX (STATE_COND_BRANCH, STATE_WORD):
    858     case ENCODE_RELAX (STATE_COND_BRANCH_PIC, STATE_WORD):
    859     case ENCODE_RELAX (STATE_COND_BRANCH_V32, STATE_WORD):
    860     case ENCODE_RELAX (STATE_COND_BRANCH_COMMON, STATE_WORD):
    861     case ENCODE_RELAX (STATE_ABS_BRANCH_V32, STATE_WORD):
    862       /* We had a quick immediate branch, now turn it into a word one i.e. a
    863 	 PC autoincrement.  */
    864       opcodep[0] = BRANCH_PC_LOW;
    865       opcodep[1] &= 0xF0;
    866       opcodep[1] |= BRANCH_INCR_HIGH;
    867       md_number_to_chars (var_partp,
    868 			  (long)
    869 			  (target_address
    870 			   - (address_of_var_part
    871 			      + (cris_arch == arch_crisv32
    872 				 || cris_arch == arch_cris_common_v10_v32
    873 				 ? -2 : 2))),
    874 			  2);
    875       var_part_size = 2;
    876       break;
    877 
    878     case ENCODE_RELAX (STATE_COND_BRANCH, STATE_DWORD):
    879       gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP,
    880 			  fragP->fr_symbol, (symbolS *) NULL,
    881 			  fragP->fr_offset);
    882       /* Ten bytes added: a branch, nop and a jump.  */
    883       var_part_size = 2 + 2 + 4 + 2;
    884       break;
    885 
    886     case ENCODE_RELAX (STATE_COND_BRANCH_PIC, STATE_DWORD):
    887       gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP,
    888 			  fragP->fr_symbol, (symbolS *) NULL,
    889 			  fragP->fr_offset);
    890       /* Twelve bytes added: a branch, nop and a pic-branch-32.  */
    891       var_part_size = 2 + 2 + 4 + 2 + 2;
    892       break;
    893 
    894     case ENCODE_RELAX (STATE_COND_BRANCH_V32, STATE_DWORD):
    895       gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP,
    896 			  fragP->fr_symbol, (symbolS *) NULL,
    897 			  fragP->fr_offset);
    898       /* Twelve bytes added: a branch, nop and another branch and nop.  */
    899       var_part_size = 2 + 2 + 2 + 4 + 2;
    900       break;
    901 
    902     case ENCODE_RELAX (STATE_COND_BRANCH_COMMON, STATE_DWORD):
    903       as_bad_where (fragP->fr_file, fragP->fr_line,
    904 		    _("Relaxation to long branches for .arch common_v10_v32\
    905  not implemented"));
    906       /* Pretend we have twelve bytes for sake of quelling further
    907          errors.  */
    908       var_part_size = 2 + 2 + 2 + 4 + 2;
    909       break;
    910 
    911     case ENCODE_RELAX (STATE_ABS_BRANCH_V32, STATE_DWORD):
    912       /* We had a quick immediate branch or a word immediate ba.  Now
    913 	 turn it into a dword one.  */
    914       opcodep[0] = BA_DWORD_OPCODE & 255;
    915       opcodep[1] = (BA_DWORD_OPCODE >> 8) & 255;
    916       fix_new (fragP, var_partp - fragP->fr_literal, 4, symbolP,
    917 	       fragP->fr_offset + 6, 1, BFD_RELOC_32_PCREL);
    918       var_part_size = 4;
    919       break;
    920 
    921     case ENCODE_RELAX (STATE_LAPC, STATE_BYTE):
    922       {
    923 	long offset = target_address - (address_of_var_part - 2);
    924 
    925 	/* This is mostly a sanity check; useful occurrences (if there
    926 	   really are any) should have been caught in
    927 	   md_estimate_size_before_relax.  We can (at least
    928 	   theoretically) stumble over invalid code with odd sizes and
    929 	   .p2aligns within the code, so emit an error if that happens.
    930 	   (The generic relaxation machinery is not fit to check this.)  */
    931 
    932 	if (offset & 1)
    933 	  as_bad_where (fragP->fr_file, fragP->fr_line,
    934 		    _("Complicated LAPC target operand is not\
    935  a multiple of two.  Use LAPC.D"));
    936 
    937 	/* FIXME: This *is* a sanity check.  Remove when done with.  */
    938 	if (offset > 15*2 || offset < 0)
    939 	  as_fatal (_("Internal error found in md_convert_frag: offset %ld.\
    940   Please report this."),
    941 		    offset);
    942 
    943 	opcodep[0] |= (offset / 2) & 0xf;
    944 	var_part_size = 0;
    945       }
    946       break;
    947 
    948     case ENCODE_RELAX (STATE_LAPC, STATE_DWORD):
    949       {
    950 	md_number_to_chars (opcodep,
    951 			    LAPC_DWORD_OPCODE + (opcodep[1] & 0xf0) * 256,
    952 			    2);
    953 	/* Remember that the reloc is against the position *after* the
    954 	   relocated contents, so we need to adjust to the start of
    955 	   the insn.  */
    956 	fix_new (fragP, var_partp - fragP->fr_literal, 4, fragP->fr_symbol,
    957 		 fragP->fr_offset + 6, 1, BFD_RELOC_32_PCREL);
    958 	var_part_size = 4;
    959       }
    960       break;
    961 
    962     case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
    963       if (symbolP == NULL)
    964 	as_fatal (_("internal inconsistency in %s: bdapq no symbol"),
    965 		    __FUNCTION__);
    966       opcodep[0] = S_GET_VALUE (symbolP);
    967       var_part_size = 0;
    968       break;
    969 
    970     case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
    971       /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
    972 	 one that uses PC autoincrement.  */
    973       opcodep[0] = BDAP_PC_LOW + (1 << 4);
    974       opcodep[1] &= 0xF0;
    975       opcodep[1] |= BDAP_INCR_HIGH;
    976       if (symbolP == NULL)
    977 	as_fatal (_("internal inconsistency in %s: bdap.w with no symbol"),
    978 		  __FUNCTION__);
    979       md_number_to_chars (var_partp, S_GET_VALUE (symbolP), 2);
    980       var_part_size = 2;
    981       break;
    982 
    983     case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
    984       /* We had a BDAP 16-bit "word", change the offset to a dword.  */
    985       opcodep[0] = BDAP_PC_LOW + (2 << 4);
    986       opcodep[1] &= 0xF0;
    987       opcodep[1] |= BDAP_INCR_HIGH;
    988       if (fragP->fr_symbol == NULL)
    989 	md_number_to_chars (var_partp, fragP->fr_offset, 4);
    990       else
    991 	fix_new (fragP, var_partp - fragP->fr_literal, 4, fragP->fr_symbol,
    992 		 fragP->fr_offset, 0, BFD_RELOC_32);
    993       var_part_size = 4;
    994       break;
    995 
    996     case ENCODE_RELAX (STATE_MUL, STATE_BYTE):
    997       /* This is the only time we check position and alignment of the
    998 	 placement-tracking frag.  */
    999       if (sec->alignment_power < 2)
   1000 	as_bad_where (fragP->fr_file, fragP->fr_line,
   1001 		      _("section alignment must be >= 4 bytes to check MULS/MULU safeness"));
   1002       else
   1003 	{
   1004 	  /* If the address after the MULS/MULU has alignment which is
   1005 	     that of the section and may be that of a cache-size of the
   1006 	     buggy versions, then the MULS/MULU can be placed badly.  */
   1007 	  if ((address_of_var_part
   1008 	       & ((1 << sec->alignment_power) - 1) & 31) == 0)
   1009 	    as_bad_where (fragP->fr_file, fragP->fr_line,
   1010 			  _("dangerous MULS/MULU location; give it higher alignment"));
   1011 	}
   1012       break;
   1013 
   1014     default:
   1015       BAD_CASE (fragP->fr_subtype);
   1016       break;
   1017     }
   1018 
   1019   fragP->fr_fix += var_part_size;
   1020 }
   1021 
   1022 /* Generate a short jump around a secondary jump table.
   1023    Also called from md_create_long_jump, when sufficient.  */
   1024 
   1025 void
   1026 md_create_short_jump (char *storep, addressT from_addr, addressT to_addr,
   1027 			fragS *fragP ATTRIBUTE_UNUSED,
   1028 			symbolS *to_symbol ATTRIBUTE_UNUSED)
   1029 {
   1030   long int distance;
   1031 
   1032   /* See md_create_long_jump about the comment on the "+ 2".  */
   1033   long int max_minimal_minus_distance;
   1034   long int max_minimal_plus_distance;
   1035   long int max_minus_distance;
   1036   long int max_plus_distance;
   1037   int nop_opcode;
   1038 
   1039   if (cris_arch == arch_crisv32)
   1040     {
   1041       max_minimal_minus_distance = BRANCH_BB_V32 + 2;
   1042       max_minimal_plus_distance = BRANCH_BF_V32 + 2;
   1043       max_minus_distance = BRANCH_WB_V32 + 2;
   1044       max_plus_distance = BRANCH_WF_V32 + 2;
   1045       nop_opcode = NOP_OPCODE_V32;
   1046     }
   1047   else if (cris_arch == arch_cris_common_v10_v32)
   1048     /* Bail out for compatibility mode.  (It seems it can be implemented,
   1049        perhaps with a 10-byte sequence: "move.d NNNN,$pc/$acr", "jump
   1050        $acr", "nop"; but doesn't seem worth it at the moment.)  */
   1051     as_fatal (_("Out-of-range .word offset handling\
   1052  is not implemented for .arch common_v10_v32"));
   1053   else
   1054     {
   1055       max_minimal_minus_distance = BRANCH_BB + 2;
   1056       max_minimal_plus_distance = BRANCH_BF + 2;
   1057       max_minus_distance = BRANCH_WB + 2;
   1058       max_plus_distance = BRANCH_WF + 2;
   1059       nop_opcode = NOP_OPCODE;
   1060     }
   1061 
   1062   distance = to_addr - from_addr;
   1063 
   1064   if (max_minimal_minus_distance <= distance
   1065       && distance <= max_minimal_plus_distance)
   1066     {
   1067       /* Create a "short" short jump: "BA distance - 2".  */
   1068       storep[0] = branch_disp (distance - 2);
   1069       storep[1] = BA_QUICK_HIGH;
   1070 
   1071       /* A nop for the delay slot.  */
   1072       md_number_to_chars (storep + 2, nop_opcode, 2);
   1073 
   1074       /* The extra word should be filled with something sane too.  Make it
   1075 	 a nop to keep disassembly sane.  */
   1076       md_number_to_chars (storep + 4, nop_opcode, 2);
   1077     }
   1078   else if (max_minus_distance <= distance
   1079 	   && distance <= max_plus_distance)
   1080     {
   1081       /* Make it a "long" short jump: "BA (PC+)".  */
   1082       md_number_to_chars (storep, BA_PC_INCR_OPCODE, 2);
   1083 
   1084       /* ".WORD distance - 4".  */
   1085       md_number_to_chars (storep + 2,
   1086 			  (long) (distance - 4
   1087 				  - (cris_arch == arch_crisv32
   1088 				     ? -4 : 0)),
   1089 			  2);
   1090 
   1091       /* A nop for the delay slot.  */
   1092       md_number_to_chars (storep + 4, nop_opcode, 2);
   1093     }
   1094   else
   1095     as_bad_where (fragP->fr_file, fragP->fr_line,
   1096 		  _(".word case-table handling failed: table too large"));
   1097 }
   1098 
   1099 /* Generate a long jump in a secondary jump table.
   1100 
   1101    storep  Where to store the jump instruction.
   1102    from_addr  Address of the jump instruction.
   1103    to_addr    Destination address of the jump.
   1104    fragP      Which frag the destination address operand
   1105 	      lies in.
   1106    to_symbol  Destination symbol.  */
   1107 
   1108 void
   1109 md_create_long_jump (char *storep, addressT from_addr, addressT to_addr,
   1110 		     fragS *fragP, symbolS *to_symbol)
   1111 {
   1112   long int distance;
   1113 
   1114   /* FIXME: What's that "+ 3"?  It comes from the magic numbers that
   1115      used to be here, it's just translated to the limit macros used in
   1116      the relax table.  But why + 3?  */
   1117   long int max_short_minus_distance
   1118     = cris_arch != arch_crisv32 ? BRANCH_WB + 3 : BRANCH_WB_V32 + 3;
   1119 
   1120   long int max_short_plus_distance
   1121     = cris_arch != arch_crisv32 ? BRANCH_WF + 3 : BRANCH_WF_V32 + 3;
   1122 
   1123   distance = to_addr - from_addr;
   1124 
   1125   if (max_short_minus_distance <= distance
   1126       && distance <= max_short_plus_distance)
   1127     {
   1128       /* Then make it a "short" long jump.  */
   1129       md_create_short_jump (storep, from_addr, to_addr, fragP,
   1130 			    to_symbol);
   1131       if (cris_arch == arch_crisv32)
   1132 	md_number_to_chars (storep + 6, NOP_OPCODE_V32, 2);
   1133       else
   1134 	md_number_to_chars (storep + 6, NOP_OPCODE, 2);
   1135     }
   1136   else
   1137     {
   1138       /* We have a "long" long jump: "JUMP [PC+]".  If CRISv32, always
   1139 	 make it a BA.  Else make it an "MOVE [PC=PC+N],P0" if we're supposed
   1140 	 to emit PIC code.  */
   1141       md_number_to_chars (storep,
   1142 			  cris_arch == arch_crisv32
   1143 			  ? BA_DWORD_OPCODE
   1144 			  : (pic ? MOVE_PC_INCR_OPCODE_PREFIX
   1145 			     : JUMP_PC_INCR_OPCODE),
   1146 			  2);
   1147 
   1148       /* Follow with a ".DWORD to_addr", PC-relative for PIC.  */
   1149       fix_new (fragP, storep + 2 - fragP->fr_literal, 4, to_symbol,
   1150 	       cris_arch == arch_crisv32 ? 6 : 0,
   1151 	       cris_arch == arch_crisv32 || pic ? 1 : 0,
   1152 	       cris_arch == arch_crisv32 || pic
   1153 	       ? BFD_RELOC_32_PCREL : BFD_RELOC_32);
   1154 
   1155       /* Follow it with a "NOP" for CRISv32.  */
   1156       if (cris_arch == arch_crisv32)
   1157 	md_number_to_chars (storep + 6, NOP_OPCODE_V32, 2);
   1158       else if (pic)
   1159 	/* ...and the rest of the move-opcode for pre-v32 PIC.  */
   1160 	md_number_to_chars (storep + 6, MOVE_PC_INCR_OPCODE_SUFFIX, 2);
   1161     }
   1162 }
   1163 
   1164 /* Allocate space for the first piece of an insn, and mark it as the
   1165    start of the insn for debug-format use.  */
   1166 
   1167 static char *
   1168 cris_insn_first_word_frag (void)
   1169 {
   1170   char *insnp = frag_more (2);
   1171 
   1172   /* We need to mark the start of the insn by passing dwarf2_emit_insn
   1173      the offset from the current fragment position.  This must be done
   1174      after the first fragment is created but before any other fragments
   1175      (fixed or varying) are created.  Note that the offset only
   1176      corresponds to the "size" of the insn for a fixed-size,
   1177      non-expanded insn.  */
   1178   if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
   1179     dwarf2_emit_insn (2);
   1180 
   1181   return insnp;
   1182 }
   1183 
   1184 /* Port-specific assembler initialization.  */
   1185 
   1186 void
   1187 md_begin (void)
   1188 {
   1189   const char *hashret = NULL;
   1190   int i = 0;
   1191 
   1192   /* Set up a hash table for the instructions.  */
   1193   op_hash = hash_new ();
   1194   if (op_hash == NULL)
   1195     as_fatal (_("Virtual memory exhausted"));
   1196 
   1197   /* Enable use of ".if ..asm.arch.cris.v32"
   1198      and ".if ..asm.arch.cris.common_v10_v32" and a few others.  */
   1199   symbol_table_insert (symbol_new ("..asm.arch.cris.v32", absolute_section,
   1200 				   (cris_arch == arch_crisv32),
   1201 				   &zero_address_frag));
   1202   symbol_table_insert (symbol_new ("..asm.arch.cris.v10", absolute_section,
   1203 				   (cris_arch == arch_crisv10),
   1204 				   &zero_address_frag));
   1205   symbol_table_insert (symbol_new ("..asm.arch.cris.common_v10_v32",
   1206 				   absolute_section,
   1207 				   (cris_arch == arch_cris_common_v10_v32),
   1208 				   &zero_address_frag));
   1209   symbol_table_insert (symbol_new ("..asm.arch.cris.any_v0_v10",
   1210 				   absolute_section,
   1211 				   (cris_arch == arch_cris_any_v0_v10),
   1212 				   &zero_address_frag));
   1213 
   1214   while (cris_opcodes[i].name != NULL)
   1215     {
   1216       const char *name = cris_opcodes[i].name;
   1217 
   1218       if (! cris_insn_ver_valid_for_arch (cris_opcodes[i].applicable_version,
   1219 					  cris_arch))
   1220 	{
   1221 	  i++;
   1222 	  continue;
   1223 	}
   1224 
   1225       /* Need to cast to get rid of "const".  FIXME: Fix hash_insert instead.  */
   1226       hashret = hash_insert (op_hash, name, (void *) &cris_opcodes[i]);
   1227 
   1228       if (hashret != NULL && *hashret != '\0')
   1229 	as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes[i].name,
   1230 		  *hashret == 0 ? _("(unknown reason)") : hashret);
   1231       do
   1232 	{
   1233 	  if (cris_opcodes[i].match & cris_opcodes[i].lose)
   1234 	    as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes[i].name,
   1235 		      cris_opcodes[i].args);
   1236 
   1237 	  ++i;
   1238 	}
   1239       while (cris_opcodes[i].name != NULL
   1240 	     && strcmp (cris_opcodes[i].name, name) == 0);
   1241     }
   1242 }
   1243 
   1244 /* Assemble a source line.  */
   1245 
   1246 void
   1247 md_assemble (char *str)
   1248 {
   1249   struct cris_instruction output_instruction;
   1250   struct cris_prefix prefix;
   1251   char *opcodep;
   1252   char *p;
   1253 
   1254   know (str);
   1255 
   1256   /* Do the low-level grunt - assemble to bits and split up into a prefix
   1257      and ordinary insn.  */
   1258   cris_process_instruction (str, &output_instruction, &prefix);
   1259 
   1260   /* Handle any prefixes to the instruction.  */
   1261   switch (prefix.kind)
   1262     {
   1263     case PREFIX_NONE:
   1264       break;
   1265 
   1266       /* When the expression is unknown for a BDAP, it can need 0, 2 or 4
   1267 	 extra bytes, so we handle it separately.  */
   1268     case PREFIX_BDAP_IMM:
   1269       /* We only do it if the relocation is unspecified, i.e. not a PIC or TLS
   1270 	 relocation.  */
   1271       if (prefix.reloc == BFD_RELOC_NONE)
   1272 	{
   1273 	  gen_bdap (prefix.base_reg_number, &prefix.expr);
   1274 	  break;
   1275 	}
   1276       /* Fall through.  */
   1277     case PREFIX_BDAP:
   1278     case PREFIX_BIAP:
   1279     case PREFIX_DIP:
   1280       opcodep = cris_insn_first_word_frag ();
   1281 
   1282       /* Output the prefix opcode.  */
   1283       md_number_to_chars (opcodep, (long) prefix.opcode, 2);
   1284 
   1285       /* Having a specified reloc only happens for DIP and for BDAP with
   1286 	 PIC or TLS operands, but it is ok to drop through here for the other
   1287 	 prefixes as they can have no relocs specified.  */
   1288       if (prefix.reloc != BFD_RELOC_NONE)
   1289 	{
   1290 	  unsigned int relocsize
   1291 	    = (prefix.kind == PREFIX_DIP
   1292 	       ? 4 : cris_get_specified_reloc_size (prefix.reloc));
   1293 
   1294 	  p = frag_more (relocsize);
   1295 	  fix_new_exp (frag_now, (p - frag_now->fr_literal), relocsize,
   1296 		       &prefix.expr, 0, prefix.reloc);
   1297 	}
   1298       break;
   1299 
   1300     case PREFIX_PUSH:
   1301       opcodep = cris_insn_first_word_frag ();
   1302 
   1303       /* Output the prefix opcode.  Being a "push", we add the negative
   1304 	 size of the register to "sp".  */
   1305       if (output_instruction.spec_reg != NULL)
   1306 	{
   1307 	  /* Special register.  */
   1308 	  opcodep[0] = -output_instruction.spec_reg->reg_size;
   1309 	}
   1310       else
   1311 	{
   1312 	  /* General register.  */
   1313 	  opcodep[0] = -4;
   1314 	}
   1315       opcodep[1] = (REG_SP << 4) + (BDAP_QUICK_OPCODE >> 8);
   1316       break;
   1317 
   1318     default:
   1319       BAD_CASE (prefix.kind);
   1320     }
   1321 
   1322   /* If we only had a prefix insn, we're done.  */
   1323   if (output_instruction.insn_type == CRIS_INSN_NONE)
   1324     return;
   1325 
   1326   /* Done with the prefix.  Continue with the main instruction.  */
   1327   if (prefix.kind == PREFIX_NONE)
   1328     opcodep = cris_insn_first_word_frag ();
   1329   else
   1330     opcodep = frag_more (2);
   1331 
   1332   /* Output the instruction opcode.  */
   1333   md_number_to_chars (opcodep, (long) (output_instruction.opcode), 2);
   1334 
   1335   /* Output the symbol-dependent instruction stuff.  */
   1336   if (output_instruction.insn_type == CRIS_INSN_BRANCH)
   1337     {
   1338       segT to_seg = absolute_section;
   1339       int is_undefined = 0;
   1340       int length_code;
   1341 
   1342       if (output_instruction.expr.X_op != O_constant)
   1343 	{
   1344 	  to_seg = S_GET_SEGMENT (output_instruction.expr.X_add_symbol);
   1345 
   1346 	  if (to_seg == undefined_section)
   1347 	    is_undefined = 1;
   1348 	}
   1349 
   1350       if (to_seg == now_seg || is_undefined
   1351 	  /* In CRISv32, there *is* a 32-bit absolute branch, so don't
   1352 	     emit the 12-byte sequence for known symbols in other
   1353 	     segments.  */
   1354 	  || (cris_arch == arch_crisv32
   1355 	      && output_instruction.opcode == BA_QUICK_OPCODE))
   1356 	{
   1357 	  /* Handle complex expressions.  */
   1358 	  valueT addvalue
   1359 	    = (SIMPLE_EXPR (&output_instruction.expr)
   1360 	       ? output_instruction.expr.X_add_number
   1361 	       : 0);
   1362 	  symbolS *sym
   1363 	    = (SIMPLE_EXPR (&output_instruction.expr)
   1364 	       ? output_instruction.expr.X_add_symbol
   1365 	       : make_expr_symbol (&output_instruction.expr));
   1366 
   1367 	  /* If is_undefined, the expression may still become now_seg.
   1368 	     That case is handled by md_estimate_size_before_relax.  */
   1369 	  length_code = to_seg == now_seg ? STATE_BYTE : STATE_UNDF;
   1370 
   1371 	  /* Make room for max twelve bytes of variable length for v32 mode
   1372 	     or PIC, ten for v10 and older.  */
   1373 	  frag_var (rs_machine_dependent,
   1374 		    (cris_arch == arch_crisv32
   1375 		     || cris_arch == arch_cris_common_v10_v32
   1376 		     || pic) ? 12 : 10, 0,
   1377 		    ENCODE_RELAX (cris_arch == arch_crisv32
   1378 				  ? (output_instruction.opcode
   1379 				     == BA_QUICK_OPCODE
   1380 				     ? STATE_ABS_BRANCH_V32
   1381 				     : STATE_COND_BRANCH_V32)
   1382 				  : (cris_arch == arch_cris_common_v10_v32
   1383 				     ? STATE_COND_BRANCH_COMMON
   1384 				     : (pic ? STATE_COND_BRANCH_PIC
   1385 					: STATE_COND_BRANCH)),
   1386 				  length_code),
   1387 		    sym, addvalue, opcodep);
   1388 	}
   1389       else
   1390 	{
   1391 	  /* We have: to_seg != now_seg && to_seg != undefined_section.
   1392 	     This means it is a branch to a known symbol in another
   1393 	     section, perhaps an absolute address.  Emit a 32-bit branch.  */
   1394 	  char *cond_jump
   1395 	    = frag_more ((cris_arch == arch_crisv32
   1396 			  || cris_arch == arch_cris_common_v10_v32
   1397 			  || pic)
   1398 			 ? 12 : 10);
   1399 
   1400 	  gen_cond_branch_32 (opcodep, cond_jump, frag_now,
   1401 			      output_instruction.expr.X_add_symbol,
   1402 			      (symbolS *) NULL,
   1403 			      output_instruction.expr.X_add_number);
   1404 	}
   1405     }
   1406   else if (output_instruction.insn_type == CRIS_INSN_MUL
   1407 	   && err_for_dangerous_mul_placement)
   1408     /* Create a frag which which we track the location of the mul insn
   1409        (in the last two bytes before the mul-frag).  */
   1410     frag_variant (rs_machine_dependent, 0, 0,
   1411 		  ENCODE_RELAX (STATE_MUL, STATE_BYTE),
   1412 		  NULL, 0, opcodep);
   1413   else
   1414     {
   1415       if (output_instruction.imm_oprnd_size > 0)
   1416 	{
   1417 	  /* The instruction has an immediate operand.  */
   1418 	  enum bfd_reloc_code_real reloc = BFD_RELOC_NONE;
   1419 
   1420 	  switch (output_instruction.imm_oprnd_size)
   1421 	    {
   1422 	      /* Any byte-size immediate constants are treated as
   1423 		 word-size.  FIXME: Thus overflow check does not work
   1424 		 correctly.  */
   1425 
   1426 	    case 2:
   1427 	      /* Note that size-check for the explicit reloc has already
   1428 		 been done when we get here.  */
   1429 	      if (output_instruction.reloc != BFD_RELOC_NONE)
   1430 		reloc = output_instruction.reloc;
   1431 	      else
   1432 		reloc = BFD_RELOC_16;
   1433 	      break;
   1434 
   1435 	    case 4:
   1436 	      /* Allow a relocation specified in the operand.  */
   1437 	      if (output_instruction.reloc != BFD_RELOC_NONE)
   1438 		reloc = output_instruction.reloc;
   1439 	      else
   1440 		reloc = BFD_RELOC_32;
   1441 	      break;
   1442 
   1443 	    default:
   1444 	      BAD_CASE (output_instruction.imm_oprnd_size);
   1445 	    }
   1446 
   1447 	  p = frag_more (output_instruction.imm_oprnd_size);
   1448 	  fix_new_exp (frag_now, (p - frag_now->fr_literal),
   1449 		       output_instruction.imm_oprnd_size,
   1450 		       &output_instruction.expr,
   1451 		       reloc == BFD_RELOC_32_PCREL
   1452 		       || reloc == BFD_RELOC_16_PCREL
   1453 		       || reloc == BFD_RELOC_8_PCREL, reloc);
   1454 	}
   1455       else if (output_instruction.reloc == BFD_RELOC_CRIS_LAPCQ_OFFSET
   1456 	       && output_instruction.expr.X_md != 0)
   1457 	{
   1458 	  /* Handle complex expressions.  */
   1459 	  valueT addvalue
   1460 	    = (output_instruction.expr.X_op_symbol != NULL
   1461 	       ? 0 : output_instruction.expr.X_add_number);
   1462 	  symbolS *sym
   1463 	    = (output_instruction.expr.X_op_symbol != NULL
   1464 	       ? make_expr_symbol (&output_instruction.expr)
   1465 	       : output_instruction.expr.X_add_symbol);
   1466 
   1467 	  /* This is a relaxing construct, so we need a frag_var rather
   1468 	     than the fix_new_exp call below.  */
   1469 	  frag_var (rs_machine_dependent,
   1470 		    4, 0,
   1471 		    ENCODE_RELAX (STATE_LAPC, STATE_UNDF),
   1472 		    sym, addvalue, opcodep);
   1473 	}
   1474       else if (output_instruction.reloc != BFD_RELOC_NONE)
   1475 	{
   1476 	  /* An immediate operand that has a relocation and needs to be
   1477 	     processed further.  */
   1478 
   1479 	  /* It is important to use fix_new_exp here and everywhere else
   1480 	     (and not fix_new), as fix_new_exp can handle "difference
   1481 	     expressions" - where the expression contains a difference of
   1482 	     two symbols in the same segment.  */
   1483 	  fix_new_exp (frag_now, (opcodep - frag_now->fr_literal), 2,
   1484 		       &output_instruction.expr,
   1485 		       output_instruction.reloc == BFD_RELOC_32_PCREL
   1486 		       || output_instruction.reloc == BFD_RELOC_16_PCREL
   1487 		       || output_instruction.reloc == BFD_RELOC_8_PCREL
   1488 		       || (output_instruction.reloc
   1489 			   == BFD_RELOC_CRIS_LAPCQ_OFFSET),
   1490 		       output_instruction.reloc);
   1491 	}
   1492     }
   1493 }
   1494 
   1495 /* Helper error-reporting function: calls as_bad for a format string
   1496    for a single value and zeroes the offending value (zero assumed
   1497    being a valid value) to avoid repeated error reports in later value
   1498    checking.  */
   1499 
   1500 static void
   1501 cris_bad (const char *format, offsetT *valp)
   1502 {
   1503   /* We cast to long so the format string can assume that format.  */
   1504   as_bad (format, (long) *valp);
   1505   *valp = 0;
   1506 }
   1507 
   1508 /* Low level text-to-bits assembly.  */
   1509 
   1510 static void
   1511 cris_process_instruction (char *insn_text, struct cris_instruction *out_insnp,
   1512 			  struct cris_prefix *prefixp)
   1513 {
   1514   char *s;
   1515   char modified_char = 0;
   1516   const char *args;
   1517   struct cris_opcode *instruction;
   1518   char *operands;
   1519   int match = 0;
   1520   int mode;
   1521   int regno;
   1522   int size_bits;
   1523 
   1524   /* Reset these fields to a harmless state in case we need to return in
   1525      error.  */
   1526   prefixp->kind = PREFIX_NONE;
   1527   prefixp->reloc = BFD_RELOC_NONE;
   1528   out_insnp->insn_type = CRIS_INSN_NONE;
   1529   out_insnp->imm_oprnd_size = 0;
   1530 
   1531   /* Find the end of the opcode mnemonic.  We assume (true in 2.9.1)
   1532      that the caller has translated the opcode to lower-case, up to the
   1533      first non-letter.  */
   1534   for (operands = insn_text; ISLOWER (*operands); ++operands)
   1535     ;
   1536 
   1537   /* Terminate the opcode after letters, but save the character there if
   1538      it was of significance.  */
   1539   switch (*operands)
   1540     {
   1541     case '\0':
   1542       break;
   1543 
   1544     case '.':
   1545       /* Put back the modified character later.  */
   1546       modified_char = *operands;
   1547       /* Fall through.  */
   1548 
   1549     case ' ':
   1550       /* Consume the character after the mnemonic
   1551 	 and replace it with '\0'.  */
   1552       *operands++ = '\0';
   1553       break;
   1554 
   1555     default:
   1556       as_bad (_("Unknown opcode: `%s'"), insn_text);
   1557       return;
   1558     }
   1559 
   1560   /* Find the instruction.  */
   1561   instruction = (struct cris_opcode *) hash_find (op_hash, insn_text);
   1562   if (instruction == NULL)
   1563     {
   1564       as_bad (_("Unknown opcode: `%s'"), insn_text);
   1565       return;
   1566     }
   1567 
   1568   /* Put back the modified character.  */
   1569   switch (modified_char)
   1570     {
   1571     case 0:
   1572       break;
   1573 
   1574     default:
   1575       *--operands = modified_char;
   1576     }
   1577 
   1578   /* Try to match an opcode table slot.  */
   1579   for (s = operands;;)
   1580     {
   1581       int imm_expr_found;
   1582 
   1583       /* Initialize *prefixp, perhaps after being modified for a
   1584 	 "near match".  */
   1585       prefixp->kind = PREFIX_NONE;
   1586       prefixp->reloc = BFD_RELOC_NONE;
   1587 
   1588       /* Initialize *out_insnp.  */
   1589       memset (out_insnp, 0, sizeof (*out_insnp));
   1590       out_insnp->opcode = instruction->match;
   1591       out_insnp->reloc = BFD_RELOC_NONE;
   1592       out_insnp->insn_type = CRIS_INSN_NORMAL;
   1593       out_insnp->imm_oprnd_size = 0;
   1594 
   1595       imm_expr_found = 0;
   1596 
   1597       /* Build the opcode, checking as we go to make sure that the
   1598 	 operands match.  */
   1599       for (args = instruction->args;; ++args)
   1600 	{
   1601 	  switch (*args)
   1602 	    {
   1603 	    case '\0':
   1604 	      /* If we've come to the end of arguments, we're done.  */
   1605 	      if (*s == '\0')
   1606 		match = 1;
   1607 	      break;
   1608 
   1609 	    case '!':
   1610 	      /* Non-matcher character for disassembly.
   1611 		 Ignore it here.  */
   1612 	      continue;
   1613 
   1614 	    case '[':
   1615 	    case ']':
   1616 	    case ',':
   1617 	    case ' ':
   1618 	      /* These must match exactly.  */
   1619 	      if (*s++ == *args)
   1620 		continue;
   1621 	      break;
   1622 
   1623 	    case 'A':
   1624 	      /* "ACR", case-insensitive.
   1625 		 Handle a sometimes-mandatory dollar sign as register
   1626 		 prefix.  */
   1627 	      if (*s == REGISTER_PREFIX_CHAR)
   1628 		s++;
   1629 	      else if (demand_register_prefix)
   1630 		break;
   1631 
   1632 	      if ((*s++ != 'a' && s[-1] != 'A')
   1633 		  || (*s++ != 'c' && s[-1] != 'C')
   1634 		  || (*s++ != 'r' && s[-1] != 'R'))
   1635 		break;
   1636 	      continue;
   1637 
   1638 	    case 'B':
   1639 	      /* This is not really an operand, but causes a "BDAP
   1640 		 -size,SP" prefix to be output, for PUSH instructions.  */
   1641 	      prefixp->kind = PREFIX_PUSH;
   1642 	      continue;
   1643 
   1644 	    case 'b':
   1645 	      /* This letter marks an operand that should not be matched
   1646 		 in the assembler. It is a branch with 16-bit
   1647 		 displacement.  The assembler will create them from the
   1648 		 8-bit flavor when necessary.  The assembler does not
   1649 		 support the [rN+] operand, as the [r15+] that is
   1650 		 generated for 16-bit displacements.  */
   1651 	      break;
   1652 
   1653 	    case 'c':
   1654 	      /* A 5-bit unsigned immediate in bits <4:0>.  */
   1655 	      if (! cris_get_expression (&s, &out_insnp->expr))
   1656 		break;
   1657 	      else
   1658 		{
   1659 		  if (out_insnp->expr.X_op == O_constant
   1660 		      && (out_insnp->expr.X_add_number < 0
   1661 			  || out_insnp->expr.X_add_number > 31))
   1662 		    cris_bad (_("Immediate value not in 5 bit unsigned range: %ld"),
   1663 			      &out_insnp->expr.X_add_number);
   1664 
   1665 		  out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_5;
   1666 		  continue;
   1667 		}
   1668 
   1669 	    case 'C':
   1670 	      /* A 4-bit unsigned immediate in bits <3:0>.  */
   1671 	      if (! cris_get_expression (&s, &out_insnp->expr))
   1672 		break;
   1673 	      else
   1674 		{
   1675 		  if (out_insnp->expr.X_op == O_constant
   1676 		      && (out_insnp->expr.X_add_number < 0
   1677 			  || out_insnp->expr.X_add_number > 15))
   1678 		    cris_bad (_("Immediate value not in 4 bit unsigned range: %ld"),
   1679 			      &out_insnp->expr.X_add_number);
   1680 
   1681 		  out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_4;
   1682 		  continue;
   1683 		}
   1684 
   1685  	      /* For 'd', check for an optional ".d" or ".D" at the
   1686                  start of the operands, followed by a space character.  */
   1687 	    case 'd':
   1688 	      if (modified_char == '.' && *s == '.')
   1689 		{
   1690 		  if ((s[1] != 'd' && s[1] == 'D')
   1691 		      || ! ISSPACE (s[2]))
   1692 		    break;
   1693 		  s += 2;
   1694 		  continue;
   1695 		}
   1696 	      continue;
   1697 
   1698 	    case 'D':
   1699 	      /* General register in bits <15:12> and <3:0>.  */
   1700 	      if (! get_gen_reg (&s, &regno))
   1701 		break;
   1702 	      else
   1703 		{
   1704 		  out_insnp->opcode |= regno /* << 0 */;
   1705 		  out_insnp->opcode |= regno << 12;
   1706 		  continue;
   1707 		}
   1708 
   1709 	    case 'f':
   1710 	      /* Flags from the condition code register.  */
   1711 	      {
   1712 		int flags = 0;
   1713 
   1714 		if (! get_flags (&s, &flags))
   1715 		  break;
   1716 
   1717 		out_insnp->opcode |= ((flags & 0xf0) << 8) | (flags & 0xf);
   1718 		continue;
   1719 	      }
   1720 
   1721 	    case 'i':
   1722 	      /* A 6-bit signed immediate in bits <5:0>.  */
   1723 	      if (! cris_get_expression (&s, &out_insnp->expr))
   1724 		break;
   1725 	      else
   1726 		{
   1727 		  if (out_insnp->expr.X_op == O_constant
   1728 		      && (out_insnp->expr.X_add_number < -32
   1729 			  || out_insnp->expr.X_add_number > 31))
   1730 		    cris_bad (_("Immediate value not in 6 bit range: %ld"),
   1731 			      &out_insnp->expr.X_add_number);
   1732 
   1733 		  out_insnp->reloc = BFD_RELOC_CRIS_SIGNED_6;
   1734 		  continue;
   1735 		}
   1736 
   1737 	    case 'I':
   1738 	      /* A 6-bit unsigned immediate in bits <5:0>.  */
   1739 	      if (! cris_get_expression (&s, &out_insnp->expr))
   1740 		break;
   1741 	      else
   1742 		{
   1743 		  if (out_insnp->expr.X_op == O_constant
   1744 		      && (out_insnp->expr.X_add_number < 0
   1745 			  || out_insnp->expr.X_add_number > 63))
   1746 		    cris_bad (_("Immediate value not in 6 bit unsigned range: %ld"),
   1747 			      &out_insnp->expr.X_add_number);
   1748 
   1749 		  out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_6;
   1750 		  continue;
   1751 		}
   1752 
   1753 	    case 'M':
   1754 	      /* A size modifier, B, W or D, to be put in a bit position
   1755 		 suitable for CLEAR instructions (i.e. reflecting a zero
   1756 		 register).  */
   1757 	      if (! get_bwd_size_modifier (&s, &size_bits))
   1758 		break;
   1759 	      else
   1760 		{
   1761 		  switch (size_bits)
   1762 		    {
   1763 		    case 0:
   1764 		      out_insnp->opcode |= 0 << 12;
   1765 		      break;
   1766 
   1767 		    case 1:
   1768 		      out_insnp->opcode |= 4 << 12;
   1769 		      break;
   1770 
   1771 		    case 2:
   1772 		      out_insnp->opcode |= 8 << 12;
   1773 		      break;
   1774 		    }
   1775 		  continue;
   1776 		}
   1777 
   1778 	    case 'm':
   1779 	      /* A size modifier, B, W or D, to be put in bits <5:4>.  */
   1780 	      if (modified_char != '.'
   1781 		  || ! get_bwd_size_modifier (&s, &size_bits))
   1782 		break;
   1783 	      else
   1784 		{
   1785 		  out_insnp->opcode |= size_bits << 4;
   1786 		  continue;
   1787 		}
   1788 
   1789 	    case 'o':
   1790 	      /* A branch expression.  */
   1791 	      if (! cris_get_expression (&s, &out_insnp->expr))
   1792 		break;
   1793 	      else
   1794 		{
   1795 		  out_insnp->insn_type = CRIS_INSN_BRANCH;
   1796 		  continue;
   1797 		}
   1798 
   1799 	    case 'Q':
   1800 	      /* A 8-bit quick BDAP expression, "expr,R".  */
   1801 	      if (! cris_get_expression (&s, &out_insnp->expr))
   1802 		break;
   1803 
   1804 	      if (*s != ',')
   1805 		break;
   1806 
   1807 	      s++;
   1808 
   1809 	      if (!get_gen_reg (&s, &regno))
   1810 		break;
   1811 
   1812 	      out_insnp->opcode |= regno << 12;
   1813 	      out_insnp->reloc = BFD_RELOC_CRIS_SIGNED_8;
   1814 	      continue;
   1815 
   1816 	    case 'O':
   1817 	      /* A BDAP expression for any size, "expr,R".  */
   1818 	      if (! cris_get_expression (&s, &prefixp->expr))
   1819 		break;
   1820 	      else
   1821 		{
   1822 		  if (*s != ',')
   1823 		    break;
   1824 
   1825 		  s++;
   1826 
   1827 		  if (!get_gen_reg (&s, &prefixp->base_reg_number))
   1828 		    break;
   1829 
   1830 		  /* Since 'O' is used with an explicit bdap, we have no
   1831 		     "real" instruction.  */
   1832 		  prefixp->kind = PREFIX_BDAP_IMM;
   1833 		  prefixp->opcode
   1834 		    = BDAP_QUICK_OPCODE | (prefixp->base_reg_number << 12);
   1835 
   1836 		  out_insnp->insn_type = CRIS_INSN_NONE;
   1837 		  continue;
   1838 		}
   1839 
   1840 	    case 'P':
   1841 	      /* Special register in bits <15:12>.  */
   1842 	      if (! get_spec_reg (&s, &out_insnp->spec_reg))
   1843 		break;
   1844 	      else
   1845 		{
   1846 		  /* Use of some special register names come with a
   1847 		     specific warning.	Note that we have no ".cpu type"
   1848 		     pseudo yet, so some of this is just unused
   1849 		     framework.  */
   1850 		  if (out_insnp->spec_reg->warning)
   1851 		    as_warn ("%s", out_insnp->spec_reg->warning);
   1852 		  else if (out_insnp->spec_reg->applicable_version
   1853 			   == cris_ver_warning)
   1854 		    /* Others have a generic warning.  */
   1855 		    as_warn (_("Unimplemented register `%s' specified"),
   1856 			     out_insnp->spec_reg->name);
   1857 
   1858 		  out_insnp->opcode
   1859 		    |= out_insnp->spec_reg->number << 12;
   1860 		  continue;
   1861 		}
   1862 
   1863 	    case 'p':
   1864 	      /* This character is used in the disassembler to
   1865 		 recognize a prefix instruction to fold into the
   1866 		 addressing mode for the next instruction.  It is
   1867 		 ignored here.  */
   1868 	      continue;
   1869 
   1870 	    case 'R':
   1871 	      /* General register in bits <15:12>.  */
   1872 	      if (! get_gen_reg (&s, &regno))
   1873 		break;
   1874 	      else
   1875 		{
   1876 		  out_insnp->opcode |= regno << 12;
   1877 		  continue;
   1878 		}
   1879 
   1880 	    case 'r':
   1881 	      /* General register in bits <3:0>.  */
   1882 	      if (! get_gen_reg (&s, &regno))
   1883 		break;
   1884 	      else
   1885 		{
   1886 		  out_insnp->opcode |= regno /* << 0 */;
   1887 		  continue;
   1888 		}
   1889 
   1890 	    case 'S':
   1891 	      /* Source operand in bit <10> and a prefix; a 3-operand
   1892 		 prefix.  */
   1893 	      if (! get_3op_or_dip_prefix_op (&s, prefixp))
   1894 		break;
   1895 	      else
   1896 		continue;
   1897 
   1898 	    case 's':
   1899 	      /* Source operand in bits <10>, <3:0> and optionally a
   1900 		 prefix; i.e. an indirect operand or an side-effect
   1901 		 prefix (where valid).  */
   1902 	      if (! get_autoinc_prefix_or_indir_op (&s, prefixp, &mode,
   1903 						    &regno,
   1904 						    &imm_expr_found,
   1905 						    &out_insnp->expr))
   1906 		break;
   1907 	      else
   1908 		{
   1909 		  if (prefixp->kind != PREFIX_NONE)
   1910 		    {
   1911 		      /* A prefix, so it has the autoincrement bit
   1912 			 set.  */
   1913 		      out_insnp->opcode |= (AUTOINCR_BIT << 8);
   1914 		    }
   1915 		  else
   1916 		    {
   1917 		      /* No prefix.  The "mode" variable contains bits like
   1918 			 whether or not this is autoincrement mode.  */
   1919 		      out_insnp->opcode |= (mode << 10);
   1920 
   1921 		      /* If there was a reloc specifier, then it was
   1922 			 attached to the prefix.  Note that we can't check
   1923 			 that the reloc size matches, since we don't have
   1924 			 all the operands yet in all cases.  */
   1925 		      if (prefixp->reloc != BFD_RELOC_NONE)
   1926 			out_insnp->reloc = prefixp->reloc;
   1927 		    }
   1928 
   1929 		  out_insnp->opcode |= regno /* << 0 */ ;
   1930 		  continue;
   1931 		}
   1932 
   1933 	    case 'N':
   1934 	    case 'Y':
   1935 	      /* Like 's', but immediate operand only.  Also do not
   1936 		 modify insn.  There are no insns where an explicit reloc
   1937 		 specifier makes sense.  */
   1938 	      if (cris_get_expression (&s, &out_insnp->expr))
   1939 		{
   1940 		  imm_expr_found = 1;
   1941 		  continue;
   1942 		}
   1943 	      break;
   1944 
   1945 	    case 'n':
   1946 	      /* Like 'N', but PC-relative to the start of the insn.
   1947 		 There might be a :PLT to request a PLT entry.  */
   1948 	      if (cris_get_expression (&s, &out_insnp->expr))
   1949 		{
   1950 		  imm_expr_found = 1;
   1951 		  out_insnp->reloc = BFD_RELOC_32_PCREL;
   1952 
   1953 		  /* We have to adjust the expression, because that
   1954 		     relocation is to the location *after* the
   1955 		     relocation.  So add 2 for the insn and 4 for the
   1956 		     relocation.  */
   1957 		  out_insnp->expr.X_add_number += 6;
   1958 
   1959 		  /* TLS specifiers do not make sense here.  */
   1960 		  if (pic && *s == RELOC_SUFFIX_CHAR)
   1961 		    cris_get_reloc_suffix (&s, &out_insnp->reloc,
   1962 					   &out_insnp->expr);
   1963 
   1964 		  continue;
   1965 		}
   1966 	      break;
   1967 
   1968 	    case 'U':
   1969 	      /* Maybe 'u', maybe 'n'.  Only for LAPC/LAPCQ.  */
   1970 	      if (cris_get_expression (&s, &out_insnp->expr))
   1971 		{
   1972 		  out_insnp->reloc = BFD_RELOC_CRIS_LAPCQ_OFFSET;
   1973 
   1974 		  /* Define 1 as relaxing.  */
   1975 		  out_insnp->expr.X_md = 1;
   1976 		  continue;
   1977 		}
   1978 	      break;
   1979 
   1980 	    case 'u':
   1981 	      /* Four PC-relative bits in <3:0> representing <4:1>:0 of
   1982 		 an offset relative to the beginning of the current
   1983 		 insn.  */
   1984 	      if (cris_get_expression (&s, &out_insnp->expr))
   1985 		{
   1986 		  out_insnp->reloc = BFD_RELOC_CRIS_LAPCQ_OFFSET;
   1987 
   1988 		  /* Define 0 as non-relaxing.  */
   1989 		  out_insnp->expr.X_md = 0;
   1990 
   1991 		  /* We have to adjust the expression, because that
   1992 		     relocation is to the location *after* the
   1993 		     insn.  So add 2 for the insn.  */
   1994 		  out_insnp->expr.X_add_number += 2;
   1995 		  continue;
   1996 		}
   1997 	      break;
   1998 
   1999 	    case 'x':
   2000 	      /* Rs.m in bits <15:12> and <5:4>.  */
   2001 	      if (! get_gen_reg (&s, &regno)
   2002 		  || ! get_bwd_size_modifier (&s, &size_bits))
   2003 		break;
   2004 	      else
   2005 		{
   2006 		  out_insnp->opcode |= (regno << 12) | (size_bits << 4);
   2007 		  continue;
   2008 		}
   2009 
   2010 	    case 'y':
   2011 	      /* Source operand in bits <10>, <3:0> and optionally a
   2012 		 prefix; i.e. an indirect operand or an side-effect
   2013 		 prefix.
   2014 
   2015 		 The difference to 's' is that this does not allow an
   2016 		 "immediate" expression.  */
   2017 	      if (! get_autoinc_prefix_or_indir_op (&s, prefixp,
   2018 						    &mode, &regno,
   2019 						    &imm_expr_found,
   2020 						    &out_insnp->expr)
   2021 		  || imm_expr_found)
   2022 		break;
   2023 	      else
   2024 		{
   2025 		  if (prefixp->kind != PREFIX_NONE)
   2026 		    {
   2027 		      /* A prefix, and those matched here always have
   2028 			 side-effects (see 's' case).  */
   2029 		      out_insnp->opcode |= (AUTOINCR_BIT << 8);
   2030 		    }
   2031 		  else
   2032 		    {
   2033 		      /* No prefix.  The "mode" variable contains bits
   2034 			 like whether or not this is autoincrement
   2035 			 mode.  */
   2036 		      out_insnp->opcode |= (mode << 10);
   2037 		    }
   2038 
   2039 		  out_insnp->opcode |= regno /* << 0 */;
   2040 		  continue;
   2041 		}
   2042 
   2043 	    case 'z':
   2044 	      /* Size modifier (B or W) in bit <4>.  */
   2045 	      if (! get_bw_size_modifier (&s, &size_bits))
   2046 		break;
   2047 	      else
   2048 		{
   2049 		  out_insnp->opcode |= size_bits << 4;
   2050 		  continue;
   2051 		}
   2052 
   2053 	    case 'T':
   2054 	      if (cris_arch == arch_crisv32
   2055 		  && get_sup_reg (&s, &regno))
   2056 		{
   2057 		  out_insnp->opcode |= regno << 12;
   2058 		  continue;
   2059 		}
   2060 	      break;
   2061 
   2062 	    default:
   2063 	      BAD_CASE (*args);
   2064 	    }
   2065 
   2066 	  /* We get here when we fail a match above or we found a
   2067 	     complete match.  Break out of this loop.  */
   2068 	  break;
   2069 	}
   2070 
   2071       /* Was it a match or a miss?  */
   2072       if (match == 0)
   2073 	{
   2074 	  /* If it's just that the args don't match, maybe the next
   2075 	     item in the table is the same opcode but with
   2076 	     matching operands.  First skip any invalid ones.  */
   2077 	  while (instruction[1].name != NULL
   2078 		 && strcmp (instruction->name, instruction[1].name) == 0
   2079 		 && ! cris_insn_ver_valid_for_arch (instruction[1]
   2080 						    .applicable_version,
   2081 						    cris_arch))
   2082 	    ++instruction;
   2083 
   2084 	  if (instruction[1].name != NULL
   2085 	      && strcmp (instruction->name, instruction[1].name) == 0
   2086 	      && cris_insn_ver_valid_for_arch (instruction[1]
   2087 					       .applicable_version,
   2088 					       cris_arch))
   2089 	    {
   2090 	      /* Yep.  Restart and try that one instead.  */
   2091 	      ++instruction;
   2092 	      s = operands;
   2093 	      continue;
   2094 	    }
   2095 	  else
   2096 	    {
   2097 	      /* We've come to the end of instructions with this
   2098 		 opcode, so it must be an error.  */
   2099 	      as_bad (_("Illegal operands"));
   2100 
   2101 	      /* As discard_rest_of_line, but without continuing to the
   2102 		 next line.  */
   2103 	      while (!is_end_of_line[(unsigned char) *input_line_pointer])
   2104 		input_line_pointer++;
   2105 	      return;
   2106 	    }
   2107 	}
   2108       else
   2109 	{
   2110 	  /* We have a match.  Check if there's anything more to do.  */
   2111 	  if (imm_expr_found)
   2112 	    {
   2113 	      /* There was an immediate mode operand, so we must check
   2114 		 that it has an appropriate size.  */
   2115 	      switch (instruction->imm_oprnd_size)
   2116 		{
   2117 		default:
   2118 		case SIZE_NONE:
   2119 		  /* Shouldn't happen; this one does not have immediate
   2120 		     operands with different sizes.  */
   2121 		  BAD_CASE (instruction->imm_oprnd_size);
   2122 		  break;
   2123 
   2124 		case SIZE_FIX_32:
   2125 		  out_insnp->imm_oprnd_size = 4;
   2126 		  break;
   2127 
   2128 		case SIZE_SPEC_REG:
   2129 		  if (cris_arch == arch_crisv32)
   2130 		    /* All immediate loads of special registers are
   2131 		       32-bit on CRISv32.  */
   2132 		    out_insnp->imm_oprnd_size = 4;
   2133 		  else
   2134 		    switch (out_insnp->spec_reg->reg_size)
   2135 		      {
   2136 		      case 1:
   2137 			if (out_insnp->expr.X_op == O_constant
   2138 			    && (out_insnp->expr.X_add_number < -128
   2139 				|| out_insnp->expr.X_add_number > 255))
   2140 			  cris_bad (_("Immediate value not in 8 bit range: %ld"),
   2141 				    &out_insnp->expr.X_add_number);
   2142 			/* Fall through.  */
   2143 		      case 2:
   2144 			/* FIXME:  We need an indicator in the instruction
   2145 			   table to pass on, to indicate if we need to check
   2146 			   overflow for a signed or unsigned number.  */
   2147 			if (out_insnp->expr.X_op == O_constant
   2148 			    && (out_insnp->expr.X_add_number < -32768
   2149 				|| out_insnp->expr.X_add_number > 65535))
   2150 			  cris_bad (_("Immediate value not in 16 bit range: %ld"),
   2151 				    &out_insnp->expr.X_add_number);
   2152 			out_insnp->imm_oprnd_size = 2;
   2153 			break;
   2154 
   2155 		      case 4:
   2156 			out_insnp->imm_oprnd_size = 4;
   2157 			break;
   2158 
   2159 		      default:
   2160 			BAD_CASE (out_insnp->spec_reg->reg_size);
   2161 		      }
   2162 		  break;
   2163 
   2164 		case SIZE_FIELD:
   2165 		case SIZE_FIELD_SIGNED:
   2166 		case SIZE_FIELD_UNSIGNED:
   2167 		  switch (size_bits)
   2168 		    {
   2169 		      /* FIXME: Find way to pass un/signedness to
   2170 			 caller, and set reloc type instead, postponing
   2171 			 this check until cris_number_to_imm.  That
   2172 			 necessarily corrects the reloc type for the
   2173 			 byte case, maybe requiring further changes.  */
   2174 		    case 0:
   2175 		      if (out_insnp->expr.X_op == O_constant)
   2176 			{
   2177 			  if (instruction->imm_oprnd_size == SIZE_FIELD
   2178 			      && (out_insnp->expr.X_add_number < -128
   2179 				  || out_insnp->expr.X_add_number > 255))
   2180 			    cris_bad (_("Immediate value not in 8 bit range: %ld"),
   2181 				      &out_insnp->expr.X_add_number);
   2182 			  else if (instruction->imm_oprnd_size == SIZE_FIELD_SIGNED
   2183 			      && (out_insnp->expr.X_add_number < -128
   2184 				  || out_insnp->expr.X_add_number > 127))
   2185 			    cris_bad (_("Immediate value not in 8 bit signed range: %ld"),
   2186 				      &out_insnp->expr.X_add_number);
   2187 			  else if (instruction->imm_oprnd_size == SIZE_FIELD_UNSIGNED
   2188 				   && (out_insnp->expr.X_add_number < 0
   2189 				       || out_insnp->expr.X_add_number > 255))
   2190 			    cris_bad (_("Immediate value not in 8 bit unsigned range: %ld"),
   2191 				      &out_insnp->expr.X_add_number);
   2192 			}
   2193 
   2194 		      /* Fall through.  */
   2195 		    case 1:
   2196 		      if (out_insnp->expr.X_op == O_constant)
   2197 			{
   2198 			  if (instruction->imm_oprnd_size == SIZE_FIELD
   2199 			      && (out_insnp->expr.X_add_number < -32768
   2200 				  || out_insnp->expr.X_add_number > 65535))
   2201 			    cris_bad (_("Immediate value not in 16 bit range: %ld"),
   2202 				      &out_insnp->expr.X_add_number);
   2203 			  else if (instruction->imm_oprnd_size == SIZE_FIELD_SIGNED
   2204 			      && (out_insnp->expr.X_add_number < -32768
   2205 				  || out_insnp->expr.X_add_number > 32767))
   2206 			    cris_bad (_("Immediate value not in 16 bit signed range: %ld"),
   2207 				      &out_insnp->expr.X_add_number);
   2208 			  else if (instruction->imm_oprnd_size == SIZE_FIELD_UNSIGNED
   2209 			      && (out_insnp->expr.X_add_number < 0
   2210 				  || out_insnp->expr.X_add_number > 65535))
   2211 			    cris_bad (_("Immediate value not in 16 bit unsigned range: %ld"),
   2212 				      &out_insnp->expr.X_add_number);
   2213 			}
   2214 		      out_insnp->imm_oprnd_size = 2;
   2215 		      break;
   2216 
   2217 		    case 2:
   2218 		      out_insnp->imm_oprnd_size = 4;
   2219 		      break;
   2220 
   2221 		    default:
   2222 		      BAD_CASE (out_insnp->spec_reg->reg_size);
   2223 		    }
   2224 		}
   2225 
   2226 	      /* If there was a relocation specified for the immediate
   2227 		 expression (i.e. it had a PIC or TLS modifier) check that the
   2228 		 size of the relocation matches the size specified by
   2229 		 the opcode.  */
   2230 	      if (out_insnp->reloc != BFD_RELOC_NONE
   2231 		  && (cris_get_specified_reloc_size (out_insnp->reloc)
   2232 		      != (unsigned int) out_insnp->imm_oprnd_size))
   2233 		as_bad (out_insnp->reloc == BFD_RELOC_CRIS_32_GD
   2234 			|| out_insnp->reloc == BFD_RELOC_CRIS_32_TPREL
   2235 			|| out_insnp->reloc == BFD_RELOC_CRIS_16_TPREL
   2236 			|| out_insnp->reloc == BFD_RELOC_CRIS_32_IE
   2237 			? _("TLS relocation size does not match operand size")
   2238 			: _("PIC relocation size does not match operand size"));
   2239 	    }
   2240 	  else if (instruction->op == cris_muls_op
   2241 		   || instruction->op == cris_mulu_op)
   2242 	    out_insnp->insn_type = CRIS_INSN_MUL;
   2243 	}
   2244       break;
   2245     }
   2246 }
   2247 
   2248 /* Get a B, W, or D size modifier from the string pointed out by *cPP,
   2249    which must point to a '.' in front of the modifier.	On successful
   2250    return, *cPP is advanced to the character following the size
   2251    modifier, and is undefined otherwise.
   2252 
   2253    cPP		Pointer to pointer to string starting
   2254 		with the size modifier.
   2255 
   2256    size_bitsp	Pointer to variable to contain the size bits on
   2257 		successful return.
   2258 
   2259    Return 1 iff a correct size modifier is found, else 0.  */
   2260 
   2261 static int
   2262 get_bwd_size_modifier (char **cPP, int *size_bitsp)
   2263 {
   2264   if (**cPP != '.')
   2265     return 0;
   2266   else
   2267     {
   2268       /* Consume the '.'.  */
   2269       (*cPP)++;
   2270 
   2271       switch (**cPP)
   2272 	{
   2273 	case 'B':
   2274 	case 'b':
   2275 	  *size_bitsp = 0;
   2276 	  break;
   2277 
   2278 	case 'W':
   2279 	case 'w':
   2280 	  *size_bitsp = 1;
   2281 	  break;
   2282 
   2283 	case 'D':
   2284 	case 'd':
   2285 	  *size_bitsp = 2;
   2286 	  break;
   2287 
   2288 	default:
   2289 	  return 0;
   2290 	}
   2291 
   2292       /* Consume the size letter.  */
   2293       (*cPP)++;
   2294       return 1;
   2295     }
   2296 }
   2297 
   2298 /* Get a B or W size modifier from the string pointed out by *cPP,
   2299    which must point to a '.' in front of the modifier.	On successful
   2300    return, *cPP is advanced to the character following the size
   2301    modifier, and is undefined otherwise.
   2302 
   2303    cPP		Pointer to pointer to string starting
   2304 		with the size modifier.
   2305 
   2306    size_bitsp	Pointer to variable to contain the size bits on
   2307 		successful return.
   2308 
   2309    Return 1 iff a correct size modifier is found, else 0.  */
   2310 
   2311 static int
   2312 get_bw_size_modifier (char **cPP, int *size_bitsp)
   2313 {
   2314   if (**cPP != '.')
   2315     return 0;
   2316   else
   2317     {
   2318       /* Consume the '.'.  */
   2319       (*cPP)++;
   2320 
   2321       switch (**cPP)
   2322 	{
   2323 	case 'B':
   2324 	case 'b':
   2325 	  *size_bitsp = 0;
   2326 	  break;
   2327 
   2328 	case 'W':
   2329 	case 'w':
   2330 	  *size_bitsp = 1;
   2331 	  break;
   2332 
   2333 	default:
   2334 	  return 0;
   2335 	}
   2336 
   2337       /* Consume the size letter.  */
   2338       (*cPP)++;
   2339       return 1;
   2340     }
   2341 }
   2342 
   2343 /* Get a general register from the string pointed out by *cPP.  The
   2344    variable *cPP is advanced to the character following the general
   2345    register name on a successful return, and has its initial position
   2346    otherwise.
   2347 
   2348    cPP	    Pointer to pointer to string, beginning with a general
   2349 	    register name.
   2350 
   2351    regnop   Pointer to int containing the register number.
   2352 
   2353    Return 1 iff a correct general register designator is found,
   2354 	    else 0.  */
   2355 
   2356 static int
   2357 get_gen_reg (char **cPP, int *regnop)
   2358 {
   2359   char *oldp;
   2360   oldp = *cPP;
   2361 
   2362   /* Handle a sometimes-mandatory dollar sign as register prefix.  */
   2363   if (**cPP == REGISTER_PREFIX_CHAR)
   2364     (*cPP)++;
   2365   else if (demand_register_prefix)
   2366     return 0;
   2367 
   2368   switch (**cPP)
   2369     {
   2370     case 'P':
   2371     case 'p':
   2372       /* "P" as in "PC"?  Consume the "P".  */
   2373       (*cPP)++;
   2374 
   2375       if ((**cPP == 'C' || **cPP == 'c')
   2376 	  && ! ISALNUM ((*cPP)[1])
   2377 	  /* Here's a little twist: For v32 and the compatibility mode,
   2378 	     we only recognize PC as a register number if there's '+]'
   2379 	     after.  We don't consume that, but the presence can only be
   2380 	     valid after a register in a post-increment context, which
   2381 	     is also the only valid context for PC as a register for
   2382 	     v32.  Not that it's used very often, but saying "MOVE.D
   2383 	     [PC+],R5" should remain valid.  It's not supported for
   2384 	     jump-type insns or other insns with no [Rn+] mode, though.  */
   2385 	  && ((cris_arch != arch_crisv32
   2386 	       && cris_arch != arch_cris_common_v10_v32)
   2387 	      || ((*cPP)[1] == '+' && (*cPP)[2] == ']')))
   2388 	{
   2389 	  /* It's "PC": consume the "c" and we're done.  */
   2390 	  (*cPP)++;
   2391 	  *regnop = REG_PC;
   2392 	  return 1;
   2393 	}
   2394       break;
   2395 
   2396       /* Like with PC, we recognize ACR, but only if it's *not* followed
   2397 	 by '+', and only for v32.  */
   2398     case 'A':
   2399     case 'a':
   2400       if (cris_arch != arch_crisv32
   2401 	  || ((*cPP)[1] != 'c' && (*cPP)[1] != 'C')
   2402 	  || ((*cPP)[2] != 'r' && (*cPP)[2] != 'R')
   2403 	  || ISALNUM ((*cPP)[3])
   2404 	  || (*cPP)[3] == '+')
   2405 	break;
   2406       (*cPP) += 3;
   2407       *regnop = 15;
   2408       return 1;
   2409 
   2410     case 'R':
   2411     case 'r':
   2412       /* Hopefully r[0-9] or r1[0-5].  Consume 'R' or 'r'.  */
   2413       (*cPP)++;
   2414 
   2415       if (ISDIGIT (**cPP))
   2416 	{
   2417 	  /* It's r[0-9].  Consume and check the next digit.  */
   2418 	  *regnop = **cPP - '0';
   2419 	  (*cPP)++;
   2420 
   2421 	  if (! ISALNUM (**cPP))
   2422 	    {
   2423 	      /* No more digits, we're done.  */
   2424 	      return 1;
   2425 	    }
   2426 	  else
   2427 	    {
   2428 	      /* One more digit.  Consume and add.  */
   2429 	      *regnop = *regnop * 10 + (**cPP - '0');
   2430 
   2431 	      /* We need to check for a valid register number; Rn,
   2432 		 0 <= n <= MAX_REG.  */
   2433 	      if (*regnop <= MAX_REG)
   2434 		{
   2435 		  /* Consume second digit.  */
   2436 		  (*cPP)++;
   2437 		  return 1;
   2438 		}
   2439 	    }
   2440 	}
   2441       break;
   2442 
   2443     case 'S':
   2444     case 's':
   2445       /* "S" as in "SP"?  Consume the "S".  */
   2446       (*cPP)++;
   2447       if (**cPP == 'P' || **cPP == 'p')
   2448 	{
   2449 	  /* It's "SP": consume the "p" and we're done.  */
   2450 	  (*cPP)++;
   2451 	  *regnop = REG_SP;
   2452 	  return 1;
   2453 	}
   2454       break;
   2455 
   2456     default:
   2457       /* Just here to silence compilation warnings.  */
   2458       ;
   2459     }
   2460 
   2461   /* We get here if we fail.  Restore the pointer.  */
   2462   *cPP = oldp;
   2463   return 0;
   2464 }
   2465 
   2466 /* Get a special register from the string pointed out by *cPP. The
   2467    variable *cPP is advanced to the character following the special
   2468    register name if one is found, and retains its original position
   2469    otherwise.
   2470 
   2471    cPP	    Pointer to pointer to string starting with a special register
   2472 	    name.
   2473 
   2474    sregpp   Pointer to Pointer to struct spec_reg, where a pointer to the
   2475 	    register description will be stored.
   2476 
   2477    Return 1 iff a correct special register name is found.  */
   2478 
   2479 static int
   2480 get_spec_reg (char **cPP, const struct cris_spec_reg **sregpp)
   2481 {
   2482   char *s1;
   2483   const char *s2;
   2484   char *name_begin = *cPP;
   2485 
   2486   const struct cris_spec_reg *sregp;
   2487 
   2488   /* Handle a sometimes-mandatory dollar sign as register prefix.  */
   2489   if (*name_begin == REGISTER_PREFIX_CHAR)
   2490     name_begin++;
   2491   else if (demand_register_prefix)
   2492     return 0;
   2493 
   2494   /* Loop over all special registers.  */
   2495   for (sregp = cris_spec_regs; sregp->name != NULL; sregp++)
   2496     {
   2497       /* Start over from beginning of the supposed name.  */
   2498       s1 = name_begin;
   2499       s2 = sregp->name;
   2500 
   2501       while (*s2 != '\0' && TOLOWER (*s1) == *s2)
   2502 	{
   2503 	  s1++;
   2504 	  s2++;
   2505 	}
   2506 
   2507       /* For a match, we must have consumed the name in the table, and we
   2508 	 must be outside what could be part of a name.	Assume here that a
   2509 	 test for alphanumerics is sufficient for a name test.  */
   2510       if (*s2 == 0 && ! ISALNUM (*s1)
   2511 	  && cris_insn_ver_valid_for_arch (sregp->applicable_version,
   2512 					   cris_arch))
   2513 	{
   2514 	  /* We have a match.  Update the pointer and be done.  */
   2515 	  *cPP = s1;
   2516 	  *sregpp = sregp;
   2517 	  return 1;
   2518 	}
   2519     }
   2520 
   2521   /* If we got here, we did not find any name.  */
   2522   return 0;
   2523 }
   2524 
   2525 /* Get a support register from the string pointed out by *cPP. The
   2526    variable *cPP is advanced to the character following the support-
   2527    register name if one is found, and retains its original position
   2528    otherwise.
   2529 
   2530    cPP	    Pointer to pointer to string starting with a support-register
   2531 	    name.
   2532 
   2533    sregpp   Pointer to int containing the register number.
   2534 
   2535    Return 1 iff a correct support-register name is found.  */
   2536 
   2537 static int
   2538 get_sup_reg (char **cPP, int *regnop)
   2539 {
   2540   char *s1;
   2541   const char *s2;
   2542   char *name_begin = *cPP;
   2543 
   2544   const struct cris_support_reg *sregp;
   2545 
   2546   /* Handle a sometimes-mandatory dollar sign as register prefix.  */
   2547   if (*name_begin == REGISTER_PREFIX_CHAR)
   2548     name_begin++;
   2549   else if (demand_register_prefix)
   2550     return 0;
   2551 
   2552   /* Loop over all support-registers.  */
   2553   for (sregp = cris_support_regs; sregp->name != NULL; sregp++)
   2554     {
   2555       /* Start over from beginning of the supposed name.  */
   2556       s1 = name_begin;
   2557       s2 = sregp->name;
   2558 
   2559       while (*s2 != '\0' && TOLOWER (*s1) == *s2)
   2560 	{
   2561 	  s1++;
   2562 	  s2++;
   2563 	}
   2564 
   2565       /* For a match, we must have consumed the name in the table, and we
   2566 	 must be outside what could be part of a name.	Assume here that a
   2567 	 test for alphanumerics is sufficient for a name test.  */
   2568       if (*s2 == 0 && ! ISALNUM (*s1))
   2569 	{
   2570 	  /* We have a match.  Update the pointer and be done.  */
   2571 	  *cPP = s1;
   2572 	  *regnop = sregp->number;
   2573 	  return 1;
   2574 	}
   2575     }
   2576 
   2577   /* If we got here, we did not find any name.  */
   2578   return 0;
   2579 }
   2580 
   2581 /* Get an unprefixed or side-effect-prefix operand from the string pointed
   2582    out by *cPP.  The pointer *cPP is advanced to the character following
   2583    the indirect operand if we have success, else it contains an undefined
   2584    value.
   2585 
   2586    cPP		 Pointer to pointer to string beginning with the first
   2587 		 character of the supposed operand.
   2588 
   2589    prefixp	 Pointer to structure containing an optional instruction
   2590 		 prefix.
   2591 
   2592    is_autoincp	 Pointer to int indicating the indirect or autoincrement
   2593 		 bits.
   2594 
   2595    src_regnop	 Pointer to int containing the source register number in
   2596 		 the instruction.
   2597 
   2598    imm_foundp	 Pointer to an int indicating if an immediate expression
   2599 		 is found.
   2600 
   2601    imm_exprP	 Pointer to a structure containing an immediate
   2602 		 expression, if success and if *imm_foundp is nonzero.
   2603 
   2604    Return 1 iff a correct indirect operand is found.  */
   2605 
   2606 static int
   2607 get_autoinc_prefix_or_indir_op (char **cPP, struct cris_prefix *prefixp,
   2608 				int *is_autoincp, int *src_regnop,
   2609 				int *imm_foundp, expressionS *imm_exprP)
   2610 {
   2611   /* Assume there was no immediate mode expression.  */
   2612   *imm_foundp = 0;
   2613 
   2614   if (**cPP == '[')
   2615     {
   2616       /* So this operand is one of:
   2617 	 Indirect: [rN]
   2618 	 Autoincrement: [rN+]
   2619 	 Indexed with assign: [rN=rM+rO.S]
   2620 	 Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s]
   2621 
   2622 	 Either way, consume the '['.  */
   2623       (*cPP)++;
   2624 
   2625       /* Get the rN register.  */
   2626       if (! get_gen_reg (cPP, src_regnop))
   2627 	/* If there was no register, then this cannot match.  */
   2628 	return 0;
   2629       else
   2630 	{
   2631 	  /* We got the register, now check the next character.  */
   2632 	  switch (**cPP)
   2633 	    {
   2634 	    case ']':
   2635 	      /* Indirect mode.  We're done here.  */
   2636 	      prefixp->kind = PREFIX_NONE;
   2637 	      *is_autoincp = 0;
   2638 	      break;
   2639 
   2640 	    case '+':
   2641 	      /* This must be an auto-increment mode, if there's a
   2642 		 match.  */
   2643 	      prefixp->kind = PREFIX_NONE;
   2644 	      *is_autoincp = 1;
   2645 
   2646 	      /* We consume this character and break out to check the
   2647 		 closing ']'.  */
   2648 	      (*cPP)++;
   2649 	      break;
   2650 
   2651 	    case '=':
   2652 	      /* This must be indexed with assign, or offset with assign
   2653 		 to match.  Not supported for crisv32 or in
   2654 		 compatibility mode.  */
   2655 	      if (cris_arch == arch_crisv32
   2656 		  || cris_arch == arch_cris_common_v10_v32)
   2657 		return 0;
   2658 
   2659 	      (*cPP)++;
   2660 
   2661 	      /* Either way, the next thing must be a register.  */
   2662 	      if (! get_gen_reg (cPP, &prefixp->base_reg_number))
   2663 		/* No register, no match.  */
   2664 		return 0;
   2665 	      else
   2666 		{
   2667 		  /* We've consumed "[rN=rM", so we must be looking at
   2668 		     "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or
   2669 		     "+[rO+].s]".  */
   2670 		  if (**cPP == '+')
   2671 		    {
   2672 		      int index_reg_number;
   2673 		      (*cPP)++;
   2674 
   2675 		      if (**cPP == '[')
   2676 			{
   2677 			  int size_bits;
   2678 			  /* This must be [rx=ry+[rz].s] or
   2679 			     [rx=ry+[rz+].s] or no match.  We must be
   2680 			     looking at rz after consuming the '['.  */
   2681 			  (*cPP)++;
   2682 
   2683 			  if (!get_gen_reg (cPP, &index_reg_number))
   2684 			    return 0;
   2685 
   2686 			  prefixp->kind = PREFIX_BDAP;
   2687 			  prefixp->opcode
   2688 			    = (BDAP_INDIR_OPCODE
   2689 			       + (prefixp->base_reg_number << 12)
   2690 			       + index_reg_number);
   2691 
   2692 			  if (**cPP == '+')
   2693 			    {
   2694 			      /* We've seen "[rx=ry+[rz+" here, so now we
   2695 				 know that there must be "].s]" left to
   2696 				 check.  */
   2697 			      (*cPP)++;
   2698 			      prefixp->opcode |= AUTOINCR_BIT << 8;
   2699 			    }
   2700 
   2701 			  /* If it wasn't autoincrement, we don't need to
   2702 			     add anything.  */
   2703 
   2704 			  /* Check the next-to-last ']'.  */
   2705 			  if (**cPP != ']')
   2706 			    return 0;
   2707 
   2708 			  (*cPP)++;
   2709 
   2710 			  /* Check the ".s" modifier.  */
   2711 			  if (! get_bwd_size_modifier (cPP, &size_bits))
   2712 			    return 0;
   2713 
   2714 			  prefixp->opcode |= size_bits << 4;
   2715 
   2716 			  /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s.
   2717 			     We break out to check the final ']'.  */
   2718 			  break;
   2719 			}
   2720 		      /* It wasn't an indirection.  Check if it's a
   2721 			 register.  */
   2722 		      else if (get_gen_reg (cPP, &index_reg_number))
   2723 			{
   2724 			  int size_bits;
   2725 
   2726 			  /* Indexed with assign mode: "[rN+rM.S]".  */
   2727 			  prefixp->kind = PREFIX_BIAP;
   2728 			  prefixp->opcode
   2729 			    = (BIAP_OPCODE + (index_reg_number << 12)
   2730 			       + prefixp->base_reg_number /* << 0 */);
   2731 
   2732 			  if (! get_bwd_size_modifier (cPP, &size_bits))
   2733 			    /* Size missing, this isn't a match.  */
   2734 			    return 0;
   2735 			  else
   2736 			    {
   2737 			      /* Size found, break out to check the
   2738 				 final ']'.  */
   2739 			      prefixp->opcode |= size_bits << 4;
   2740 			      break;
   2741 			    }
   2742 			}
   2743 		      /* Not a register.  Then this must be "[rN+I]".  */
   2744 		      else if (cris_get_expression (cPP, &prefixp->expr))
   2745 			{
   2746 			  /* We've got offset with assign mode.  Fill
   2747 			     in the blanks and break out to match the
   2748 			     final ']'.  */
   2749 			  prefixp->kind = PREFIX_BDAP_IMM;
   2750 
   2751 			  /* We tentatively put an opcode corresponding to
   2752 			     a 32-bit operand here, although it may be
   2753 			     relaxed when there's no relocation
   2754 			     specifier for the operand.  */
   2755 			  prefixp->opcode
   2756 			    = (BDAP_INDIR_OPCODE
   2757 			       | (prefixp->base_reg_number << 12)
   2758 			       | (AUTOINCR_BIT << 8)
   2759 			       | (2 << 4)
   2760 			       | REG_PC /* << 0 */);
   2761 
   2762 			  /* This can have a PIC suffix, specifying reloc
   2763 			     type to use.  */
   2764 			  if ((pic || tls) && **cPP == RELOC_SUFFIX_CHAR)
   2765 			    {
   2766 			      unsigned int relocsize;
   2767 
   2768 			      cris_get_reloc_suffix (cPP, &prefixp->reloc,
   2769 						     &prefixp->expr);
   2770 
   2771 			      /* Tweak the size of the immediate operand
   2772 				 in the prefix opcode if it isn't what we
   2773 				 set.  */
   2774 			      relocsize
   2775 				= cris_get_specified_reloc_size (prefixp->reloc);
   2776 			      if (relocsize != 4)
   2777 				prefixp->opcode
   2778 				  = ((prefixp->opcode & ~(3 << 4))
   2779 				     | ((relocsize >> 1) << 4));
   2780 			    }
   2781 			  break;
   2782 			}
   2783 		      else
   2784 			/* Neither register nor expression found, so
   2785 			   this can't be a match.  */
   2786 			return 0;
   2787 		    }
   2788 		  /* Not "[rN+" but perhaps "[rN-"?  */
   2789 		  else if (**cPP == '-')
   2790 		    {
   2791 		      /* We must have an offset with assign mode.  */
   2792 		      if (! cris_get_expression (cPP, &prefixp->expr))
   2793 			/* No expression, no match.  */
   2794 			return 0;
   2795 		      else
   2796 			{
   2797 			  /* We've got offset with assign mode.  Fill
   2798 			     in the blanks and break out to match the
   2799 			     final ']'.
   2800 
   2801 			     Note that we don't allow a relocation
   2802 			     suffix for an operand with a minus
   2803 			     sign.  */
   2804 			  prefixp->kind = PREFIX_BDAP_IMM;
   2805 			  break;
   2806 			}
   2807 		    }
   2808 		  else
   2809 		    /* Neither '+' nor '-' after "[rN=rM".  Lose.  */
   2810 		    return 0;
   2811 		}
   2812 	    default:
   2813 	      /* Neither ']' nor '+' nor '=' after "[rN".  Lose.  */
   2814 	      return 0;
   2815 	    }
   2816 	}
   2817 
   2818       /* When we get here, we have a match and will just check the closing
   2819 	 ']'.  We can still fail though.  */
   2820       if (**cPP != ']')
   2821 	return 0;
   2822       else
   2823 	{
   2824 	  /* Don't forget to consume the final ']'.
   2825 	     Then return in glory.  */
   2826 	  (*cPP)++;
   2827 	  return 1;
   2828 	}
   2829     }
   2830   /* No indirection.  Perhaps a constant?  */
   2831   else if (cris_get_expression (cPP, imm_exprP))
   2832     {
   2833       /* Expression found, this is immediate mode.  */
   2834       prefixp->kind = PREFIX_NONE;
   2835       *is_autoincp = 1;
   2836       *src_regnop = REG_PC;
   2837       *imm_foundp = 1;
   2838 
   2839       /* This can have a PIC suffix, specifying reloc type to use.  The
   2840 	 caller must check that the reloc size matches the operand size.  */
   2841       if ((pic || tls) && **cPP == RELOC_SUFFIX_CHAR)
   2842 	cris_get_reloc_suffix (cPP, &prefixp->reloc, imm_exprP);
   2843 
   2844       return 1;
   2845     }
   2846 
   2847   /* No luck today.  */
   2848   return 0;
   2849 }
   2850 
   2851 /* This function gets an indirect operand in a three-address operand
   2852    combination from the string pointed out by *cPP.  The pointer *cPP is
   2853    advanced to the character following the indirect operand on success, or
   2854    has an unspecified value on failure.
   2855 
   2856    cPP	     Pointer to pointer to string beginning
   2857 	     with the operand
   2858 
   2859    prefixp   Pointer to structure containing an
   2860 	     instruction prefix
   2861 
   2862    Returns 1 iff a correct indirect operand is found.  */
   2863 
   2864 static int
   2865 get_3op_or_dip_prefix_op (char **cPP, struct cris_prefix *prefixp)
   2866 {
   2867   int reg_number;
   2868 
   2869   if (**cPP != '[')
   2870     /* We must have a '[' or it's a clean failure.  */
   2871     return 0;
   2872 
   2873   /* Eat the first '['.  */
   2874   (*cPP)++;
   2875 
   2876   if (**cPP == '[')
   2877     {
   2878       /* A second '[', so this must be double-indirect mode.  */
   2879       (*cPP)++;
   2880       prefixp->kind = PREFIX_DIP;
   2881       prefixp->opcode = DIP_OPCODE;
   2882 
   2883       /* Get the register or fail entirely.  */
   2884       if (! get_gen_reg (cPP, &reg_number))
   2885 	return 0;
   2886       else
   2887 	{
   2888 	  prefixp->opcode |= reg_number /* << 0 */ ;
   2889 	  if (**cPP == '+')
   2890 	    {
   2891 	      /* Since we found a '+', this must be double-indirect
   2892 		 autoincrement mode.  */
   2893 	      (*cPP)++;
   2894 	      prefixp->opcode |= AUTOINCR_BIT << 8;
   2895 	    }
   2896 
   2897 	  /* There's nothing particular to do, if this was a
   2898 	     double-indirect *without* autoincrement.  */
   2899 	}
   2900 
   2901       /* Check the first ']'.  The second one is checked at the end.  */
   2902       if (**cPP != ']')
   2903 	return 0;
   2904 
   2905       /* Eat the first ']', so we'll be looking at a second ']'.  */
   2906       (*cPP)++;
   2907     }
   2908   /* No second '['.  Then we should have a register here, making
   2909      it "[rN".  */
   2910   else if (get_gen_reg (cPP, &prefixp->base_reg_number))
   2911     {
   2912       /* This must be indexed or offset mode: "[rN+I]" or
   2913 	 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]".  */
   2914       if (**cPP == '+')
   2915 	{
   2916 	  int index_reg_number;
   2917 
   2918 	  (*cPP)++;
   2919 
   2920 	  if (**cPP == '[')
   2921 	    {
   2922 	      /* This is "[rx+["...  Expect a register next.  */
   2923 	      int size_bits;
   2924 	      (*cPP)++;
   2925 
   2926 	      if (!get_gen_reg (cPP, &index_reg_number))
   2927 		return 0;
   2928 
   2929 	      prefixp->kind = PREFIX_BDAP;
   2930 	      prefixp->opcode
   2931 		= (BDAP_INDIR_OPCODE
   2932 		   + (prefixp->base_reg_number << 12)
   2933 		   + index_reg_number);
   2934 
   2935 	      /* We've seen "[rx+[ry", so check if this is
   2936 		 autoincrement.  */
   2937 	      if (**cPP == '+')
   2938 		{
   2939 		  /* Yep, now at "[rx+[ry+".  */
   2940 		  (*cPP)++;
   2941 		  prefixp->opcode |= AUTOINCR_BIT << 8;
   2942 		}
   2943 	      /* If it wasn't autoincrement, we don't need to
   2944 		 add anything.  */
   2945 
   2946 	      /* Check a first closing ']': "[rx+[ry]" or
   2947 		 "[rx+[ry+]".  */
   2948 	      if (**cPP != ']')
   2949 		return 0;
   2950 	      (*cPP)++;
   2951 
   2952 	      /* Now expect a size modifier ".S".  */
   2953 	      if (! get_bwd_size_modifier (cPP, &size_bits))
   2954 		return 0;
   2955 
   2956 	      prefixp->opcode |= size_bits << 4;
   2957 
   2958 	      /* Ok, all interesting stuff has been seen:
   2959 		 "[rx+[ry+].S" or "[rx+[ry].S".  We only need to
   2960 		 expect a final ']', which we'll do in a common
   2961 		 closing session.  */
   2962 	    }
   2963 	  /* Seen "[rN+", but not a '[', so check if we have a
   2964 	     register.  */
   2965 	  else if (get_gen_reg (cPP, &index_reg_number))
   2966 	    {
   2967 	      /* This is indexed mode: "[rN+rM.S]" or
   2968 		 "[rN+rM.S+]".  */
   2969 	      int size_bits;
   2970 	      prefixp->kind = PREFIX_BIAP;
   2971 	      prefixp->opcode
   2972 		= (BIAP_OPCODE
   2973 		   | prefixp->base_reg_number /* << 0 */
   2974 		   | (index_reg_number << 12));
   2975 
   2976 	      /* Consume the ".S".  */
   2977 	      if (! get_bwd_size_modifier (cPP, &size_bits))
   2978 		/* Missing size, so fail.  */
   2979 		return 0;
   2980 	      else
   2981 		/* Size found.  Add that piece and drop down to
   2982 		   the common checking of the closing ']'.  */
   2983 		prefixp->opcode |= size_bits << 4;
   2984 	    }
   2985 	  /* Seen "[rN+", but not a '[' or a register, so then
   2986 	     it must be a constant "I".
   2987 
   2988 	     As a quality of implementation improvement, we check for a
   2989 	     closing ']', like in an erroneous "[rN+]".  If we don't,
   2990 	     the expression parser will emit a confusing "bad
   2991 	     expression" when it sees the ']', probably because it
   2992 	     doesn't like seeing no expression.  */
   2993 	  else if (**cPP != ']' && cris_get_expression (cPP, &prefixp->expr))
   2994 	    {
   2995 	      /* Expression found, so fill in the bits of offset
   2996 		 mode and drop down to check the closing ']'.  */
   2997 	      prefixp->kind = PREFIX_BDAP_IMM;
   2998 
   2999 	      /* We tentatively put an opcode corresponding to a 32-bit
   3000 		 operand here, although it may be relaxed when there's no
   3001 		 PIC specifier for the operand.  */
   3002 	      prefixp->opcode
   3003 		= (BDAP_INDIR_OPCODE
   3004 		   | (prefixp->base_reg_number << 12)
   3005 		   | (AUTOINCR_BIT << 8)
   3006 		   | (2 << 4)
   3007 		   | REG_PC /* << 0 */);
   3008 
   3009 	      /* This can have a PIC suffix, specifying reloc type to use.  */
   3010 	      if ((pic || tls) && **cPP == RELOC_SUFFIX_CHAR)
   3011 		{
   3012 		  unsigned int relocsize;
   3013 
   3014 		  cris_get_reloc_suffix (cPP, &prefixp->reloc, &prefixp->expr);
   3015 
   3016 		  /* Tweak the size of the immediate operand in the prefix
   3017 		     opcode if it isn't what we set.  */
   3018 		  relocsize = cris_get_specified_reloc_size (prefixp->reloc);
   3019 		  if (relocsize != 4)
   3020 		    prefixp->opcode
   3021 		      = ((prefixp->opcode & ~(3 << 4))
   3022 			 | ((relocsize >> 1) << 4));
   3023 		}
   3024 	    }
   3025 	  else
   3026 	    /* Nothing valid here: lose.  */
   3027 	    return 0;
   3028 	}
   3029       /* Seen "[rN" but no '+', so check if it's a '-'.  */
   3030       else if (**cPP == '-')
   3031 	{
   3032 	  /* Yep, we must have offset mode.  */
   3033 	  if (! cris_get_expression (cPP, &prefixp->expr))
   3034 	    /* No expression, so we lose.  */
   3035 	    return 0;
   3036 	  else
   3037 	    {
   3038 	      /* Expression found to make this offset mode, so
   3039 		 fill those bits and drop down to check the
   3040 		 closing ']'.
   3041 
   3042 		 Note that we don't allow a PIC suffix for
   3043 		 an operand with a minus sign like this.  */
   3044 	      prefixp->kind = PREFIX_BDAP_IMM;
   3045 	    }
   3046 	}
   3047       else
   3048 	{
   3049 	  /* We've seen "[rN", but not '+' or '-'; rather a ']'.
   3050 	     Hmm.  Normally this is a simple indirect mode that we
   3051 	     shouldn't match, but if we expect ']', then we have a
   3052 	     zero offset, so it can be a three-address-operand,
   3053 	     like "[rN],rO,rP", thus offset mode.
   3054 
   3055 	     Don't eat the ']', that will be done in the closing
   3056 	     ceremony.  */
   3057 	  prefixp->expr.X_op = O_constant;
   3058 	  prefixp->expr.X_add_number = 0;
   3059 	  prefixp->expr.X_add_symbol = NULL;
   3060 	  prefixp->expr.X_op_symbol = NULL;
   3061 	  prefixp->kind = PREFIX_BDAP_IMM;
   3062 	}
   3063     }
   3064   /* A '[', but no second '[', and no register.  Check if we
   3065      have an expression, making this "[I]" for a double-indirect
   3066      prefix.  */
   3067   else if (cris_get_expression (cPP, &prefixp->expr))
   3068     {
   3069       /* Expression found, the so called absolute mode for a
   3070 	 double-indirect prefix on PC.  */
   3071       prefixp->kind = PREFIX_DIP;
   3072       prefixp->opcode = DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC;
   3073       prefixp->reloc = BFD_RELOC_32;
   3074 
   3075       /* For :GD and :IE, it makes sense to have TLS specifiers here.  */
   3076       if ((pic || tls) && **cPP == RELOC_SUFFIX_CHAR)
   3077 	cris_get_reloc_suffix (cPP, &prefixp->reloc, &prefixp->expr);
   3078     }
   3079   else
   3080     /* Neither '[' nor register nor expression.  We lose.  */
   3081     return 0;
   3082 
   3083   /* We get here as a closing ceremony to a successful match.  We just
   3084      need to check the closing ']'.  */
   3085   if (**cPP != ']')
   3086     /* Oops.  Close but no air-polluter.  */
   3087     return 0;
   3088 
   3089   /* Don't forget to consume that ']', before returning in glory.  */
   3090   (*cPP)++;
   3091   return 1;
   3092 }
   3093 
   3094 /* Get an expression from the string pointed out by *cPP.
   3095    The pointer *cPP is advanced to the character following the expression
   3096    on a success, or retains its original value otherwise.
   3097 
   3098    cPP	   Pointer to pointer to string beginning with the expression.
   3099 
   3100    exprP   Pointer to structure containing the expression.
   3101 
   3102    Return 1 iff a correct expression is found.  */
   3103 
   3104 static int
   3105 cris_get_expression (char **cPP, expressionS *exprP)
   3106 {
   3107   char *saved_input_line_pointer;
   3108 
   3109   /* The "expression" function expects to find an expression at the
   3110      global variable input_line_pointer, so we have to save it to give
   3111      the impression that we don't fiddle with global variables.  */
   3112   saved_input_line_pointer = input_line_pointer;
   3113   input_line_pointer = *cPP;
   3114 
   3115   /* Avoid a common error, confusing addressing modes.  Beware that the
   3116      call to expression below does not signal that error; it treats []
   3117      as parentheses, unless #define NEED_INDEX_OPERATOR in which case it
   3118      gives them other confusing semantics rather than plain outlawing
   3119      them, which is what we want.  */
   3120   if (*input_line_pointer == '[')
   3121     {
   3122       input_line_pointer = saved_input_line_pointer;
   3123       return 0;
   3124     }
   3125 
   3126   expression (exprP);
   3127   if (exprP->X_op == O_illegal || exprP->X_op == O_absent)
   3128     {
   3129       input_line_pointer = saved_input_line_pointer;
   3130       return 0;
   3131     }
   3132 
   3133   /* Everything seems to be fine, just restore the global
   3134      input_line_pointer and say we're successful.  */
   3135   *cPP = input_line_pointer;
   3136   input_line_pointer = saved_input_line_pointer;
   3137   return 1;
   3138 }
   3139 
   3140 /* Get a sequence of flag characters from *spp.  The pointer *cPP is
   3141    advanced to the character following the expression.	The flag
   3142    characters are consecutive, no commas or spaces.
   3143 
   3144    cPP	     Pointer to pointer to string beginning with the expression.
   3145 
   3146    flagp     Pointer to int to return the flags expression.
   3147 
   3148    Return 1 iff a correct flags expression is found.  */
   3149 
   3150 static int
   3151 get_flags (char **cPP, int *flagsp)
   3152 {
   3153   for (;;)
   3154     {
   3155       switch (**cPP)
   3156 	{
   3157 	case 'd':
   3158 	case 'D':
   3159 	  if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3,
   3160 					      cris_arch))
   3161 	    return 0;
   3162 	  *flagsp |= 0x80;
   3163 	  break;
   3164 
   3165 	case 'm':
   3166 	case 'M':
   3167 	  if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10,
   3168 					      cris_arch))
   3169 	    return 0;
   3170 	  *flagsp |= 0x80;
   3171 	  break;
   3172 
   3173 	case 'e':
   3174 	case 'E':
   3175 	  if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3,
   3176 					      cris_arch))
   3177 	    return 0;
   3178 	  *flagsp |= 0x40;
   3179 	  break;
   3180 
   3181 	case 'b':
   3182 	case 'B':
   3183 	  if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10,
   3184 					      cris_arch))
   3185 	    return 0;
   3186 	  *flagsp |= 0x40;
   3187 	  break;
   3188 
   3189 	case 'p':
   3190 	case 'P':
   3191 	  if (! cris_insn_ver_valid_for_arch (cris_ver_v32p,
   3192 					      cris_arch))
   3193 	    return 0;
   3194 	  *flagsp |= 0x80;
   3195 	  break;
   3196 
   3197 	case 'u':
   3198 	case 'U':
   3199 	  if (! cris_insn_ver_valid_for_arch (cris_ver_v32p,
   3200 					      cris_arch))
   3201 	    return 0;
   3202 	  *flagsp |= 0x40;
   3203 	  break;
   3204 
   3205 	case 'i':
   3206 	case 'I':
   3207 	  *flagsp |= 0x20;
   3208 	  break;
   3209 
   3210 	case 'x':
   3211 	case 'X':
   3212 	  *flagsp |= 0x10;
   3213 	  break;
   3214 
   3215 	case 'n':
   3216 	case 'N':
   3217 	  *flagsp |= 0x8;
   3218 	  break;
   3219 
   3220 	case 'z':
   3221 	case 'Z':
   3222 	  *flagsp |= 0x4;
   3223 	  break;
   3224 
   3225 	case 'v':
   3226 	case 'V':
   3227 	  *flagsp |= 0x2;
   3228 	  break;
   3229 
   3230 	case 'c':
   3231 	case 'C':
   3232 	  *flagsp |= 1;
   3233 	  break;
   3234 
   3235 	default:
   3236 	  /* We consider this successful if we stop at a comma or
   3237 	     whitespace.  Anything else, and we consider it a failure.  */
   3238 	  if (**cPP != ','
   3239 	      && **cPP != 0
   3240 	      && ! ISSPACE (**cPP))
   3241 	    return 0;
   3242 	  else
   3243 	    return 1;
   3244 	}
   3245 
   3246       /* Don't forget to consume each flag character.  */
   3247       (*cPP)++;
   3248     }
   3249 }
   3250 
   3251 /* Generate code and fixes for a BDAP prefix.
   3252    For v32, this handles ADDOQ because thankfully the opcodes are the
   3253    same.
   3254 
   3255    base_regno	Int containing the base register number.
   3256 
   3257    exprP	Pointer to structure containing the offset expression.  */
   3258 
   3259 static void
   3260 gen_bdap (int base_regno, expressionS *exprP)
   3261 {
   3262   unsigned int opcode;
   3263   char *opcodep;
   3264 
   3265   /* Put out the prefix opcode; assume quick immediate mode at first.  */
   3266   opcode = BDAP_QUICK_OPCODE | (base_regno << 12);
   3267   opcodep = cris_insn_first_word_frag ();
   3268   md_number_to_chars (opcodep, opcode, 2);
   3269 
   3270   if (exprP->X_op == O_constant)
   3271     {
   3272       /* We have an absolute expression that we know the size of right
   3273 	 now.  */
   3274       long int value;
   3275       int size;
   3276 
   3277       value = exprP->X_add_number;
   3278       if (value < -32768 || value > 32767)
   3279 	/* Outside range for a "word", make it a dword.  */
   3280 	size = 2;
   3281       else
   3282 	/* Assume "word" size.  */
   3283 	size = 1;
   3284 
   3285       /* If this is a signed-byte value, we can fit it into the prefix
   3286 	 insn itself.  */
   3287       if (value >= -128 && value <= 127)
   3288 	opcodep[0] = value;
   3289       else
   3290 	{
   3291 	  /* This is a word or dword displacement, which will be put in a
   3292 	     word or dword after the prefix.  */
   3293 	  char *p;
   3294 
   3295 	  opcodep[0] = BDAP_PC_LOW + (size << 4);
   3296 	  opcodep[1] &= 0xF0;
   3297 	  opcodep[1] |= BDAP_INCR_HIGH;
   3298 	  p = frag_more (1 << size);
   3299 	  md_number_to_chars (p, value, 1 << size);
   3300 	}
   3301     }
   3302   else
   3303     {
   3304       /* Handle complex expressions.  */
   3305       valueT addvalue
   3306 	= SIMPLE_EXPR (exprP) ? exprP->X_add_number : 0;
   3307       symbolS *sym
   3308 	= (SIMPLE_EXPR (exprP)
   3309 	   ? exprP->X_add_symbol : make_expr_symbol (exprP));
   3310 
   3311       /* The expression is not defined yet but may become absolute.  We
   3312 	 make it a relocation to be relaxed.  */
   3313       frag_var (rs_machine_dependent, 4, 0,
   3314 		ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF),
   3315 		sym, addvalue, opcodep);
   3316     }
   3317 }
   3318 
   3319 /* Encode a branch displacement in the range -256..254 into the form used
   3320    by CRIS conditional branch instructions.
   3321 
   3322    offset  The displacement value in bytes.  */
   3323 
   3324 static int
   3325 branch_disp (int offset)
   3326 {
   3327   int disp;
   3328 
   3329   /* Adjust all short branch offsets here.  */
   3330   if (cris_arch == arch_crisv32 || cris_arch == arch_cris_common_v10_v32)
   3331     offset += 2;
   3332 
   3333   disp = offset & 0xFE;
   3334 
   3335   if (offset < 0)
   3336     disp |= 1;
   3337 
   3338   return disp;
   3339 }
   3340 
   3341 /* Generate code and fixes for a 32-bit conditional branch instruction
   3342    created by "extending" an existing 8-bit branch instruction.
   3343 
   3344    opcodep    Pointer to the word containing the original 8-bit branch
   3345 	      instruction.
   3346 
   3347    writep     Pointer to "extension area" following the first instruction
   3348 	      word.
   3349 
   3350    fragP      Pointer to the frag containing the instruction.
   3351 
   3352    add_symP,  Parts of the destination address expression.
   3353    sub_symP,
   3354    add_num.  */
   3355 
   3356 static void
   3357 gen_cond_branch_32 (char *opcodep, char *writep, fragS *fragP,
   3358 		    symbolS *add_symP, symbolS *sub_symP, long int add_num)
   3359 {
   3360   int nop_opcode;
   3361   int opc_offset;
   3362   int branch_offset;
   3363 
   3364   if (cris_arch == arch_crisv32)
   3365     {
   3366       nop_opcode = NOP_OPCODE_V32;
   3367       opc_offset = 10;
   3368       branch_offset = -2 - 8;
   3369     }
   3370   else if (pic)
   3371     {
   3372       nop_opcode = NOP_OPCODE;
   3373       opc_offset = 10;
   3374       branch_offset = -2 - 8;
   3375     }
   3376   else
   3377     {
   3378       nop_opcode = NOP_OPCODE;
   3379       opc_offset = 8;
   3380       branch_offset = -2 - 6;
   3381     }
   3382 
   3383   /* We should never get here for compatibility mode.  */
   3384   if (cris_arch == arch_cris_common_v10_v32)
   3385     as_fatal (_("Calling gen_cond_branch_32 for .arch common_v10_v32\n"));
   3386 
   3387   if (warn_for_branch_expansion)
   3388     as_warn_where (fragP->fr_file, fragP->fr_line,
   3389 		   _("32-bit conditional branch generated"));
   3390 
   3391   /* Here, writep points to what will be opcodep + 2.  First, we change
   3392      the actual branch in opcodep[0] and opcodep[1], so that in the
   3393      final insn, it will look like:
   3394        opcodep+10: Bcc .-6
   3395 
   3396      This means we don't have to worry about changing the opcode or
   3397      messing with the delay-slot instruction.  So, we move it to last in
   3398      the "extended" branch, and just change the displacement.  Admittedly,
   3399      it's not the optimal extended construct, but we should get this
   3400      rarely enough that it shouldn't matter.  */
   3401 
   3402   writep[opc_offset] = branch_disp (branch_offset);
   3403   writep[opc_offset + 1] = opcodep[1];
   3404 
   3405   /* Then, we change the branch to an unconditional branch over the
   3406      extended part, to the new location of the Bcc:
   3407        opcodep:	  BA .+10
   3408        opcodep+2: NOP
   3409 
   3410      Note that these two writes are to currently different locations,
   3411      merged later.  */
   3412 
   3413   md_number_to_chars (opcodep, BA_QUICK_OPCODE
   3414 		      + (cris_arch == arch_crisv32 ? 12 : (pic ? 10 : 8)),
   3415 		      2);
   3416   md_number_to_chars (writep, nop_opcode, 2);
   3417 
   3418   /* Then the extended thing, the 32-bit jump insn.
   3419        opcodep+4: JUMP [PC+]
   3420      or, in the PIC case,
   3421        opcodep+4: MOVE [PC=PC+N],P0.  */
   3422 
   3423   md_number_to_chars (writep + 2,
   3424 		      cris_arch == arch_crisv32
   3425 		      ? BA_DWORD_OPCODE
   3426 		      : (pic ? MOVE_PC_INCR_OPCODE_PREFIX
   3427 			 : JUMP_PC_INCR_OPCODE), 2);
   3428 
   3429   /* We have to fill in the actual value too.
   3430        opcodep+6: .DWORD
   3431      This is most probably an expression, but we can cope with an absolute
   3432      value too.  FIXME: Testcase needed with and without pic.  */
   3433 
   3434   if (add_symP == NULL && sub_symP == NULL)
   3435     {
   3436       /* An absolute address.  */
   3437       if (pic || cris_arch == arch_crisv32)
   3438 	fix_new (fragP, writep + 4 - fragP->fr_literal, 4,
   3439 		 section_symbol (absolute_section),
   3440 		 add_num
   3441 		 + (cris_arch == arch_crisv32 ? 6 : 0),
   3442 		 1, BFD_RELOC_32_PCREL);
   3443       else
   3444 	md_number_to_chars (writep + 4, add_num, 4);
   3445     }
   3446   else
   3447     {
   3448       if (sub_symP != NULL)
   3449 	as_bad_where (fragP->fr_file, fragP->fr_line,
   3450 		      _("Complex expression not supported"));
   3451 
   3452       /* Not absolute, we have to make it a frag for later evaluation.  */
   3453       fix_new (fragP, writep + 4 - fragP->fr_literal, 4, add_symP,
   3454 	       add_num + (cris_arch == arch_crisv32 ? 6 : 0),
   3455 	       pic || cris_arch == arch_crisv32 ? 1 : 0,
   3456 	       pic || cris_arch == arch_crisv32
   3457 	       ? BFD_RELOC_32_PCREL : BFD_RELOC_32);
   3458     }
   3459 
   3460   if (cris_arch == arch_crisv32)
   3461     /* Follow it with a "NOP" for CRISv32.  */
   3462     md_number_to_chars (writep + 8, NOP_OPCODE_V32, 2);
   3463   else if (pic)
   3464     /* ...and the rest of the move-opcode for pre-v32 PIC.  */
   3465     md_number_to_chars (writep + 8, MOVE_PC_INCR_OPCODE_SUFFIX, 2);
   3466 }
   3467 
   3468 /* Get the size of an immediate-reloc in bytes.  Only valid for
   3469    specified relocs (TLS, PIC).  */
   3470 
   3471 static unsigned int
   3472 cris_get_specified_reloc_size (bfd_reloc_code_real_type reloc)
   3473 {
   3474   return
   3475     reloc == BFD_RELOC_CRIS_16_GOTPLT
   3476     || reloc == BFD_RELOC_CRIS_16_GOT
   3477     || reloc == BFD_RELOC_CRIS_16_GOT_GD
   3478     || reloc == BFD_RELOC_CRIS_16_DTPREL
   3479     || reloc == BFD_RELOC_CRIS_16_GOT_TPREL
   3480     || reloc == BFD_RELOC_CRIS_16_TPREL
   3481     ? 2 : 4;
   3482 }
   3483 
   3484 /* Store a reloc type at *RELOCP corresponding to the PIC suffix at *CPP.
   3485    Adjust *EXPRP with any addend found after the PIC suffix.  */
   3486 
   3487 static void
   3488 cris_get_reloc_suffix (char **cPP, bfd_reloc_code_real_type *relocp,
   3489 		       expressionS *exprP)
   3490 {
   3491   char *s = *cPP;
   3492   unsigned int i;
   3493   expressionS const_expr;
   3494 
   3495   const struct pic_suffixes_struct
   3496   {
   3497     const char *const suffix;
   3498     unsigned int len;
   3499     bfd_reloc_code_real_type reloc;
   3500     bfd_boolean pic_p;
   3501     bfd_boolean tls_p;
   3502   } pic_suffixes[] =
   3503     {
   3504 #undef PICMAP
   3505 #define PICMAP(s, r) {s, sizeof (s) - 1, r, TRUE, FALSE}
   3506 #define PICTLSMAP(s, r) {s, sizeof (s) - 1, r, TRUE, TRUE}
   3507 #define TLSMAP(s, r) {s, sizeof (s) - 1, r, FALSE, TRUE}
   3508       /* Keep this in order with longest unambiguous prefix first.  */
   3509       PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT),
   3510       PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT),
   3511       PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL),
   3512       PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL),
   3513       PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL),
   3514       PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT),
   3515       PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT),
   3516       PICTLSMAP ("GDGOTREL16", BFD_RELOC_CRIS_16_GOT_GD),
   3517       PICTLSMAP ("GDGOTREL", BFD_RELOC_CRIS_32_GOT_GD),
   3518       TLSMAP ("GD", BFD_RELOC_CRIS_32_GD),
   3519       PICTLSMAP ("DTPREL16", BFD_RELOC_CRIS_16_DTPREL),
   3520       PICTLSMAP ("DTPREL", BFD_RELOC_CRIS_32_DTPREL),
   3521       TLSMAP ("IE", BFD_RELOC_CRIS_32_IE),
   3522       PICTLSMAP ("TPOFFGOT16", BFD_RELOC_CRIS_16_GOT_TPREL),
   3523       PICTLSMAP ("TPOFFGOT", BFD_RELOC_CRIS_32_GOT_TPREL),
   3524       TLSMAP ("TPOFF16", BFD_RELOC_CRIS_16_TPREL),
   3525       TLSMAP ("TPOFF", BFD_RELOC_CRIS_32_TPREL)
   3526     };
   3527 
   3528   /* We've already seen the ':', so consume it.  */
   3529   s++;
   3530 
   3531   for (i = 0; i < sizeof (pic_suffixes)/sizeof (pic_suffixes[0]); i++)
   3532     {
   3533       if (strncmp (s, pic_suffixes[i].suffix, pic_suffixes[i].len) == 0
   3534 	  && ! is_part_of_name (s[pic_suffixes[i].len])
   3535 	  /* PIC and non-PIC relocations are exclusive.  */
   3536 	  && (pic != 0) == (pic_suffixes[i].pic_p != 0)
   3537 	  /* But TLS can be active for non-TLS relocations too.  */
   3538 	  && (pic_suffixes[i].tls_p == 0 || tls))
   3539 	{
   3540 	  /* We have a match.  Consume the suffix and set the relocation
   3541 	     type.   */
   3542 	  s += pic_suffixes[i].len;
   3543 
   3544 	  /* There can be a constant term appended.  If so, we will add it
   3545 	     to *EXPRP.  */
   3546 	  if (*s == '+' || *s == '-')
   3547 	    {
   3548 	      if (! cris_get_expression (&s, &const_expr))
   3549 		/* There was some kind of syntax error.  Bail out.  */
   3550 		break;
   3551 
   3552 	      /* Allow complex expressions as the constant part.  It still
   3553 		 has to be an assembly-time constant or there will be an
   3554 		 error emitting the reloc.  This makes the PIC qualifiers
   3555 		 idempotent; foo:GOTOFF+32 == foo+32:GOTOFF.  The former we
   3556 		 recognize here; the latter is parsed in the incoming
   3557 		 expression.  */
   3558 	      exprP->X_add_symbol = make_expr_symbol (exprP);
   3559 	      exprP->X_op = O_add;
   3560 	      exprP->X_add_number = 0;
   3561 	      exprP->X_op_symbol = make_expr_symbol (&const_expr);
   3562 	    }
   3563 
   3564 	  *relocp = pic_suffixes[i].reloc;
   3565 	  *cPP = s;
   3566 	  return;
   3567 	}
   3568     }
   3569 
   3570   /* No match.  Don't consume anything; fall back and there will be a
   3571      syntax error.  */
   3572 }
   3573 
   3574 /* This *could* have been:
   3575 
   3576    Turn a string in input_line_pointer into a floating point constant
   3577    of type TYPE, and store the appropriate bytes in *LITP.  The number
   3578    of LITTLENUMS emitted is stored in *SIZEP.
   3579 
   3580    type	  A character from FLTCHARS that describes what kind of
   3581 	  floating-point number is wanted.
   3582 
   3583    litp	  A pointer to an array that the result should be stored in.
   3584 
   3585    sizep  A pointer to an integer where the size of the result is stored.
   3586 
   3587    But we don't support floating point constants in assembly code *at all*,
   3588    since it's suboptimal and just opens up bug opportunities.  GCC emits
   3589    the bit patterns as hex.  All we could do here is to emit what GCC
   3590    would have done in the first place.	*Nobody* writes floating-point
   3591    code as assembly code, but if they do, they should be able enough to
   3592    find out the correct bit patterns and use them.  */
   3593 
   3594 char *
   3595 md_atof (int type ATTRIBUTE_UNUSED, char *litp ATTRIBUTE_UNUSED,
   3596 	 int *sizep ATTRIBUTE_UNUSED)
   3597 {
   3598   /* FIXME:  Is this function mentioned in the internals.texi manual?  If
   3599      not, add it.  */
   3600   return  _("Bad call to md_atof () - floating point formats are not supported");
   3601 }
   3602 
   3603 /* Turn a number as a fixS * into a series of bytes that represents the
   3604    number on the target machine.  The purpose of this procedure is the
   3605    same as that of md_number_to_chars but this procedure is supposed to
   3606    handle general bit field fixes and machine-dependent fixups.
   3607 
   3608    bufp	       Pointer to an array where the result should be stored.
   3609 
   3610    val	      The value to store.
   3611 
   3612    n	      The number of bytes in "val" that should be stored.
   3613 
   3614    fixP	      The fix to be applied to the bit field starting at bufp.
   3615 
   3616    seg	      The segment containing this number.  */
   3617 
   3618 static void
   3619 cris_number_to_imm (char *bufp, long val, int n, fixS *fixP, segT seg)
   3620 {
   3621   segT sym_seg;
   3622 
   3623   know (n <= 4);
   3624   know (fixP);
   3625 
   3626   /* We put the relative "vma" for the other segment for inter-segment
   3627      relocations in the object data to stay binary "compatible" (with an
   3628      uninteresting old version) for the relocation.
   3629      Maybe delete some day.  */
   3630   if (fixP->fx_addsy
   3631       && (sym_seg = S_GET_SEGMENT (fixP->fx_addsy)) != seg)
   3632     val += sym_seg->vma;
   3633 
   3634   if (fixP->fx_addsy != NULL || fixP->fx_pcrel)
   3635     switch (fixP->fx_r_type)
   3636       {
   3637 	/* These must be fully resolved when getting here.  */
   3638       case BFD_RELOC_16_PCREL:
   3639       case BFD_RELOC_8_PCREL:
   3640 	as_bad_where (fixP->fx_file, fixP->fx_line,
   3641 		      _("PC-relative relocation must be trivially resolved"));
   3642       default:
   3643 	;
   3644       }
   3645 
   3646   /* Only use the computed value for old-arch binaries.  For all
   3647      others, where we're going to output a relocation, put 0 in the
   3648      code.  */
   3649   if (cris_arch != arch_cris_any_v0_v10
   3650       && (fixP->fx_addsy != NULL || fixP->fx_pcrel))
   3651     val = 0;
   3652 
   3653   switch (fixP->fx_r_type)
   3654     {
   3655       /* Ditto here, we put the addend into the object code as
   3656 	 well as the reloc addend.  Keep it that way for now, to simplify
   3657 	 regression tests on the object file contents.	FIXME:	Seems
   3658 	 uninteresting now that we have a test suite.  */
   3659 
   3660     case BFD_RELOC_CRIS_32_GOT_GD:
   3661     case BFD_RELOC_CRIS_16_GOT_GD:
   3662     case BFD_RELOC_CRIS_32_GD:
   3663     case BFD_RELOC_CRIS_32_IE:
   3664     case BFD_RELOC_CRIS_32_DTPREL:
   3665     case BFD_RELOC_CRIS_16_DTPREL:
   3666     case BFD_RELOC_CRIS_32_GOT_TPREL:
   3667     case BFD_RELOC_CRIS_16_GOT_TPREL:
   3668     case BFD_RELOC_CRIS_32_TPREL:
   3669     case BFD_RELOC_CRIS_16_TPREL:
   3670 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
   3671       if (IS_ELF && fixP->fx_addsy != NULL)
   3672 	S_SET_THREAD_LOCAL (fixP->fx_addsy);
   3673 #endif
   3674       /* Fall through.  */
   3675 
   3676     case BFD_RELOC_CRIS_16_GOT:
   3677     case BFD_RELOC_CRIS_32_GOT:
   3678     case BFD_RELOC_CRIS_32_GOTREL:
   3679     case BFD_RELOC_CRIS_16_GOTPLT:
   3680     case BFD_RELOC_CRIS_32_GOTPLT:
   3681     case BFD_RELOC_CRIS_32_PLT_GOTREL:
   3682     case BFD_RELOC_CRIS_32_PLT_PCREL:
   3683       /* We don't want to put in any kind of non-zero bits in the data
   3684 	 being relocated for these.  */
   3685       md_number_to_chars (bufp, 0, n);
   3686       break;
   3687 
   3688     case BFD_RELOC_32_PCREL:
   3689       /* If this one isn't fully resolved, we don't want to put non-zero
   3690 	 in the object.  */
   3691       if (fixP->fx_addsy != NULL || fixP->fx_pcrel)
   3692 	val = 0;
   3693 
   3694       /* Fall through.  */
   3695     case BFD_RELOC_32:
   3696       /* No use having warnings here, since most hosts have a 32-bit type
   3697 	 for "long" (which will probably change soon, now that I wrote
   3698 	 this).  */
   3699       bufp[3] = (val >> 24) & 0xFF;
   3700       bufp[2] = (val >> 16) & 0xFF;
   3701       bufp[1] = (val >> 8) & 0xFF;
   3702       bufp[0] = val & 0xFF;
   3703       break;
   3704 
   3705       /* FIXME: The 16 and 8-bit cases should have a way to check
   3706 	 whether a signed or unsigned (or any signedness) number is
   3707 	 accepted.  */
   3708 
   3709     case BFD_RELOC_16:
   3710     case BFD_RELOC_16_PCREL:
   3711       if (val > 0xffff || val < -32768)
   3712 	as_bad_where (fixP->fx_file, fixP->fx_line,
   3713 		      _("Value not in 16 bit range: %ld"), val);
   3714       bufp[1] = (val >> 8) & 0xFF;
   3715       bufp[0] = val & 0xFF;
   3716       break;
   3717 
   3718     case BFD_RELOC_CRIS_SIGNED_16:
   3719       if (val > 32767 || val < -32768)
   3720 	as_bad_where (fixP->fx_file, fixP->fx_line,
   3721 		      _("Value not in 16 bit signed range: %ld"), val);
   3722       bufp[1] = (val >> 8) & 0xFF;
   3723       bufp[0] = val & 0xFF;
   3724       break;
   3725 
   3726     case BFD_RELOC_8:
   3727     case BFD_RELOC_8_PCREL:
   3728       if (val > 255 || val < -128)
   3729 	as_bad_where (fixP->fx_file, fixP->fx_line, _("Value not in 8 bit range: %ld"), val);
   3730       bufp[0] = val & 0xFF;
   3731       break;
   3732 
   3733     case BFD_RELOC_CRIS_SIGNED_8:
   3734       if (val > 127 || val < -128)
   3735 	as_bad_where (fixP->fx_file, fixP->fx_line,
   3736 		      _("Value not in 8 bit signed range: %ld"), val);
   3737       bufp[0] = val & 0xFF;
   3738       break;
   3739 
   3740     case BFD_RELOC_CRIS_LAPCQ_OFFSET:
   3741       /* FIXME: Test-cases for out-of-range values.  Probably also need
   3742 	 to use as_bad_where.  */
   3743     case BFD_RELOC_CRIS_UNSIGNED_4:
   3744       if (val > 15 || val < 0)
   3745 	as_bad_where (fixP->fx_file, fixP->fx_line,
   3746 		      _("Value not in 4 bit unsigned range: %ld"), val);
   3747       bufp[0] |= val & 0x0F;
   3748       break;
   3749 
   3750     case BFD_RELOC_CRIS_UNSIGNED_5:
   3751       if (val > 31 || val < 0)
   3752 	as_bad_where (fixP->fx_file, fixP->fx_line,
   3753 		      _("Value not in 5 bit unsigned range: %ld"), val);
   3754       bufp[0] |= val & 0x1F;
   3755       break;
   3756 
   3757     case BFD_RELOC_CRIS_SIGNED_6:
   3758       if (val > 31 || val < -32)
   3759 	as_bad_where (fixP->fx_file, fixP->fx_line,
   3760 		      _("Value not in 6 bit range: %ld"), val);
   3761       bufp[0] |= val & 0x3F;
   3762       break;
   3763 
   3764     case BFD_RELOC_CRIS_UNSIGNED_6:
   3765       if (val > 63 || val < 0)
   3766 	as_bad_where (fixP->fx_file, fixP->fx_line,
   3767 		      _("Value not in 6 bit unsigned range: %ld"), val);
   3768       bufp[0] |= val & 0x3F;
   3769       break;
   3770 
   3771     case BFD_RELOC_CRIS_BDISP8:
   3772       bufp[0] = branch_disp (val);
   3773       break;
   3774 
   3775     case BFD_RELOC_NONE:
   3776       /* May actually happen automatically.  For example at broken
   3777 	 words, if the word turns out not to be broken.
   3778 	 FIXME: When?  Which testcase?  */
   3779       if (! fixP->fx_addsy)
   3780 	md_number_to_chars (bufp, val, n);
   3781       break;
   3782 
   3783     case BFD_RELOC_VTABLE_INHERIT:
   3784       /* This borrowed from tc-ppc.c on a whim.  */
   3785       if (fixP->fx_addsy
   3786 	  && !S_IS_DEFINED (fixP->fx_addsy)
   3787 	  && !S_IS_WEAK (fixP->fx_addsy))
   3788 	S_SET_WEAK (fixP->fx_addsy);
   3789       /* Fall through.  */
   3790 
   3791     case BFD_RELOC_VTABLE_ENTRY:
   3792       fixP->fx_done = 0;
   3793       break;
   3794 
   3795     default:
   3796       BAD_CASE (fixP->fx_r_type);
   3797     }
   3798 }
   3799 
   3800 /* Processes machine-dependent command line options.  Called once for
   3801    each option on the command line that the machine-independent part of
   3802    GAS does not understand.  */
   3803 
   3804 int
   3805 md_parse_option (int arg, char *argp ATTRIBUTE_UNUSED)
   3806 {
   3807   switch (arg)
   3808     {
   3809     case 'H':
   3810     case 'h':
   3811       printf (_("Please use --help to see usage and options for this assembler.\n"));
   3812       md_show_usage (stdout);
   3813       exit (EXIT_SUCCESS);
   3814 
   3815     case 'N':
   3816       warn_for_branch_expansion = 1;
   3817       break;
   3818 
   3819     case OPTION_NO_US:
   3820       demand_register_prefix = TRUE;
   3821 
   3822       if (OUTPUT_FLAVOR == bfd_target_aout_flavour)
   3823 	as_bad (_("--no-underscore is invalid with a.out format"));
   3824       else
   3825 	symbols_have_leading_underscore = FALSE;
   3826       break;
   3827 
   3828     case OPTION_US:
   3829       demand_register_prefix = FALSE;
   3830       symbols_have_leading_underscore = TRUE;
   3831       break;
   3832 
   3833     case OPTION_PIC:
   3834       if (OUTPUT_FLAVOR != bfd_target_elf_flavour)
   3835 	as_bad (_("--pic is invalid for this object format"));
   3836       pic = TRUE;
   3837       if (cris_arch != arch_crisv32)
   3838 	md_long_jump_size = cris_any_v0_v10_long_jump_size_pic;
   3839       else
   3840 	md_long_jump_size = crisv32_long_jump_size;
   3841       break;
   3842 
   3843     case OPTION_ARCH:
   3844       {
   3845 	char *str = argp;
   3846 	enum cris_archs argarch = cris_arch_from_string (&str);
   3847 
   3848 	if (argarch == arch_cris_unknown)
   3849 	    as_bad (_("invalid <arch> in --march=<arch>: %s"), argp);
   3850 	else
   3851 	  cris_arch = argarch;
   3852 
   3853 	if (argarch == arch_crisv32)
   3854 	  {
   3855 	    err_for_dangerous_mul_placement = 0;
   3856 	    md_long_jump_size = crisv32_long_jump_size;
   3857 	  }
   3858 	else
   3859 	  {
   3860 	    if (pic)
   3861 	      md_long_jump_size = cris_any_v0_v10_long_jump_size_pic;
   3862 	    else
   3863 	      md_long_jump_size = cris_any_v0_v10_long_jump_size;
   3864 	  }
   3865       }
   3866       break;
   3867 
   3868     case OPTION_MULBUG_ABORT_OFF:
   3869       err_for_dangerous_mul_placement = 0;
   3870       break;
   3871 
   3872     case OPTION_MULBUG_ABORT_ON:
   3873       err_for_dangerous_mul_placement = 1;
   3874       break;
   3875 
   3876     default:
   3877       return 0;
   3878     }
   3879 
   3880   return 1;
   3881 }
   3882 
   3883 /* Round up a section size to the appropriate boundary.  */
   3884 valueT
   3885 md_section_align (segT segment, valueT size)
   3886 {
   3887   /* Round all sects to multiple of 4, except the bss section, which
   3888      we'll round to word-size.
   3889 
   3890      FIXME: Check if this really matters.  All sections should be
   3891      rounded up, and all sections should (optionally) be assumed to be
   3892      dword-aligned, it's just that there is actual usage of linking to a
   3893      multiple of two.  */
   3894   if (OUTPUT_FLAVOR == bfd_target_aout_flavour)
   3895     {
   3896       if (segment == bss_section)
   3897 	return (size + 1) & ~1;
   3898       return (size + 3) & ~3;
   3899     }
   3900   else
   3901     {
   3902       /* FIXME: Is this wanted?  It matches the testsuite, but that's not
   3903 	 really a valid reason.  */
   3904       if (segment == text_section)
   3905 	return (size + 3) & ~3;
   3906     }
   3907 
   3908   return size;
   3909 }
   3910 
   3911 /* Generate a machine-dependent relocation.  */
   3912 arelent *
   3913 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixP)
   3914 {
   3915   arelent *relP;
   3916   bfd_reloc_code_real_type code;
   3917 
   3918   switch (fixP->fx_r_type)
   3919     {
   3920     case BFD_RELOC_CRIS_SIGNED_8:
   3921       code = BFD_RELOC_8;
   3922       break;
   3923 
   3924     case BFD_RELOC_CRIS_SIGNED_16:
   3925       code = BFD_RELOC_16;
   3926       break;
   3927 
   3928     case BFD_RELOC_CRIS_16_GOT:
   3929     case BFD_RELOC_CRIS_32_GOT:
   3930     case BFD_RELOC_CRIS_16_GOTPLT:
   3931     case BFD_RELOC_CRIS_32_GOTPLT:
   3932     case BFD_RELOC_CRIS_32_GOTREL:
   3933     case BFD_RELOC_CRIS_32_PLT_GOTREL:
   3934     case BFD_RELOC_CRIS_32_PLT_PCREL:
   3935     case BFD_RELOC_32:
   3936     case BFD_RELOC_32_PCREL:
   3937     case BFD_RELOC_16:
   3938     case BFD_RELOC_8:
   3939     case BFD_RELOC_VTABLE_INHERIT:
   3940     case BFD_RELOC_VTABLE_ENTRY:
   3941     case BFD_RELOC_CRIS_UNSIGNED_8:
   3942     case BFD_RELOC_CRIS_UNSIGNED_16:
   3943     case BFD_RELOC_CRIS_LAPCQ_OFFSET:
   3944     case BFD_RELOC_CRIS_32_GOT_GD:
   3945     case BFD_RELOC_CRIS_16_GOT_GD:
   3946     case BFD_RELOC_CRIS_32_GD:
   3947     case BFD_RELOC_CRIS_32_IE:
   3948     case BFD_RELOC_CRIS_32_DTPREL:
   3949     case BFD_RELOC_CRIS_16_DTPREL:
   3950     case BFD_RELOC_CRIS_32_GOT_TPREL:
   3951     case BFD_RELOC_CRIS_16_GOT_TPREL:
   3952     case BFD_RELOC_CRIS_32_TPREL:
   3953     case BFD_RELOC_CRIS_16_TPREL:
   3954       code = fixP->fx_r_type;
   3955       break;
   3956     default:
   3957       as_bad_where (fixP->fx_file, fixP->fx_line,
   3958 		    _("Semantics error.  This type of operand can not be relocated, it must be an assembly-time constant"));
   3959       return 0;
   3960     }
   3961 
   3962   relP = (arelent *) xmalloc (sizeof (arelent));
   3963   gas_assert (relP != 0);
   3964   relP->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
   3965   *relP->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
   3966   relP->address = fixP->fx_frag->fr_address + fixP->fx_where;
   3967 
   3968   relP->addend = fixP->fx_offset;
   3969 
   3970   /* This is the standard place for KLUDGEs to work around bugs in
   3971      bfd_install_relocation (first such note in the documentation
   3972      appears with binutils-2.8).
   3973 
   3974      That function bfd_install_relocation does the wrong thing with
   3975      putting stuff into the addend of a reloc (it should stay out) for a
   3976      weak symbol.  The really bad thing is that it adds the
   3977      "segment-relative offset" of the symbol into the reloc.  In this
   3978      case, the reloc should instead be relative to the symbol with no
   3979      other offset than the assembly code shows; and since the symbol is
   3980      weak, any local definition should be ignored until link time (or
   3981      thereafter).
   3982      To wit:  weaksym+42  should be weaksym+42 in the reloc,
   3983      not weaksym+(offset_from_segment_of_local_weaksym_definition)
   3984 
   3985      To "work around" this, we subtract the segment-relative offset of
   3986      "known" weak symbols.  This evens out the extra offset.
   3987 
   3988      That happens for a.out but not for ELF, since for ELF,
   3989      bfd_install_relocation uses the "special function" field of the
   3990      howto, and does not execute the code that needs to be undone.  */
   3991 
   3992   if (OUTPUT_FLAVOR == bfd_target_aout_flavour
   3993       && fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy)
   3994       && ! bfd_is_und_section (S_GET_SEGMENT (fixP->fx_addsy)))
   3995     {
   3996       relP->addend -= S_GET_VALUE (fixP->fx_addsy);
   3997     }
   3998 
   3999   relP->howto = bfd_reloc_type_lookup (stdoutput, code);
   4000   if (! relP->howto)
   4001     {
   4002       const char *name;
   4003 
   4004       name = S_GET_NAME (fixP->fx_addsy);
   4005       if (name == NULL)
   4006 	name = _("<unknown>");
   4007       as_fatal (_("Cannot generate relocation type for symbol %s, code %s"),
   4008 		name, bfd_get_reloc_code_name (code));
   4009     }
   4010 
   4011   return relP;
   4012 }
   4013 
   4014 /* Machine-dependent usage-output.  */
   4015 
   4016 void
   4017 md_show_usage (FILE *stream)
   4018 {
   4019   /* The messages are formatted to line up with the generic options.  */
   4020   fprintf (stream, _("CRIS-specific options:\n"));
   4021   fprintf (stream, "%s",
   4022 	   _("  -h, -H                  Don't execute, print this help text.  Deprecated.\n"));
   4023   fprintf (stream, "%s",
   4024 	   _("  -N                      Warn when branches are expanded to jumps.\n"));
   4025   fprintf (stream, "%s",
   4026 	   _("  --underscore            User symbols are normally prepended with underscore.\n"));
   4027   fprintf (stream, "%s",
   4028 	   _("                          Registers will not need any prefix.\n"));
   4029   fprintf (stream, "%s",
   4030 	   _("  --no-underscore         User symbols do not have any prefix.\n"));
   4031   fprintf (stream, "%s",
   4032 	   _("                          Registers will require a `$'-prefix.\n"));
   4033 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
   4034   fprintf (stream, "%s",
   4035 	   _("  --pic			Enable generation of position-independent code.\n"));
   4036 #endif
   4037   fprintf (stream, "%s",
   4038 	   _("  --march=<arch>		Generate code for <arch>.  Valid choices for <arch>\n\
   4039 				are v0_v10, v10, v32 and common_v10_v32.\n"));
   4040 }
   4041 
   4042 /* Apply a fixS (fixup of an instruction or data that we didn't have
   4043    enough info to complete immediately) to the data in a frag.  */
   4044 
   4045 void
   4046 md_apply_fix (fixS *fixP, valueT *valP, segT seg)
   4047 {
   4048   /* This assignment truncates upper bits if valueT is 64 bits (as with
   4049      --enable-64-bit-bfd), which is fine here, though we cast to avoid
   4050      any compiler warnings.  */
   4051   long val = (long) *valP;
   4052   char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
   4053 
   4054   if (fixP->fx_addsy == 0 && !fixP->fx_pcrel)
   4055     fixP->fx_done = 1;
   4056 
   4057   if (fixP->fx_bit_fixP || fixP->fx_im_disp != 0)
   4058     {
   4059       as_bad_where (fixP->fx_file, fixP->fx_line, _("Invalid relocation"));
   4060       fixP->fx_done = 1;
   4061     }
   4062   else
   4063     {
   4064       /* We can't actually support subtracting a symbol.  */
   4065       if (fixP->fx_subsy != (symbolS *) NULL)
   4066 	as_bad_where (fixP->fx_file, fixP->fx_line,
   4067 		      _("expression too complex"));
   4068 
   4069       /* This operand-type is scaled.  */
   4070       if (fixP->fx_r_type == BFD_RELOC_CRIS_LAPCQ_OFFSET)
   4071 	val /= 2;
   4072       cris_number_to_imm (buf, val, fixP->fx_size, fixP, seg);
   4073     }
   4074 }
   4075 
   4076 /* All relocations are relative to the location just after the fixup;
   4077    the address of the fixup plus its size.  */
   4078 
   4079 long
   4080 md_pcrel_from (fixS *fixP)
   4081 {
   4082   valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
   4083 
   4084   /* FIXME:  We get here only at the end of assembly, when X in ".-X" is
   4085      still unknown.  Since we don't have pc-relative relocations in a.out,
   4086      this is invalid.  What to do if anything for a.out, is to add
   4087      pc-relative relocations everywhere including the elinux program
   4088      loader.  For ELF, allow straight-forward PC-relative relocations,
   4089      which are always relative to the location after the relocation.  */
   4090   if (OUTPUT_FLAVOR != bfd_target_elf_flavour
   4091       || (fixP->fx_r_type != BFD_RELOC_8_PCREL
   4092 	  && fixP->fx_r_type != BFD_RELOC_16_PCREL
   4093 	  && fixP->fx_r_type != BFD_RELOC_32_PCREL
   4094 	  && fixP->fx_r_type != BFD_RELOC_CRIS_LAPCQ_OFFSET))
   4095     as_bad_where (fixP->fx_file, fixP->fx_line,
   4096 		  _("Invalid pc-relative relocation"));
   4097   return fixP->fx_size + addr;
   4098 }
   4099 
   4100 /* We have no need to give defaults for symbol-values.  */
   4101 symbolS *
   4102 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
   4103 {
   4104   return 0;
   4105 }
   4106 
   4107 /* If this function returns non-zero, it prevents the relocation
   4108    against symbol(s) in the FIXP from being replaced with relocations
   4109    against section symbols, and guarantees that a relocation will be
   4110    emitted even when the value can be resolved locally.  */
   4111 int
   4112 md_cris_force_relocation (struct fix *fixp)
   4113 {
   4114   switch (fixp->fx_r_type)
   4115     {
   4116     case BFD_RELOC_CRIS_16_GOT:
   4117     case BFD_RELOC_CRIS_32_GOT:
   4118     case BFD_RELOC_CRIS_16_GOTPLT:
   4119     case BFD_RELOC_CRIS_32_GOTPLT:
   4120     case BFD_RELOC_CRIS_32_GOTREL:
   4121     case BFD_RELOC_CRIS_32_PLT_GOTREL:
   4122     case BFD_RELOC_CRIS_32_PLT_PCREL:
   4123       return 1;
   4124     default:
   4125       ;
   4126     }
   4127 
   4128   return generic_force_reloc (fixp);
   4129 }
   4130 
   4131 /* Check and emit error if broken-word handling has failed to fix up a
   4132    case-table.	This is called from write.c, after doing everything it
   4133    knows about how to handle broken words.  */
   4134 
   4135 void
   4136 tc_cris_check_adjusted_broken_word (offsetT new_offset, struct broken_word *brokwP)
   4137 {
   4138   if (new_offset > 32767 || new_offset < -32768)
   4139     /* We really want a genuine error, not a warning, so make it one.  */
   4140     as_bad_where (brokwP->frag->fr_file, brokwP->frag->fr_line,
   4141 		  _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
   4142 		  (long) new_offset);
   4143 }
   4144 
   4145 /* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers.  */
   4146 
   4147 static void
   4148 cris_force_reg_prefix (void)
   4149 {
   4150   demand_register_prefix = TRUE;
   4151 }
   4152 
   4153 /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers.  */
   4154 
   4155 static void
   4156 cris_relax_reg_prefix (void)
   4157 {
   4158   demand_register_prefix = FALSE;
   4159 }
   4160 
   4161 /* Adjust for having a leading '_' on all user symbols.  */
   4162 
   4163 static void
   4164 cris_sym_leading_underscore (void)
   4165 {
   4166   /* We can't really do anything more than assert that what the program
   4167      thinks symbol starts with agrees with the command-line options, since
   4168      the bfd is already created.  */
   4169 
   4170   if (!symbols_have_leading_underscore)
   4171     as_bad (_(".syntax %s requires command-line option `--underscore'"),
   4172 	    SYNTAX_USER_SYM_LEADING_UNDERSCORE);
   4173 }
   4174 
   4175 /* Adjust for not having any particular prefix on user symbols.  */
   4176 
   4177 static void cris_sym_no_leading_underscore (void)
   4178 {
   4179   if (symbols_have_leading_underscore)
   4180     as_bad (_(".syntax %s requires command-line option `--no-underscore'"),
   4181 	    SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE);
   4182 }
   4183 
   4184 /* Handle the .syntax pseudo, which takes an argument that decides what
   4185    syntax the assembly code has.  */
   4186 
   4187 static void
   4188 s_syntax (int ignore ATTRIBUTE_UNUSED)
   4189 {
   4190   static const struct syntaxes
   4191   {
   4192     const char *const operand;
   4193     void (*fn) (void);
   4194   } syntax_table[] =
   4195     {{SYNTAX_ENFORCE_REG_PREFIX, cris_force_reg_prefix},
   4196      {SYNTAX_RELAX_REG_PREFIX, cris_relax_reg_prefix},
   4197      {SYNTAX_USER_SYM_LEADING_UNDERSCORE, cris_sym_leading_underscore},
   4198      {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE, cris_sym_no_leading_underscore}};
   4199 
   4200   const struct syntaxes *sp;
   4201 
   4202   for (sp = syntax_table;
   4203        sp < syntax_table + sizeof (syntax_table) / sizeof (syntax_table[0]);
   4204        sp++)
   4205     {
   4206       if (strncmp (input_line_pointer, sp->operand,
   4207 		   strlen (sp->operand)) == 0)
   4208 	{
   4209 	  (sp->fn) ();
   4210 
   4211 	  input_line_pointer += strlen (sp->operand);
   4212 	  demand_empty_rest_of_line ();
   4213 	  return;
   4214 	}
   4215     }
   4216 
   4217   as_bad (_("Unknown .syntax operand"));
   4218 }
   4219 
   4220 /* Wrapper for dwarf2_directive_file to emit error if this is seen when
   4221    not emitting ELF.  */
   4222 
   4223 static void
   4224 s_cris_file (int dummy)
   4225 {
   4226   if (OUTPUT_FLAVOR != bfd_target_elf_flavour)
   4227     as_bad (_("Pseudodirective .file is only valid when generating ELF"));
   4228   else
   4229     dwarf2_directive_file (dummy);
   4230 }
   4231 
   4232 /* Wrapper for dwarf2_directive_loc to emit error if this is seen when not
   4233    emitting ELF.  */
   4234 
   4235 static void
   4236 s_cris_loc (int dummy)
   4237 {
   4238   if (OUTPUT_FLAVOR != bfd_target_elf_flavour)
   4239     as_bad (_("Pseudodirective .loc is only valid when generating ELF"));
   4240   else
   4241     dwarf2_directive_loc (dummy);
   4242 }
   4243 
   4244 /* Worker for .dtpoffd: generate a R_CRIS_32_DTPREL reloc, as for
   4245    expr:DTPREL but for use in debug info.  */
   4246 
   4247 static void
   4248 s_cris_dtpoff (int bytes)
   4249 {
   4250   expressionS ex;
   4251   char *p;
   4252 
   4253   if (bytes != 4)
   4254     as_fatal (_("internal inconsistency problem: %s called for %d bytes"),
   4255 	      __FUNCTION__, bytes);
   4256 
   4257   expression (&ex);
   4258 
   4259   p = frag_more (bytes);
   4260   md_number_to_chars (p, 0, bytes);
   4261   fix_new_exp (frag_now, p - frag_now->fr_literal, bytes, &ex, FALSE,
   4262 	       BFD_RELOC_CRIS_32_DTPREL);
   4263 
   4264   demand_empty_rest_of_line ();
   4265 }
   4266 
   4267 
   4268 /* Translate a <arch> string (as common to --march=<arch> and .arch <arch>)
   4269    into an enum.  If the string *STR is recognized, *STR is updated to point
   4270    to the end of the string.  If the string is not recognized,
   4271    arch_cris_unknown is returned.  */
   4272 
   4273 static enum cris_archs
   4274 cris_arch_from_string (char **str)
   4275 {
   4276   static const struct cris_arch_struct
   4277   {
   4278     const char *const name;
   4279     enum cris_archs arch;
   4280   } arch_table[] =
   4281       /* Keep in order longest-first for choices where one is a prefix
   4282 	 of another.  */
   4283     {{"v0_v10", arch_cris_any_v0_v10},
   4284      {"v10", arch_crisv10},
   4285      {"v32", arch_crisv32},
   4286      {"common_v10_v32", arch_cris_common_v10_v32}};
   4287 
   4288   const struct cris_arch_struct *ap;
   4289 
   4290   for (ap = arch_table;
   4291        ap < arch_table + sizeof (arch_table) / sizeof (arch_table[0]);
   4292        ap++)
   4293     {
   4294       int len = strlen (ap->name);
   4295 
   4296       if (strncmp (*str, ap->name, len) == 0
   4297 	  && (str[0][len] == 0 || ISSPACE (str[0][len])))
   4298 	{
   4299 	  *str += strlen (ap->name);
   4300 	  return ap->arch;
   4301 	}
   4302     }
   4303 
   4304   return arch_cris_unknown;
   4305 }
   4306 
   4307 /* Return nonzero if architecture version ARCH matches version range in
   4308    IVER.  */
   4309 
   4310 static int
   4311 cris_insn_ver_valid_for_arch (enum cris_insn_version_usage iver,
   4312 			      enum cris_archs arch)
   4313 {
   4314   switch (arch)
   4315     {
   4316     case arch_cris_any_v0_v10:
   4317       return
   4318 	(iver == cris_ver_version_all
   4319 	 || iver == cris_ver_warning
   4320 	 || iver == cris_ver_v0_3
   4321 	 || iver == cris_ver_v3p
   4322 	 || iver == cris_ver_v0_10
   4323 	 || iver == cris_ver_sim_v0_10
   4324 	 || iver == cris_ver_v3_10
   4325 	 || iver == cris_ver_v8
   4326 	 || iver == cris_ver_v8p
   4327 	 || iver == cris_ver_v8_10
   4328 	 || iver == cris_ver_v10
   4329 	 || iver == cris_ver_v10p);
   4330 
   4331     case arch_crisv32:
   4332       return
   4333 	(iver == cris_ver_version_all
   4334 	 || iver == cris_ver_v3p
   4335 	 || iver == cris_ver_v8p
   4336 	 || iver == cris_ver_v10p
   4337 	 || iver == cris_ver_v32p);
   4338 
   4339     case arch_cris_common_v10_v32:
   4340       return
   4341 	(iver == cris_ver_version_all
   4342 	 || iver == cris_ver_v3p
   4343 	 || iver == cris_ver_v8p
   4344 	 || iver == cris_ver_v10p);
   4345 
   4346     case arch_crisv0:
   4347       return
   4348 	(iver == cris_ver_version_all
   4349 	 || iver == cris_ver_v0_3
   4350 	 || iver == cris_ver_v0_10
   4351 	 || iver == cris_ver_sim_v0_10);
   4352 
   4353     case arch_crisv3:
   4354       return
   4355 	(iver == cris_ver_version_all
   4356 	 || iver == cris_ver_v0_3
   4357 	 || iver == cris_ver_v3p
   4358 	 || iver == cris_ver_v0_10
   4359 	 || iver == cris_ver_sim_v0_10
   4360 	 || iver == cris_ver_v3_10);
   4361 
   4362     case arch_crisv8:
   4363       return
   4364 	(iver == cris_ver_version_all
   4365 	 || iver == cris_ver_v3p
   4366 	 || iver == cris_ver_v0_10
   4367 	 || iver == cris_ver_sim_v0_10
   4368 	 || iver == cris_ver_v3_10
   4369 	 || iver == cris_ver_v8
   4370 	 || iver == cris_ver_v8p
   4371 	 || iver == cris_ver_v8_10);
   4372 
   4373     case arch_crisv10:
   4374       return
   4375 	(iver == cris_ver_version_all
   4376 	 || iver == cris_ver_v3p
   4377 	 || iver == cris_ver_v0_10
   4378 	 || iver == cris_ver_sim_v0_10
   4379 	 || iver == cris_ver_v3_10
   4380 	 || iver == cris_ver_v8p
   4381 	 || iver == cris_ver_v8_10
   4382 	 || iver == cris_ver_v10
   4383 	 || iver == cris_ver_v10p);
   4384 
   4385     default:
   4386       BAD_CASE (arch);
   4387    }
   4388 }
   4389 
   4390 /* Assert that the .arch ARCHCHOICE1 is compatible with the specified or
   4391    default --march=<ARCHCHOICE2> option.  */
   4392 
   4393 static void
   4394 s_cris_arch (int dummy ATTRIBUTE_UNUSED)
   4395 {
   4396   /* Right now we take the easy route and check for sameness.  It's not
   4397      obvious that allowing e.g. --march=v32 and .arch common_v0_v32
   4398      would be more useful than confusing, implementation-wise and
   4399      user-wise.  */
   4400 
   4401   char *str = input_line_pointer;
   4402   enum cris_archs arch = cris_arch_from_string (&str);
   4403 
   4404   if (arch == arch_cris_unknown)
   4405     {
   4406       as_bad (_("unknown operand to .arch"));
   4407 
   4408       /* For this one, str does not reflect the end of the operand,
   4409 	 since there was no matching arch.  Skip it manually; skip
   4410 	 things that can be part of a word (a name).  */
   4411       while (is_part_of_name (*str))
   4412 	str++;
   4413     }
   4414   else if (arch != cris_arch)
   4415     as_bad (_(".arch <arch> requires a matching --march=... option"));
   4416 
   4417   input_line_pointer = str;
   4418   demand_empty_rest_of_line ();
   4419   return;
   4420 }
   4421 
   4422 /*
   4423  * Local variables:
   4424  * eval: (c-set-style "gnu")
   4425  * indent-tabs-mode: t
   4426  * End:
   4427  */
   4428