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  /device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/
core_cm0.h 341 __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
418 #define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
419 #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
421 #define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
422 #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
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core_cm0plus.h 356 __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
439 #define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
440 #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
442 #define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
443 #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
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core_sc000.h 347 __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
430 #define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
431 #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
433 #define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
434 #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
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core_cm3.h 355 __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
465 #define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
466 #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
468 #define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */
469 #define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
471 #define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */
472 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
474 #define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
475 #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
477 #define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position *
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core_sc300.h 355 __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
460 #define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
461 #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
463 #define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */
464 #define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
466 #define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */
467 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
469 #define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
470 #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
472 #define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position *
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core_cm4.h 402 __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
504 #define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
505 #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
507 #define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */
508 #define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
510 #define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */
511 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
513 #define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
514 #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
516 #define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position *
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core_cm7.h 417 __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
548 #define SCB_CCR_BP_Pos 18 /*!< SCB CCR: Branch prediction enable bit Position */
549 #define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: Branch prediction enable bit Mask */
551 #define SCB_CCR_IC_Pos 17 /*!< SCB CCR: Instruction cache enable bit Position */
552 #define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: Instruction cache enable bit Mask */
554 #define SCB_CCR_DC_Pos 16 /*!< SCB CCR: Cache enable bit Position */
555 #define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: Cache enable bit Mask */
557 #define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
558 #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
560 #define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position *
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  /device/google/contexthub/firmware/os/platform/stm32/
i2c.c 117 volatile uint32_t CCR;
315 int ccr, ccr_1, ccr_2; local
324 ccr = apb1_clk / (speed * 2);
325 if (ccr < 4)
326 ccr = 4;
327 regs->CCR = I2C_CCR(ccr);
339 regs->CCR = I2C_CCR_FM | I2C_CCR(ccr_1);
341 regs->CCR = I2C_CCR_FM | I2C_CCR_DUTY_16_9 | I2C_CCR(ccr_2);
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMISelDAGToDAG.cpp 248 ARMCC::CondCodes CCVal, SDValue CCR,
251 ARMCC::CondCodes CCVal, SDValue CCR,
254 ARMCC::CondCodes CCVal, SDValue CCR,
257 ARMCC::CondCodes CCVal, SDValue CCR,
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  /toolchain/binutils/binutils-2.27/gas/config/
m68k-parse.h 85 CCR, /* Condition code Reg */
  /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/clang/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/darwin-x86/clang-4393122/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/darwin-x86/clang-4479392/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/darwin-x86/clang-4579689/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/darwin-x86/clang-4630689/include/clang/AST/
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  /prebuilts/clang/host/darwin-x86/clang-4639204/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/darwin-x86/clang-4691093/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/clang/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/linux-x86/clang-4393122/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/linux-x86/clang-4479392/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/linux-x86/clang-4579689/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/linux-x86/clang-4630689/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/linux-x86/clang-4639204/include/clang/AST/
Expr.h     [all...]
  /prebuilts/clang/host/linux-x86/clang-4691093/include/clang/AST/
Expr.h     [all...]
  /toolchain/binutils/binutils-2.27/include/opcode/
h8300.h 78 CCR = 0x4000,
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