1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef SI_SHADER_PRIVATE_H 25 #define SI_SHADER_PRIVATE_H 26 27 #include "si_shader.h" 28 #include "gallivm/lp_bld_init.h" 29 #include "gallivm/lp_bld_tgsi.h" 30 #include "tgsi/tgsi_parse.h" 31 #include "ac_llvm_util.h" 32 33 #include <llvm-c/Core.h> 34 #include <llvm-c/TargetMachine.h> 35 36 struct pipe_debug_callback; 37 struct radeon_shader_binary; 38 39 #define RADEON_LLVM_MAX_INPUT_SLOTS 32 40 #define RADEON_LLVM_MAX_INPUTS 32 * 4 41 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4 42 43 #define RADEON_LLVM_INITIAL_CF_DEPTH 4 44 45 #define RADEON_LLVM_MAX_SYSTEM_VALUES 4 46 #define RADEON_LLVM_MAX_ADDRS 16 47 48 struct si_llvm_flow; 49 50 struct si_shader_context { 51 struct lp_build_tgsi_context bld_base; 52 struct gallivm_state gallivm; 53 struct ac_llvm_context ac; 54 struct si_shader *shader; 55 struct si_screen *screen; 56 57 unsigned type; /* PIPE_SHADER_* specifies the type of shader. */ 58 59 /* Whether the prolog will be compiled separately. */ 60 bool separate_prolog; 61 62 /** This function is responsible for initilizing the inputs array and will be 63 * called once for each input declared in the TGSI shader. 64 */ 65 void (*load_input)(struct si_shader_context *, 66 unsigned input_index, 67 const struct tgsi_full_declaration *decl, 68 LLVMValueRef out[4]); 69 70 void (*load_system_value)(struct si_shader_context *, 71 unsigned index, 72 const struct tgsi_full_declaration *decl); 73 74 void (*declare_memory_region)(struct si_shader_context *, 75 const struct tgsi_full_declaration *decl); 76 77 /** This array contains the input values for the shader. Typically these 78 * values will be in the form of a target intrinsic that will inform the 79 * backend how to load the actual inputs to the shader. 80 */ 81 struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS]; 82 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS]; 83 LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS]; 84 LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS]; 85 86 /** This pointer is used to contain the temporary values. 87 * The amount of temporary used in tgsi can't be bound to a max value and 88 * thus we must allocate this array at runtime. 89 */ 90 LLVMValueRef *temps; 91 unsigned temps_count; 92 LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES]; 93 94 LLVMValueRef *imms; 95 unsigned imms_num; 96 97 struct si_llvm_flow *flow; 98 unsigned flow_depth; 99 unsigned flow_depth_max; 100 101 struct tgsi_array_info *temp_arrays; 102 LLVMValueRef *temp_array_allocas; 103 104 LLVMValueRef undef_alloca; 105 106 LLVMValueRef main_fn; 107 LLVMTypeRef return_type; 108 109 int param_streamout_config; 110 int param_streamout_write_index; 111 int param_streamout_offset[4]; 112 int param_vertex_id; 113 int param_rel_auto_id; 114 int param_vs_prim_id; 115 int param_instance_id; 116 int param_vertex_index0; 117 int param_tes_u; 118 int param_tes_v; 119 int param_tes_rel_patch_id; 120 int param_tes_patch_id; 121 int param_es2gs_offset; 122 int param_oc_lds; 123 124 /* Sets a bit if the dynamic HS control word was 0x80000000. The bit is 125 * 0x800000 for VS, 0x1 for ES. 126 */ 127 int param_tess_offchip; 128 129 LLVMTargetMachineRef tm; 130 131 unsigned invariant_load_md_kind; 132 unsigned range_md_kind; 133 unsigned uniform_md_kind; 134 unsigned fpmath_md_kind; 135 LLVMValueRef fpmath_md_2p5_ulp; 136 LLVMValueRef empty_md; 137 138 /* Preloaded descriptors. */ 139 LLVMValueRef esgs_ring; 140 LLVMValueRef gsvs_ring[4]; 141 142 LLVMValueRef lds; 143 LLVMValueRef gs_next_vertex[4]; 144 LLVMValueRef return_value; 145 146 LLVMTypeRef voidt; 147 LLVMTypeRef i1; 148 LLVMTypeRef i8; 149 LLVMTypeRef i32; 150 LLVMTypeRef i64; 151 LLVMTypeRef i128; 152 LLVMTypeRef f32; 153 LLVMTypeRef v16i8; 154 LLVMTypeRef v2i32; 155 LLVMTypeRef v4i32; 156 LLVMTypeRef v4f32; 157 LLVMTypeRef v8i32; 158 159 LLVMValueRef shared_memory; 160 }; 161 162 static inline struct si_shader_context * 163 si_shader_context(struct lp_build_tgsi_context *bld_base) 164 { 165 return (struct si_shader_context*)bld_base; 166 } 167 168 void si_llvm_add_attribute(LLVMValueRef F, const char *name, int value); 169 void si_llvm_shader_type(LLVMValueRef F, unsigned type); 170 171 LLVMTargetRef si_llvm_get_amdgpu_target(const char *triple); 172 173 unsigned si_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binary, 174 LLVMTargetMachineRef tm, 175 struct pipe_debug_callback *debug); 176 177 LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base, 178 enum tgsi_opcode_type type); 179 180 LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base, 181 enum tgsi_opcode_type type, LLVMValueRef value); 182 183 LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx, 184 LLVMValueRef index, 185 unsigned num); 186 187 void si_llvm_context_init(struct si_shader_context *ctx, 188 struct si_screen *sscreen, 189 struct si_shader *shader, 190 LLVMTargetMachineRef tm, 191 const struct tgsi_shader_info *info, 192 const struct tgsi_token *tokens); 193 194 void si_llvm_create_func(struct si_shader_context *ctx, 195 const char *name, 196 LLVMTypeRef *return_types, unsigned num_return_elems, 197 LLVMTypeRef *ParamTypes, unsigned ParamCount); 198 199 void si_llvm_dispose(struct si_shader_context *ctx); 200 201 void si_llvm_finalize_module(struct si_shader_context *ctx, 202 bool run_verifier); 203 204 LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base, 205 enum tgsi_opcode_type type, 206 LLVMValueRef ptr, 207 LLVMValueRef ptr2); 208 209 LLVMValueRef si_llvm_saturate(struct lp_build_tgsi_context *bld_base, 210 LLVMValueRef value); 211 212 LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base, 213 const struct tgsi_full_src_register *reg, 214 enum tgsi_opcode_type type, 215 unsigned swizzle); 216 217 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base, 218 const struct tgsi_full_instruction *inst, 219 const struct tgsi_opcode_info *info, 220 LLVMValueRef dst[4]); 221 222 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base); 223 224 #endif 225
