| /external/swiftshader/third_party/subzero/src/ |
| IceConditionCodesX8632.h | 31 enum BrCond {
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| IceConditionCodesX8664.h | 27 enum BrCond {
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| IceTargetLoweringX8632Traits.h | 755 Cond::BrCond C1, C2;
766 static const struct TableIcmp32Type { Cond::BrCond Mapping; } TableIcmp32[];
776 Cond::BrCond C1, C2, C3;
781 static Cond::BrCond getIcmp32Mapping(InstIcmp::ICond Cond) {
[all...] |
| IceAssemblerX86Base.h | 58 using BrCond = typename Traits::Cond::BrCond;
300 void setcc(BrCond condition, ByteRegister dst);
301 void setcc(BrCond condition, const Address &address);
325 void cmov(Type Ty, BrCond cond, GPRRegister dst, GPRRegister src);
326 void cmov(Type Ty, BrCond cond, GPRRegister dst, const Address &src);
707 void j(BrCond condition, Label *label, bool near = kFarJump);
708 void j(BrCond condition, const ConstantRelocatable *label); // not testable.
[all...] |
| IceTargetLoweringX86Base.h | 66 using BrCond = typename Traits::Cond::BrCond;
563 void _br(BrCond Condition, CfgNode *TargetTrue, CfgNode *TargetFalse) {
570 void _br(BrCond Condition, CfgNode *Target) {
573 void _br(BrCond Condition, InstX86Label *Label,
593 void _cmov(Variable *Dest, Operand *Src0, BrCond Condition) {
[all...] |
| IceTargetLoweringX8664Traits.h | [all...] |
| IceInstX86Base.h | 50 using BrCond = typename Traits::Cond::BrCond;
207 static BrCond getOppositeCondition(BrCond Cond);
380 CfgNode *TargetFalse, BrCond Condition,
397 static InstX86Br *create(Cfg *Func, CfgNode *Target, BrCond Condition,
407 static InstX86Br *create(Cfg *Func, InstX86Label *Label, BrCond Condition,
442 const InstX86Label *Label, BrCond Condition, Mode Kind);
444 BrCond Condition;
[all...] |
| IceInstX86BaseImpl.h | 44 typename InstImpl<TraitsType>::Cond::BrCond
45 InstImpl<TraitsType>::InstX86Base::getOppositeCondition(BrCond Cond) {
111 BrCond Condition, Mode Kind)
193 BrCond Condition)
366 BrCond Cond)
[all...] |
| IceAssemblerX86BaseImpl.h | 210 void AssemblerX86Base<TraitsType>::setcc(BrCond condition, ByteRegister dst) {
219 void AssemblerX86Base<TraitsType>::setcc(BrCond condition,
420 void AssemblerX86Base<TraitsType>::cmov(Type Ty, BrCond cond, GPRRegister dst,
434 void AssemblerX86Base<TraitsType>::cmov(Type Ty, BrCond cond, GPRRegister dst,
[all...] |
| IceTargetLoweringX86BaseImpl.h | [all...] |
| /external/llvm/lib/CodeGen/ |
| IfConversion.cpp | 109 /// BrCond - Conditions for end of block conditional branches.
127 SmallVector<MachineOperand, 4> BrCond;
455 if (!TII->ReverseBranchCondition(BBI.BrCond)) {
457 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
517 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
656 BBI.BrCond.clear();
658 !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
661 if (BBI.BrCond.size()) {
779 if (BBI.BrCond.size()) {
785 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end())
[all...] |
| MachinePipeliner.cpp | 166 SmallVector<MachineOperand, 4> BrCond;
761 LI.BrCond.clear();
762 if (TII->analyzeBranch(*L.getHeader(), LI.TBB, LI.FBB, LI.BrCond))
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| IfConversion.cpp | 100 /// BrCond - Conditions for end of block conditional branches.
118 SmallVector<MachineOperand, 4> BrCond;
430 if (!TII->ReverseBranchCondition(BBI.BrCond)) {
432 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
492 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
627 BBI.BrCond.clear();
629 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
632 if (BBI.BrCond.size()) {
720 if (BBI.BrCond.size()) {
726 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end())
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/ |
| SimplifyCFG.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Transforms/Utils/ |
| SimplifyCFG.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.cpp | [all...] |
