/toolchain/binutils/binutils-2.27/gas/testsuite/gas/m68hc11/ |
9s12x-exg-sex-tfr.d | 15 0x0000000c exg CCR,CCR 16 0x0000000e exg D,CCR 17 0x00000010 exg X,CCR 18 0x00000012 exg Y,CCR 19 0x00000014 exg SP,CCR 22 0x0000001a exg CCR,D 27 0x00000024 exg CCR,X 32 0x0000002e exg CCR,Y 37 0x00000038 exg CCR,S [all...] |
insns9s12xg.d | 112 000000ce <label3\+0xca> tfr R2, CCR 113 000000d0 <label3\+0xcc> tfr CCR, R3
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/toolchain/binutils/binutils-2.27/gas/config/ |
m68k-parse.h | 85 CCR, /* Condition code Reg */
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tc-h8300.c | 375 ccr 405 *mode = CCR; 1143 case CCR: 1144 if (op_mode != CCR && [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
ARMISelDAGToDAG.cpp | 248 ARMCC::CondCodes CCVal, SDValue CCR, 251 ARMCC::CondCodes CCVal, SDValue CCR, 254 ARMCC::CondCodes CCVal, SDValue CCR, 257 ARMCC::CondCodes CCVal, SDValue CCR, [all...] |
/device/google/contexthub/firmware/os/platform/stm32/ |
i2c.c | 117 volatile uint32_t CCR; 315 int ccr, ccr_1, ccr_2; local 324 ccr = apb1_clk / (speed * 2); 325 if (ccr < 4) 326 ccr = 4; 327 regs->CCR = I2C_CCR(ccr); 339 regs->CCR = I2C_CCR_FM | I2C_CCR(ccr_1); 341 regs->CCR = I2C_CCR_FM | I2C_CCR_DUTY_16_9 | I2C_CCR(ccr_2);
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/xgate/ |
all_insns.d | 125 0+00da <L100> tfr R7, CCR 126 0+00dc <L101> tfr CCR, R7
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/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/ |
core_cm7.h | 417 __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ 548 #define SCB_CCR_BP_Pos 18 /*!< SCB CCR: Branch prediction enable bit Position */ 549 #define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: Branch prediction enable bit Mask */ 551 #define SCB_CCR_IC_Pos 17 /*!< SCB CCR: Instruction cache enable bit Position */ 552 #define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: Instruction cache enable bit Mask */ 554 #define SCB_CCR_DC_Pos 16 /*!< SCB CCR: Cache enable bit Position */ 555 #define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: Cache enable bit Mask */ 557 #define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */ 558 #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ 560 #define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position * [all...] |
core_cm0.h | 341 __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ 418 #define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */ 419 #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ 421 #define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */ 422 #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ [all...] |
core_cm0plus.h | 356 __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ 439 #define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */ 440 #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ 442 #define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */ 443 #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ [all...] |
core_sc000.h | 347 __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ 430 #define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */ 431 #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ 433 #define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */ 434 #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ [all...] |
/toolchain/binutils/binutils-2.27/opcodes/ |
h8300-dis.c | 169 "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr" 302 else if ((x & MODE) == CCR) 303 outfn (stream, "ccr"); 483 if (((looking_for & MODE) == CCR && (thisnib != C_CCR))
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/toolchain/binutils/binutils-2.27/include/opcode/ |
h8300.h | 78 CCR = 0x4000, [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |
ARMISelLowering.h | 657 SDValue ARMcc, SDValue CCR, SDValue Cmp,
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/external/libunwind/src/ptrace/ |
_UPT_reg_offset.c | 424 [UNW_PPC32_CCR] = UNW_PPC_PT(CCR)
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/prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/clang/include/clang/AST/ |
Expr.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4393122/include/clang/AST/ |
Expr.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4479392/include/clang/AST/ |
Expr.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4579689/include/clang/AST/ |
Expr.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4630689/include/clang/AST/ |
Expr.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4639204/include/clang/AST/ |
Expr.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4691093/include/clang/AST/ |
Expr.h | [all...] |
/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/clang/include/clang/AST/ |
Expr.h | [all...] |
/prebuilts/clang/host/linux-x86/clang-4393122/include/clang/AST/ |
Expr.h | [all...] |