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Searched
refs:ICER
(Results
1 - 7
of
7
) sorted by null
/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/
core_cm0.h
313
__IO uint32_t
ICER
[1]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
558
NVIC->
ICER
[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
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all
...]
core_cm0plus.h
324
__IO uint32_t
ICER
[1]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
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all
...]
core_sc000.h
319
__IO uint32_t
ICER
[1]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
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all
...]
core_cm3.h
320
__IO uint32_t
ICER
[8]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
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all
...]
core_cm4.h
367
__IO uint32_t
ICER
[8]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
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all
...]
core_sc300.h
320
__IO uint32_t
ICER
[8]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
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all
...]
core_cm7.h
382
__IO uint32_t
ICER
[8]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
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all
...]
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