/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
MipsExpandPseudo.cpp | 89 unsigned LoReg = I->getOperand(1).getReg(), HiReg = I->getOperand(2).getReg(); 97 BuildMI(MBB, I, dl, Mtc1Tdd, *SubReg).addReg(LoReg);
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/external/llvm/lib/Target/Hexagon/ |
HexagonCopyToCombine.cpp | 734 unsigned LoReg = LoOperand.getReg(); 745 .addReg(LoReg, LoRegKillFlag); 753 .addReg(LoReg, LoRegKillFlag); 760 .addReg(LoReg, LoRegKillFlag); 768 .addReg(LoReg, LoRegKillFlag); 772 // DoubleRegDest = combine #HiImm, LoReg 775 .addReg(LoReg, LoRegKillFlag); 833 unsigned LoReg = LoOperand.getReg(); 840 // DoubleRegDest = combine HiReg, LoReg 843 .addReg(LoReg, LoRegKillFlag) [all...] |
HexagonFrameLowering.cpp | 827 unsigned LoReg = HRI.getSubReg(Reg, Hexagon::subreg_loreg); 829 unsigned LoDwarfReg = HRI.getDwarfRegNum(LoReg, true); [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEFrameLowering.cpp | 284 unsigned LoReg = I->getOperand(1).getReg(); 301 std::swap(LoReg, HiReg); 302 TII.storeRegToStack(MBB, I, LoReg, I->getOperand(1).isKill(), FI, RC, [all...] |
MipsSEInstrInfo.cpp | 651 unsigned LoReg = I->getOperand(1).getReg(), HiReg = I->getOperand(2).getReg(); 680 .addReg(LoReg);
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/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |