/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
LegalizeVectorTypes.cpp | 139 EVT NewVT = N->getValueType(0).getVectorElementType(); 141 NewVT, N->getOperand(0)); 145 EVT NewVT = N->getValueType(0).getVectorElementType(); 147 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(), 148 Op0, DAG.getValueType(NewVT), 162 EVT NewVT = N->getValueType(0).getVectorElementType(); 165 NewVT, Op, N->getOperand(1)); [all...] |
LegalizeTypesGeneric.cpp | 178 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); 182 NewVT, 2*OldElts), 193 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 197 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 303 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); 325 NewVT, NewElts.size()),
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TargetLowering.cpp | 680 MVT NewVT = MVT::getVectorVT(EltTy, NumElts); 681 if (!TLI->isTypeLegal(NewVT)) 682 NewVT = EltTy; 683 IntermediateVT = NewVT; 685 unsigned NewVTSize = NewVT.getSizeInBits(); 691 EVT DestVT = TLI->getRegisterType(NewVT); 693 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorTypes.cpp | 167 EVT NewVT = N->getValueType(0).getVectorElementType(); 169 NewVT, N->getOperand(0)); 183 EVT NewVT = N->getValueType(0).getVectorElementType(); 185 return DAG.getConvertRndSat(NewVT, SDLoc(N), 186 Op0, DAG.getValueType(NewVT), 200 EVT NewVT = N->getValueType(0).getVectorElementType(); 203 NewVT, Op, N->getOperand(1)); [all...] |
LegalizeTypesGeneric.cpp | 225 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); 238 NewVT, 2*OldElts), 245 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 249 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 385 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); 407 NewVT, NewElts.size()),
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LegalizeVectorOps.cpp | 473 EVT NewVT; 476 NewVT = VT.widenIntegerVectorElementType(*DAG.getContext()); 477 assert(NewVT.isSimple() && "Promoting to a non-simple vector type!"); 478 if (TLI.isOperationLegalOrCustom(ISD::FP_TO_SINT, NewVT)) { 482 if (!isSigned && TLI.isOperationLegalOrCustom(ISD::FP_TO_UINT, NewVT)) { 489 SDValue promoted = DAG.getNode(NewOpc, SDLoc(Op), NewVT, Op.getOperand(0)); [all...] |
DAGCombiner.cpp | [all...] |
SelectionDAG.cpp | [all...] |
LegalizeDAG.cpp | [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |
X86ISelLowering.h | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUISelLowering.cpp | 514 EVT NewVT) const { 516 unsigned NewSize = NewVT.getStoreSizeInBits(); [all...] |
R600ISelLowering.cpp | [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombineCalls.cpp | [all...] |
/external/llvm/include/llvm/Target/ |
TargetLowering.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
TargetLowering.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/Target/ |
TargetLowering.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/Target/ |
TargetLowering.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/Target/ |
TargetLowering.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/Target/ |
TargetLowering.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/Target/ |
TargetLowering.h | [all...] |
/prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/Target/ |
TargetLowering.h | [all...] |