/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
MipsExpandPseudo.cpp | 92 const unsigned* SubReg = 97 BuildMI(MBB, I, dl, Mtc1Tdd, *SubReg).addReg(LoReg); 98 BuildMI(MBB, I, dl, Mtc1Tdd, *(SubReg + 1)).addReg(HiReg); 108 const unsigned* SubReg = TM.getRegisterInfo()->getSubRegisters(SrcReg); 110 BuildMI(MBB, I, dl, Mfc1Tdd, DstReg).addReg(*(SubReg + N));
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
LiveVariables.cpp | 194 unsigned SubReg = *SubRegs; ++SubRegs) { 195 MachineInstr *Def = PhysRegDef[SubReg]; 200 LastDefReg = SubReg; 218 unsigned SubReg = *SubRegs; ++SubRegs) 219 PartDefRegs.insert(SubReg); 249 unsigned SubReg = *SubRegs; ++SubRegs) { 250 if (Processed.count(SubReg)) 252 if (PartDefRegs.count(SubReg)) 256 LastPartialDef->addOperand(MachineOperand::CreateReg(SubReg, 259 PhysRegDef[SubReg] = LastPartialDef [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64AdvSIMDScalarPass.cpp | 112 static bool isGPR64(unsigned Reg, unsigned SubReg, 114 if (SubReg) 121 static bool isFPR64(unsigned Reg, unsigned SubReg, 125 SubReg == 0) || 127 SubReg == AArch64::dsub); 129 return (AArch64::FPR64RegClass.contains(Reg) && SubReg == 0) || 130 (AArch64::FPR128RegClass.contains(Reg) && SubReg == AArch64::dsub); 137 unsigned &SubReg) { 138 SubReg = 0; 146 SubReg = AArch64::dsub [all...] |
/external/llvm/lib/CodeGen/ |
LiveVariables.cpp | 198 unsigned SubReg = *SubRegs; 199 MachineInstr *Def = PhysRegDef[SubReg]; 204 LastDefReg = SubReg; 252 unsigned SubReg = *SubRegs; 253 if (Processed.count(SubReg)) 255 if (PartDefRegs.count(SubReg)) 259 LastPartialDef->addOperand(MachineOperand::CreateReg(SubReg, 262 PhysRegDef[SubReg] = LastPartialDef; 263 for (MCSubRegIterator SS(SubReg, TRI); SS.isValid(); ++SS) 291 unsigned SubReg = *SubRegs [all...] |
PeepholeOptimizer.cpp | 160 bool findNextSource(unsigned Reg, unsigned SubReg, 225 ValueTrackerResult(unsigned Reg, unsigned SubReg) : Inst(nullptr) { 226 addSource(Reg, SubReg); 256 assert(Idx < getNumSources() && "SubReg source out of index"); 257 return RegSrcs[Idx].SubReg; 406 /// reachable uses of the source with the subreg of the result. 606 /// for the value defined by \p Reg and \p SubReg. 613 /// share the same register file as \p Reg and \p SubReg. The client should 616 bool PeepholeOptimizer::findNextSource(unsigned Reg, unsigned SubReg, 627 TargetInstrInfo::RegSubRegPair CurSrcPair(Reg, SubReg); [all...] |
LiveRangeCalc.cpp | 65 unsigned SubReg = MO.getSubReg(); 66 if (LI.hasSubRanges() || (SubReg != 0 && TrackSubRegs)) { 67 LaneBitmask Mask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg) 175 unsigned SubReg = MO.getSubReg(); 176 if (SubReg != 0) { 177 LaneBitmask SubRegMask = TRI.getSubRegIndexLaneMask(SubReg);
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/external/llvm/lib/MC/ |
MCRegisterInfo.cpp | 38 unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const { 39 assert(SubReg && SubReg < getNumRegs() && "This is not a register"); 44 if (*Subs == SubReg)
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/external/llvm/include/llvm/Target/ |
TargetInstrInfo.h | 167 /// expected the pre-extension value is available as a subreg of the result 277 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 356 /// Used to give some type checking when modeling Reg:SubReg. 359 unsigned SubReg; 360 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 361 : Reg(Reg), SubReg(SubReg) {} 368 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 370 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 376 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
TargetRegisterInfo.h | 261 const char *const *SubRegIndexNames; // Names of subreg indexes. 514 // subreg index DefSubReg, reading from another source with class SrcRC and 547 /// compositions. If R does not have a subreg a, or R:a does not have a subreg 552 /// If you compose subreg indices dsub_1, ssub_0 you get ssub_2. [all...] |
/prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
TargetInstrInfo.h | 167 /// expected the pre-extension value is available as a subreg of the result 280 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 359 /// Used to give some type checking when modeling Reg:SubReg. 362 unsigned SubReg; 363 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 364 : Reg(Reg), SubReg(SubReg) {} 371 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 373 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 379 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
TargetRegisterInfo.h | 251 const char *const *SubRegIndexNames; // Names of subreg indexes. 511 // subreg index DefSubReg, reading from another source with class SrcRC and 544 /// compositions. If R does not have a subreg a, or R:a does not have a subreg 549 /// If you compose subreg indices dsub_1, ssub_0 you get ssub_2. [all...] |
/prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/Target/ |
TargetInstrInfo.h | 203 /// expected the pre-extension value is available as a subreg of the result 316 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 395 /// Used to give some type checking when modeling Reg:SubReg. 398 unsigned SubReg; 399 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 400 : Reg(Reg), SubReg(SubReg) {} 407 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 409 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 415 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/Target/ |
TargetInstrInfo.h | 203 /// expected the pre-extension value is available as a subreg of the result 316 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 395 /// Used to give some type checking when modeling Reg:SubReg. 398 unsigned SubReg; 399 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 400 : Reg(Reg), SubReg(SubReg) {} 407 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 409 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 415 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/Target/ |
TargetInstrInfo.h | 211 /// expected the pre-extension value is available as a subreg of the result 321 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 401 /// Used to give some type checking when modeling Reg:SubReg. 404 unsigned SubReg; 406 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 407 : Reg(Reg), SubReg(SubReg) {} 416 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 418 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 424 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/Target/ |
TargetInstrInfo.h | 211 /// expected the pre-extension value is available as a subreg of the result 321 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 401 /// Used to give some type checking when modeling Reg:SubReg. 404 unsigned SubReg; 406 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 407 : Reg(Reg), SubReg(SubReg) {} 416 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 418 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 424 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/Target/ |
TargetInstrInfo.h | 211 /// expected the pre-extension value is available as a subreg of the result 321 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 401 /// Used to give some type checking when modeling Reg:SubReg. 404 unsigned SubReg; 406 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 407 : Reg(Reg), SubReg(SubReg) {} 416 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 418 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 424 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/Target/ |
TargetInstrInfo.h | 211 /// expected the pre-extension value is available as a subreg of the result 321 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 401 /// Used to give some type checking when modeling Reg:SubReg. 404 unsigned SubReg; 406 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 407 : Reg(Reg), SubReg(SubReg) {} 416 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 418 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 424 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
TargetInstrInfo.h | 167 /// expected the pre-extension value is available as a subreg of the result 280 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 359 /// Used to give some type checking when modeling Reg:SubReg. 362 unsigned SubReg; 363 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 364 : Reg(Reg), SubReg(SubReg) {} 371 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 373 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 379 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/Target/ |
TargetInstrInfo.h | 203 /// expected the pre-extension value is available as a subreg of the result 316 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 395 /// Used to give some type checking when modeling Reg:SubReg. 398 unsigned SubReg; 399 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 400 : Reg(Reg), SubReg(SubReg) {} 407 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 409 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 415 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/Target/ |
TargetInstrInfo.h | 203 /// expected the pre-extension value is available as a subreg of the result 316 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 395 /// Used to give some type checking when modeling Reg:SubReg. 398 unsigned SubReg; 399 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 400 : Reg(Reg), SubReg(SubReg) {} 407 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 409 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 415 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/Target/ |
TargetInstrInfo.h | 211 /// expected the pre-extension value is available as a subreg of the result 321 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 401 /// Used to give some type checking when modeling Reg:SubReg. 404 unsigned SubReg; 406 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 407 : Reg(Reg), SubReg(SubReg) {} 416 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 418 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 424 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/Target/ |
TargetInstrInfo.h | 211 /// expected the pre-extension value is available as a subreg of the result 321 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 401 /// Used to give some type checking when modeling Reg:SubReg. 404 unsigned SubReg; 406 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 407 : Reg(Reg), SubReg(SubReg) {} 416 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 418 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 424 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/Target/ |
TargetInstrInfo.h | 211 /// expected the pre-extension value is available as a subreg of the result 321 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 401 /// Used to give some type checking when modeling Reg:SubReg. 404 unsigned SubReg; 406 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 407 : Reg(Reg), SubReg(SubReg) {} 416 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 418 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 424 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/Target/ |
TargetInstrInfo.h | 211 /// expected the pre-extension value is available as a subreg of the result 321 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with 401 /// Used to give some type checking when modeling Reg:SubReg. 404 unsigned SubReg; 406 RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0) 407 : Reg(Reg), SubReg(SubReg) {} 416 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, 418 : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {} 424 /// the list is modeled as <Reg:SubReg, SubIdx> [all...] |
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
MachineOperand.h | 60 /// SubReg - Subregister number, only valid for MO_Register. A value of 0 61 /// indicates the MO_Register has no subReg. 62 unsigned char SubReg; 228 return (unsigned)SubReg; 295 void setSubReg(unsigned subReg) { 297 SubReg = (unsigned char)subReg; 301 /// subregister Reg:SubReg. Take any existing SubReg index into account, 302 /// using TargetRegisterInfo to compose the subreg indices if necessary [all...] |