/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
BlackfinISelLowering.h | 50 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
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BlackfinISelLowering.cpp | 597 /// getRegForInlineAsmConstraint - Return register no and class for a C_Register 600 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const { 605 return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT); 638 return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
SparcISelLowering.h | 67 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
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/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.h | 52 std::pair<unsigned, const TargetRegisterClass *> getRegForInlineAsmConstraint(
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WebAssemblyISelLowering.cpp | 185 WebAssemblyTargetLowering::getRegForInlineAsmConstraint( 205 return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
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/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
AlphaISelLowering.h | 98 getRegForInlineAsmConstraint(const std::string &Constraint,
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/external/llvm/lib/Target/AVR/ |
AVRISelLowering.h | 106 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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/external/llvm/lib/Target/Lanai/ |
LanaiISelLowering.h | 97 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.h | 103 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
SPUISelLowering.h | 141 getRegForInlineAsmConstraint(const std::string &Constraint,
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
MBlazeISelLowering.h | 173 getRegForInlineAsmConstraint(const std::string &Constraint,
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
MSP430ISelLowering.h | 100 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
MipsISelLowering.h | 179 getRegForInlineAsmConstraint(const std::string &Constraint,
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
SystemZISelLowering.h | 70 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
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SystemZISelLowering.cpp | 209 getRegForInlineAsmConstraint(const std::string &Constraint, 225 return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT); [all...] |
/external/llvm/lib/Target/AMDGPU/ |
SIISelLowering.h | 153 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.h | 97 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.h | 193 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
XCoreISelLowering.h | 153 getRegForInlineAsmConstraint(const std::string &Constraint,
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/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.h | 214 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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/external/llvm/lib/Target/NVPTX/ |
NVPTXISelLowering.h | 477 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.h | 404 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
ARMISelLowering.h | 323 getRegForInlineAsmConstraint(const std::string &Constraint,
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
PPCISelLowering.h | 320 getRegForInlineAsmConstraint(const std::string &Constraint,
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/external/llvm/lib/CodeGen/SelectionDAG/ |
FunctionLoweringInfo.cpp | 188 TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
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