1 /************************************************************************** 2 * 3 * Copyright 2003 VMware, Inc. 4 * Copyright 2009 Intel Corporation. 5 * All Rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the 9 * "Software"), to deal in the Software without restriction, including 10 * without limitation the rights to use, copy, modify, merge, publish, 11 * distribute, sub license, and/or sell copies of the Software, and to 12 * permit persons to whom the Software is furnished to do so, subject to 13 * the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the 16 * next paragraph) shall be included in all copies or substantial portions 17 * of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26 * 27 **************************************************************************/ 28 29 #include "main/glheader.h" 30 #include "main/mtypes.h" 31 #include "main/condrender.h" 32 #include "swrast/swrast.h" 33 #include "drivers/common/meta.h" 34 35 #include "intel_context.h" 36 #include "intel_blit.h" 37 #include "intel_clear.h" 38 #include "intel_fbo.h" 39 #include "intel_regions.h" 40 41 #define FILE_DEBUG_FLAG DEBUG_BLIT 42 43 static const char *buffer_names[] = { 44 [BUFFER_FRONT_LEFT] = "front", 45 [BUFFER_BACK_LEFT] = "back", 46 [BUFFER_FRONT_RIGHT] = "front right", 47 [BUFFER_BACK_RIGHT] = "back right", 48 [BUFFER_DEPTH] = "depth", 49 [BUFFER_STENCIL] = "stencil", 50 [BUFFER_ACCUM] = "accum", 51 [BUFFER_AUX0] = "aux0", 52 [BUFFER_COLOR0] = "color0", 53 [BUFFER_COLOR1] = "color1", 54 [BUFFER_COLOR2] = "color2", 55 [BUFFER_COLOR3] = "color3", 56 [BUFFER_COLOR4] = "color4", 57 [BUFFER_COLOR5] = "color5", 58 [BUFFER_COLOR6] = "color6", 59 [BUFFER_COLOR7] = "color7", 60 }; 61 62 static void 63 debug_mask(const char *name, GLbitfield mask) 64 { 65 GLuint i; 66 67 if (unlikely(INTEL_DEBUG & DEBUG_BLIT)) { 68 DBG("%s clear:", name); 69 for (i = 0; i < BUFFER_COUNT; i++) { 70 if (mask & (1 << i)) 71 DBG(" %s", buffer_names[i]); 72 } 73 DBG("\n"); 74 } 75 } 76 77 /** 78 * Called by ctx->Driver.Clear. 79 */ 80 static void 81 intelClear(struct gl_context *ctx, GLbitfield mask) 82 { 83 struct intel_context *intel = intel_context(ctx); 84 GLuint colorMask; 85 GLbitfield tri_mask = 0; 86 GLbitfield blit_mask = 0; 87 GLbitfield swrast_mask = 0; 88 struct gl_framebuffer *fb = ctx->DrawBuffer; 89 struct intel_renderbuffer *irb; 90 int i; 91 92 memcpy(&colorMask, &ctx->Color.ColorMask[0], sizeof(colorMask)); 93 94 if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) { 95 intel->front_buffer_dirty = true; 96 } 97 98 if (0) 99 fprintf(stderr, "%s\n", __func__); 100 101 /* Get SW clears out of the way: Anything without an intel_renderbuffer */ 102 for (i = 0; i < BUFFER_COUNT; i++) { 103 if (!(mask & (1 << i))) 104 continue; 105 106 irb = intel_get_renderbuffer(fb, i); 107 if (unlikely(!irb)) { 108 swrast_mask |= (1 << i); 109 mask &= ~(1 << i); 110 } 111 } 112 if (unlikely(swrast_mask)) { 113 debug_mask("swrast", swrast_mask); 114 _swrast_Clear(ctx, swrast_mask); 115 } 116 117 /* HW color buffers (front, back, aux, generic FBO, etc) */ 118 if (colorMask == ~0) { 119 /* clear all R,G,B,A */ 120 blit_mask |= (mask & BUFFER_BITS_COLOR); 121 } 122 else { 123 /* glColorMask in effect */ 124 tri_mask |= (mask & BUFFER_BITS_COLOR); 125 } 126 127 /* Make sure we have up to date buffers before we start looking at 128 * the tiling bits to determine how to clear. */ 129 intel_prepare_render(intel); 130 131 /* HW stencil */ 132 if (mask & BUFFER_BIT_STENCIL) { 133 const struct intel_region *stencilRegion 134 = intel_get_rb_region(fb, BUFFER_STENCIL); 135 if (stencilRegion) { 136 /* have hw stencil */ 137 if (stencilRegion->tiling == I915_TILING_Y || 138 (ctx->Stencil.WriteMask[0] & 0xff) != 0xff) { 139 /* We have to use the 3D engine if we're clearing a partial mask 140 * of the stencil buffer, or if we're on a 965 which has a tiled 141 * depth/stencil buffer in a layout we can't blit to. 142 */ 143 tri_mask |= BUFFER_BIT_STENCIL; 144 } 145 else { 146 /* clearing all stencil bits, use blitting */ 147 blit_mask |= BUFFER_BIT_STENCIL; 148 } 149 } 150 } 151 152 /* HW depth */ 153 if (mask & BUFFER_BIT_DEPTH) { 154 const struct intel_region *irb = intel_get_rb_region(fb, BUFFER_DEPTH); 155 156 /* clear depth with whatever method is used for stencil (see above) */ 157 if (irb->tiling == I915_TILING_Y || tri_mask & BUFFER_BIT_STENCIL) 158 tri_mask |= BUFFER_BIT_DEPTH; 159 else 160 blit_mask |= BUFFER_BIT_DEPTH; 161 } 162 163 /* If we're doing a tri pass for depth/stencil, include a likely color 164 * buffer with it. 165 */ 166 if (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)) { 167 int color_bit = ffs(mask & BUFFER_BITS_COLOR); 168 if (color_bit != 0) { 169 tri_mask |= blit_mask & (1 << (color_bit - 1)); 170 blit_mask &= ~(1 << (color_bit - 1)); 171 } 172 } 173 174 /* Anything left, just use tris */ 175 tri_mask |= mask & ~blit_mask; 176 177 if (blit_mask) { 178 debug_mask("blit", blit_mask); 179 tri_mask |= intelClearWithBlit(ctx, blit_mask); 180 } 181 182 if (tri_mask) { 183 debug_mask("tri", tri_mask); 184 if (ctx->API == API_OPENGLES || !ctx->Extensions.ARB_fragment_shader) 185 _mesa_meta_Clear(&intel->ctx, tri_mask); 186 else 187 _mesa_meta_glsl_Clear(&intel->ctx, tri_mask); 188 } 189 } 190 191 192 void 193 intelInitClearFuncs(struct dd_function_table *functions) 194 { 195 functions->Clear = intelClear; 196 } 197