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  /toolchain/binutils/binutils-2.27/ld/testsuite/ld-sh/sh64/
relfail.s 9 .global to2
10 to2: label
  /external/llvm/test/MC/X86/
x86-64-avx512dq_vl.s 23 // CHECK: vpmullq (%rcx){1to2}, %xmm17, %xmm26
25 vpmullq (%rcx){1to2}, %xmm17, %xmm26
43 // CHECK: vpmullq 1016(%rdx){1to2}, %xmm17, %xmm26
45 vpmullq 1016(%rdx){1to2}, %xmm17, %xmm26
47 // CHECK: vpmullq 1024(%rdx){1to2}, %xmm17, %xmm26
49 vpmullq 1024(%rdx){1to2}, %xmm17, %xmm26
51 // CHECK: vpmullq -1024(%rdx){1to2}, %xmm17, %xmm26
53 vpmullq -1024(%rdx){1to2}, %xmm17, %xmm26
55 // CHECK: vpmullq -1032(%rdx){1to2}, %xmm17, %xmm26
57 vpmullq -1032(%rdx){1to2}, %xmm17, %xmm2
    [all...]
avx512ifmavl-encoding.s 39 vpmadd52luq (%rcx){1to2}, %xmm29, %xmm30
40 //CHECK: vpmadd52luq (%rcx){1to2}, %xmm29, %xmm30
59 vpmadd52luq 0x3f8(%rdx){1to2}, %xmm29, %xmm30
60 //CHECK: vpmadd52luq 1016(%rdx){1to2}, %xmm29, %xmm30
63 vpmadd52luq 0x400(%rdx){1to2}, %xmm29, %xmm30
64 //CHECK: vpmadd52luq 1024(%rdx){1to2}, %xmm29, %xmm30
67 vpmadd52luq -0x400(%rdx){1to2}, %xmm29, %xmm30
68 //CHECK: vpmadd52luq -1024(%rdx){1to2}, %xmm29, %xmm30
71 vpmadd52luq -0x408(%rdx){1to2}, %xmm29, %xmm30
72 //CHECK: vpmadd52luq -1032(%rdx){1to2}, %xmm29, %xmm3
    [all...]
x86-64-avx512cd_vl.s 23 // CHECK: vplzcntq (%rcx){1to2}, %xmm18
25 vplzcntq (%rcx){1to2}, %xmm18
43 // CHECK: vplzcntq 1016(%rdx){1to2}, %xmm18
45 vplzcntq 1016(%rdx){1to2}, %xmm18
47 // CHECK: vplzcntq 1024(%rdx){1to2}, %xmm18
49 vplzcntq 1024(%rdx){1to2}, %xmm18
51 // CHECK: vplzcntq -1024(%rdx){1to2}, %xmm18
53 vplzcntq -1024(%rdx){1to2}, %xmm18
55 // CHECK: vplzcntq -1032(%rdx){1to2}, %xmm18
57 vplzcntq -1032(%rdx){1to2}, %xmm1
    [all...]
x86-64-avx512f_vl.s 23 // CHECK: vaddpd (%rcx){1to2}, %xmm29, %xmm20
25 vaddpd (%rcx){1to2}, %xmm29, %xmm20
43 // CHECK: vaddpd 1016(%rdx){1to2}, %xmm29, %xmm20
45 vaddpd 1016(%rdx){1to2}, %xmm29, %xmm20
47 // CHECK: vaddpd 1024(%rdx){1to2}, %xmm29, %xmm20
49 vaddpd 1024(%rdx){1to2}, %xmm29, %xmm20
51 // CHECK: vaddpd -1024(%rdx){1to2}, %xmm29, %xmm20
53 vaddpd -1024(%rdx){1to2}, %xmm29, %xmm20
55 // CHECK: vaddpd -1032(%rdx){1to2}, %xmm29, %xmm20
57 vaddpd -1032(%rdx){1to2}, %xmm29, %xmm2
    [all...]
avx512vl-encoding.s 23 // CHECK: vblendmpd (%rcx){1to2}, %xmm20, %xmm27
25 vblendmpd (%rcx){1to2}, %xmm20, %xmm27
43 // CHECK: vblendmpd 1016(%rdx){1to2}, %xmm20, %xmm27
45 vblendmpd 1016(%rdx){1to2}, %xmm20, %xmm27
47 // CHECK: vblendmpd 1024(%rdx){1to2}, %xmm20, %xmm27
49 vblendmpd 1024(%rdx){1to2}, %xmm20, %xmm27
51 // CHECK: vblendmpd -1024(%rdx){1to2}, %xmm20, %xmm27
53 vblendmpd -1024(%rdx){1to2}, %xmm20, %xmm27
55 // CHECK: vblendmpd -1032(%rdx){1to2}, %xmm20, %xmm27
57 vblendmpd -1032(%rdx){1to2}, %xmm20, %xmm2
    [all...]
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/
avx512ifma_vl.s 10 vpmadd52luq (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL}
15 vpmadd52luq 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8
16 vpmadd52luq 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL}
17 vpmadd52luq -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8
18 vpmadd52luq -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL}
36 vpmadd52huq (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL}
41 vpmadd52huq 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8
42 vpmadd52huq 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL}
43 vpmadd52huq -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8
44 vpmadd52huq -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL
    [all...]
x86-64-avx512ifma_vl.s 11 vpmadd52luq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL}
16 vpmadd52luq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8
17 vpmadd52luq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL}
18 vpmadd52luq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8
19 vpmadd52luq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL}
39 vpmadd52huq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL}
44 vpmadd52huq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8
45 vpmadd52huq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL}
46 vpmadd52huq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8
47 vpmadd52huq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL
    [all...]
x86-64-avx512ifma_vl-intel.d 17 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 31[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rcx\]\{1to2\}
22 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 7f[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx\+0x3f8\]\{1to2\}
23 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 00 04 00 00[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx\+0x400\]\{1to2\}
24 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 80[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx-0x400\]\{1to2\}
25 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 f8 fb ff ff[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx-0x408\]\{1to2\}
45 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 31[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rcx\]\{1to2\}
50 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 7f[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx\+0x3f8\]\{1to2\}
51 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 00 04 00 00[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx\+0x400\]\{1to2\}
52 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 80[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx-0x400\]\{1to2\}
53 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 f8 fb ff ff[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx-0x408\]\{1to2\}
    [all...]
x86-64-avx512ifma_vl.d 17 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 31[ ]*vpmadd52luq \(%rcx\)\{1to2\},%xmm29,%xmm30
22 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 7f[ ]*vpmadd52luq 0x3f8\(%rdx\)\{1to2\},%xmm29,%xmm30
23 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%rdx\)\{1to2\},%xmm29,%xmm30
24 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 80[ ]*vpmadd52luq -0x400\(%rdx\)\{1to2\},%xmm29,%xmm30
25 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%rdx\)\{1to2\},%xmm29,%xmm30
45 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 31[ ]*vpmadd52huq \(%rcx\)\{1to2\},%xmm29,%xmm30
50 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 7f[ ]*vpmadd52huq 0x3f8\(%rdx\)\{1to2\},%xmm29,%xmm30
51 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%rdx\)\{1to2\},%xmm29,%xmm30
52 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 80[ ]*vpmadd52huq -0x400\(%rdx\)\{1to2\},%xmm29,%xmm30
53 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%rdx\)\{1to2\},%xmm29,%xmm3
    [all...]
avx512dq_vl.s 32 vcvtpd2qq (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
37 vcvtpd2qq 1016(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
38 vcvtpd2qq 1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
39 vcvtpd2qq -1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
40 vcvtpd2qq -1032(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
58 vcvtpd2uqq (%eax){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
63 vcvtpd2uqq 1016(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
64 vcvtpd2uqq 1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL}
65 vcvtpd2uqq -1024(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL} Disp8
66 vcvtpd2uqq -1032(%edx){1to2}, %xmm6{%k7} # AVX512{DQ,VL
    [all...]
x86-64-avx512dq_vl.s 36 vcvtpd2qq (%rcx){1to2}, %xmm30 # AVX512{DQ,VL}
41 vcvtpd2qq 1016(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8
42 vcvtpd2qq 1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL}
43 vcvtpd2qq -1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8
44 vcvtpd2qq -1032(%rdx){1to2}, %xmm30 # AVX512{DQ,VL}
64 vcvtpd2uqq (%rcx){1to2}, %xmm30 # AVX512{DQ,VL}
69 vcvtpd2uqq 1016(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8
70 vcvtpd2uqq 1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL}
71 vcvtpd2uqq -1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8
72 vcvtpd2uqq -1032(%rdx){1to2}, %xmm30 # AVX512{DQ,VL
    [all...]
avx512ifma_vl-intel.d 16 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 30[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[eax\]\{1to2\}
21 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 7f[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x3f8\]\{1to2\}
22 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 00 04 00 00[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x400\]\{1to2\}
23 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 80[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x400\]\{1to2\}
24 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 f8 fb ff ff[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x408\]\{1to2\}
42 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 30[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[eax\]\{1to2\}
47 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 7f[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x3f8\]\{1to2\}
48 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 00 04 00 00[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x400\]\{1to2\}
49 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 80[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x400\]\{1to2\}
50 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 f8 fb ff ff[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x408\]\{1to2\}
    [all...]
avx512ifma_vl.d 16 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 30[ ]*vpmadd52luq \(%eax\)\{1to2\},%xmm5,%xmm6\{%k7\}
21 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 7f[ ]*vpmadd52luq 0x3f8\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\}
22 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\}
23 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 80[ ]*vpmadd52luq -0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\}
24 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\}
42 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 30[ ]*vpmadd52huq \(%eax\)\{1to2\},%xmm5,%xmm6\{%k7\}
47 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 7f[ ]*vpmadd52huq 0x3f8\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\}
48 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\}
49 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 80[ ]*vpmadd52huq -0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\}
50 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\
    [all...]
avx512cd_vl.s 36 vpconflictq (%eax){1to2}, %xmm6{%k7} # AVX512{CD,VL}
41 vpconflictq 1016(%edx){1to2}, %xmm6{%k7} # AVX512{CD,VL} Disp8
42 vpconflictq 1024(%edx){1to2}, %xmm6{%k7} # AVX512{CD,VL}
43 vpconflictq -1024(%edx){1to2}, %xmm6{%k7} # AVX512{CD,VL} Disp8
44 vpconflictq -1032(%edx){1to2}, %xmm6{%k7} # AVX512{CD,VL}
88 vplzcntq (%eax){1to2}, %xmm6{%k7} # AVX512{CD,VL}
93 vplzcntq 1016(%edx){1to2}, %xmm6{%k7} # AVX512{CD,VL} Disp8
94 vplzcntq 1024(%edx){1to2}, %xmm6{%k7} # AVX512{CD,VL}
95 vplzcntq -1024(%edx){1to2}, %xmm6{%k7} # AVX512{CD,VL} Disp8
96 vplzcntq -1032(%edx){1to2}, %xmm6{%k7} # AVX512{CD,VL
    [all...]
x86-64-avx512cd_vl.s 39 vpconflictq (%rcx){1to2}, %xmm30 # AVX512{CD,VL}
44 vpconflictq 1016(%rdx){1to2}, %xmm30 # AVX512{CD,VL} Disp8
45 vpconflictq 1024(%rdx){1to2}, %xmm30 # AVX512{CD,VL}
46 vpconflictq -1024(%rdx){1to2}, %xmm30 # AVX512{CD,VL} Disp8
47 vpconflictq -1032(%rdx){1to2}, %xmm30 # AVX512{CD,VL}
95 vplzcntq (%rcx){1to2}, %xmm30 # AVX512{CD,VL}
100 vplzcntq 1016(%rdx){1to2}, %xmm30 # AVX512{CD,VL} Disp8
101 vplzcntq 1024(%rdx){1to2}, %xmm30 # AVX512{CD,VL}
102 vplzcntq -1024(%rdx){1to2}, %xmm30 # AVX512{CD,VL} Disp8
103 vplzcntq -1032(%rdx){1to2}, %xmm30 # AVX512{CD,VL
    [all...]
avx512dq_vl.d 38 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 7b 30[ ]*vcvtpd2qq \(%eax\)\{1to2\},%xmm6\{%k7\}
43 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 7b 72 7f[ ]*vcvtpd2qq 0x3f8\(%edx\)\{1to2\},%xmm6\{%k7\}
44 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 7b b2 00 04 00 00[ ]*vcvtpd2qq 0x400\(%edx\)\{1to2\},%xmm6\{%k7\}
45 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 7b 72 80[ ]*vcvtpd2qq -0x400\(%edx\)\{1to2\},%xmm6\{%k7\}
46 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 7b b2 f8 fb ff ff[ ]*vcvtpd2qq -0x408\(%edx\)\{1to2\},%xmm6\{%k7\}
64 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 79 30[ ]*vcvtpd2uqq \(%eax\)\{1to2\},%xmm6\{%k7\}
69 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 79 72 7f[ ]*vcvtpd2uqq 0x3f8\(%edx\)\{1to2\},%xmm6\{%k7\}
70 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 79 b2 00 04 00 00[ ]*vcvtpd2uqq 0x400\(%edx\)\{1to2\},%xmm6\{%k7\}
71 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 79 72 80[ ]*vcvtpd2uqq -0x400\(%edx\)\{1to2\},%xmm6\{%k7\}
72 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 79 b2 f8 fb ff ff[ ]*vcvtpd2uqq -0x408\(%edx\)\{1to2\},%xmm6\{%k7\
    [all...]
x86-64-avx512dq_vl-intel.d 42 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 7b 31[ ]*vcvtpd2qq xmm30,QWORD PTR \[rcx\]\{1to2\}
47 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 7b 72 7f[ ]*vcvtpd2qq xmm30,QWORD PTR \[rdx\+0x3f8\]\{1to2\}
48 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 7b b2 00 04 00 00[ ]*vcvtpd2qq xmm30,QWORD PTR \[rdx\+0x400\]\{1to2\}
49 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 7b 72 80[ ]*vcvtpd2qq xmm30,QWORD PTR \[rdx-0x400\]\{1to2\}
50 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 7b b2 f8 fb ff ff[ ]*vcvtpd2qq xmm30,QWORD PTR \[rdx-0x408\]\{1to2\}
70 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 79 31[ ]*vcvtpd2uqq xmm30,QWORD PTR \[rcx\]\{1to2\}
75 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 79 72 7f[ ]*vcvtpd2uqq xmm30,QWORD PTR \[rdx\+0x3f8\]\{1to2\}
76 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 79 b2 00 04 00 00[ ]*vcvtpd2uqq xmm30,QWORD PTR \[rdx\+0x400\]\{1to2\}
77 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 79 72 80[ ]*vcvtpd2uqq xmm30,QWORD PTR \[rdx-0x400\]\{1to2\}
78 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 79 b2 f8 fb ff ff[ ]*vcvtpd2uqq xmm30,QWORD PTR \[rdx-0x408\]\{1to2\}
    [all...]
x86-64-avx512dq_vl.d 42 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 7b 31[ ]*vcvtpd2qq \(%rcx\)\{1to2\},%xmm30
47 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 7b 72 7f[ ]*vcvtpd2qq 0x3f8\(%rdx\)\{1to2\},%xmm30
48 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 7b b2 00 04 00 00[ ]*vcvtpd2qq 0x400\(%rdx\)\{1to2\},%xmm30
49 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 7b 72 80[ ]*vcvtpd2qq -0x400\(%rdx\)\{1to2\},%xmm30
50 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 7b b2 f8 fb ff ff[ ]*vcvtpd2qq -0x408\(%rdx\)\{1to2\},%xmm30
70 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 79 31[ ]*vcvtpd2uqq \(%rcx\)\{1to2\},%xmm30
75 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 79 72 7f[ ]*vcvtpd2uqq 0x3f8\(%rdx\)\{1to2\},%xmm30
76 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 79 b2 00 04 00 00[ ]*vcvtpd2uqq 0x400\(%rdx\)\{1to2\},%xmm30
77 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 79 72 80[ ]*vcvtpd2uqq -0x400\(%rdx\)\{1to2\},%xmm30
78 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 79 b2 f8 fb ff ff[ ]*vcvtpd2uqq -0x408\(%rdx\)\{1to2\},%xmm3
    [all...]
x86-64-avx512f_vl.s 11 vaddpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
16 vaddpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
17 vaddpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
18 vaddpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
19 vaddpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
97 vblendmpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
102 vblendmpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
103 vblendmpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
104 vblendmpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
105 vblendmpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL
    [all...]
avx512f_vl.s 10 vaddpd (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{F,VL}
15 vaddpd 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{F,VL} Disp8
16 vaddpd 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{F,VL}
17 vaddpd -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{F,VL} Disp8
18 vaddpd -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{F,VL}
90 vblendmpd (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{F,VL}
95 vblendmpd 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{F,VL} Disp8
96 vblendmpd 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{F,VL}
97 vblendmpd -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{F,VL} Disp8
98 vblendmpd -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{F,VL
    [all...]
x86-64-avx512cd_vl-intel.d 45 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 c4 31[ ]*vpconflictq xmm30,QWORD PTR \[rcx\]\{1to2\}
50 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 c4 72 7f[ ]*vpconflictq xmm30,QWORD PTR \[rdx\+0x3f8\]\{1to2\}
51 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 c4 b2 00 04 00 00[ ]*vpconflictq xmm30,QWORD PTR \[rdx\+0x400\]\{1to2\}
52 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 c4 72 80[ ]*vpconflictq xmm30,QWORD PTR \[rdx-0x400\]\{1to2\}
53 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 c4 b2 f8 fb ff ff[ ]*vpconflictq xmm30,QWORD PTR \[rdx-0x408\]\{1to2\}
101 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 44 31[ ]*vplzcntq xmm30,QWORD PTR \[rcx\]\{1to2\}
106 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 44 72 7f[ ]*vplzcntq xmm30,QWORD PTR \[rdx\+0x3f8\]\{1to2\}
107 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 44 b2 00 04 00 00[ ]*vplzcntq xmm30,QWORD PTR \[rdx\+0x400\]\{1to2\}
108 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 44 72 80[ ]*vplzcntq xmm30,QWORD PTR \[rdx-0x400\]\{1to2\}
109 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 44 b2 f8 fb ff ff[ ]*vplzcntq xmm30,QWORD PTR \[rdx-0x408\]\{1to2\}
    [all...]
x86-64-avx512cd_vl.d 45 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 c4 31[ ]*vpconflictq \(%rcx\)\{1to2\},%xmm30
50 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 c4 72 7f[ ]*vpconflictq 0x3f8\(%rdx\)\{1to2\},%xmm30
51 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 c4 b2 00 04 00 00[ ]*vpconflictq 0x400\(%rdx\)\{1to2\},%xmm30
52 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 c4 72 80[ ]*vpconflictq -0x400\(%rdx\)\{1to2\},%xmm30
53 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 c4 b2 f8 fb ff ff[ ]*vpconflictq -0x408\(%rdx\)\{1to2\},%xmm30
101 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 44 31[ ]*vplzcntq \(%rcx\)\{1to2\},%xmm30
106 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 44 72 7f[ ]*vplzcntq 0x3f8\(%rdx\)\{1to2\},%xmm30
107 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 44 b2 00 04 00 00[ ]*vplzcntq 0x400\(%rdx\)\{1to2\},%xmm30
108 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 44 72 80[ ]*vplzcntq -0x400\(%rdx\)\{1to2\},%xmm30
109 [ ]*[a-f0-9]+:[ ]*62 62 fd 18 44 b2 f8 fb ff ff[ ]*vplzcntq -0x408\(%rdx\)\{1to2\},%xmm3
    [all...]
avx512dq_vl-intel.d 38 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 7b 30[ ]*vcvtpd2qq xmm6\{k7\},QWORD PTR \[eax\]\{1to2\}
43 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 7b 72 7f[ ]*vcvtpd2qq xmm6\{k7\},QWORD PTR \[edx\+0x3f8\]\{1to2\}
44 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 7b b2 00 04 00 00[ ]*vcvtpd2qq xmm6\{k7\},QWORD PTR \[edx\+0x400\]\{1to2\}
45 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 7b 72 80[ ]*vcvtpd2qq xmm6\{k7\},QWORD PTR \[edx-0x400\]\{1to2\}
46 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 7b b2 f8 fb ff ff[ ]*vcvtpd2qq xmm6\{k7\},QWORD PTR \[edx-0x408\]\{1to2\}
64 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 79 30[ ]*vcvtpd2uqq xmm6\{k7\},QWORD PTR \[eax\]\{1to2\}
69 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 79 72 7f[ ]*vcvtpd2uqq xmm6\{k7\},QWORD PTR \[edx\+0x3f8\]\{1to2\}
70 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 79 b2 00 04 00 00[ ]*vcvtpd2uqq xmm6\{k7\},QWORD PTR \[edx\+0x400\]\{1to2\}
71 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 79 72 80[ ]*vcvtpd2uqq xmm6\{k7\},QWORD PTR \[edx-0x400\]\{1to2\}
72 [ ]*[a-f0-9]+:[ ]*62 f1 fd 1f 79 b2 f8 fb ff ff[ ]*vcvtpd2uqq xmm6\{k7\},QWORD PTR \[edx-0x408\]\{1to2\}
    [all...]
x86-64-avx512f_vl.d 17 [ ]*[a-f0-9]+:[ ]*62 61 95 10 58 31[ ]*vaddpd \(%rcx\)\{1to2\},%xmm29,%xmm30
22 [ ]*[a-f0-9]+:[ ]*62 61 95 10 58 72 7f[ ]*vaddpd 0x3f8\(%rdx\)\{1to2\},%xmm29,%xmm30
23 [ ]*[a-f0-9]+:[ ]*62 61 95 10 58 b2 00 04 00 00[ ]*vaddpd 0x400\(%rdx\)\{1to2\},%xmm29,%xmm30
24 [ ]*[a-f0-9]+:[ ]*62 61 95 10 58 72 80[ ]*vaddpd -0x400\(%rdx\)\{1to2\},%xmm29,%xmm30
25 [ ]*[a-f0-9]+:[ ]*62 61 95 10 58 b2 f8 fb ff ff[ ]*vaddpd -0x408\(%rdx\)\{1to2\},%xmm29,%xmm30
103 [ ]*[a-f0-9]+:[ ]*62 62 95 10 65 31[ ]*vblendmpd \(%rcx\)\{1to2\},%xmm29,%xmm30
108 [ ]*[a-f0-9]+:[ ]*62 62 95 10 65 72 7f[ ]*vblendmpd 0x3f8\(%rdx\)\{1to2\},%xmm29,%xmm30
109 [ ]*[a-f0-9]+:[ ]*62 62 95 10 65 b2 00 04 00 00[ ]*vblendmpd 0x400\(%rdx\)\{1to2\},%xmm29,%xmm30
110 [ ]*[a-f0-9]+:[ ]*62 62 95 10 65 72 80[ ]*vblendmpd -0x400\(%rdx\)\{1to2\},%xmm29,%xmm30
111 [ ]*[a-f0-9]+:[ ]*62 62 95 10 65 b2 f8 fb ff ff[ ]*vblendmpd -0x408\(%rdx\)\{1to2\},%xmm29,%xmm3
    [all...]

Completed in 363 milliseconds

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