| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfUnit.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| MachineBlockPlacement.cpp | 62 static cl::opt<unsigned> AlignAllBlock("align-all-blocks",
68 "align-all-nofallthru-blocks",
[all...] |
| /external/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| RuntimeDyld.cpp | 478 uint32_t Align = I->getAlignment();
482 CommonAlign = Align;
483 CommonSize = alignTo(CommonSize, Align) + Size;
594 uint32_t Align = Sym.getAlignment();
597 CommonSize = alignTo(CommonSize, Align) + Size;
618 uint32_t Align = Sym.getAlignment();
625 if (Align) {
627 uint64_t AlignOffset = OffsetToAlignment((uint64_t)Addr, Align);
[all...] |
| /external/llvm/lib/IR/ |
| AutoUpgrade.cpp | 513 // If the mask is all ones just emit the align operation.
554 Value *Align = Builder.CreateShuffleVector(Op1, Op0,
558 return EmitX86Select(Builder, Mask, Align, Passthru);
567 unsigned Align =
573 return Builder.CreateAlignedStore(Data, Ptr, Align);
578 return Builder.CreateMaskedStore(Data, Ptr, Align, Mask);
587 unsigned Align =
593 return Builder.CreateAlignedLoad(Ptr, Align);
598 return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru);
[all...] |
| /external/llvm/lib/MC/ |
| MCDwarf.cpp | 611 // Align the header with the padding if needed, before we put out the table.
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIInstrInfo.cpp | 582 unsigned Align = FrameInfo->getObjectAlignment(FrameIndex);
587 Size, Align);
678 unsigned Align = FrameInfo->getObjectAlignment(FrameIndex);
685 PtrInfo, MachineMemOperand::MOLoad, Size, Align);
[all...] |
| /external/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 621 unsigned Align = Flags.getByValAlign();
623 int FI = MFI->CreateStackObject(Size, Align, false);
627 Chain = DAG.getMemcpy(Chain, DL, FIPtr, Arg, SizeNode, Align,
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsConstantIslandPass.cpp | 58 AlignConstantIslands("mips-align-constant-islands", cl::Hidden, cl::init(true),
59 cl::desc("Align constant islands in code"));
558 unsigned Align = CPs[i].getAlignment();
559 assert(isPowerOf2_32(Align) && "Invalid alignment");
562 assert((Size % Align) == 0 && "CP Entry not multiple of 4 bytes!");
565 unsigned LogAlign = Log2_32(Align);
583 << Size << ", align = " << Align <<'\n');
632 unsigned Align = MCP->getConstants()[CPI].getAlignment();
633 assert(isPowerOf2_32(Align) && "Invalid CPE alignment")
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| MemCpyOptimizer.cpp | 629 unsigned Align = findCommonAlignment(DL, SI, LI);
637 Align, SI->isVolatile());
641 Align, SI->isVolatile());
726 unsigned Align = SI->getAlignment();
727 if (!Align)
728 Align = DL.getABITypeAlignment(T);
731 Size, Align, SI->isVolatile());
[all...] |
| /external/llvm/lib/Transforms/Vectorize/ |
| LoadStoreVectorizer.cpp | 74 unsigned Align = LI->getAlignment();
75 if (Align != 0)
76 return Align;
82 unsigned Align = SI->getAlignment();
83 if (Align != 0)
84 return Align;
[all...] |
| /external/lzma/C/ |
| LzmaDec.c | 111 #define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
112 #define LenCoder (Align + kAlignTableSize)
416 prob = probs + Align;
749 prob = probs + Align;
|
| /external/skia/include/core/ |
| SkPaint.h | [all...] |
| /external/skqp/include/core/ |
| SkPaint.h | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Analysis/ |
| ValueTracking.cpp | 104 unsigned Align = GV->getAlignment();
105 if (Align == 0 && TD && GV->getType()->getElementType()->isSized()) {
111 Align = TD->getPrefTypeAlignment(ObjectType);
113 Align = TD->getABITypeAlignment(ObjectType);
115 if (Align > 0)
117 CountTrailingZeros_32(Align));
138 if (unsigned Align = A->getParamAlignment())
140 CountTrailingZeros_32(Align));
541 unsigned Align = AI->getAlignment();
542 if (Align == 0 && TD
[all...] |
| /external/swiftshader/third_party/LLVM/lib/ExecutionEngine/JIT/ |
| JITEmitter.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | 614 // FIXME: Constant island pass should insert an "ALIGN" instruction
710 unsigned Align = MFI.getObjectAlignment(FI);
717 Align);
742 if (Align >= 16 && getRegisterInfo().needsStackRealignment(MF)) {
758 if (Align >= 16 && getRegisterInfo().canRealignStack(MF)) {
862 unsigned Align = MFI.getObjectAlignment(FI);
868 Align);
891 if (Align >= 16 && getRegisterInfo().needsStackRealignment(MF)) {
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 383 unsigned Align = Flags.getByValAlign();
385 int FI = MFI->CreateStackObject(Size, Align, false);
389 Chain = DAG.getMemcpy(Chain, dl, FIPtr, Arg, SizeNode, Align,
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/ |
| InlineFunction.cpp | 761 unsigned Align = 1;
763 Align = IFI.TD->getPrefTypeAlignment(AggTy);
768 Align = std::max(Align, ByValAlignment);
772 Value *NewAlloca = new AllocaInst(AggTy, 0, Align, Arg->getName(),
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceAssemblerX86BaseImpl.h | 46 const SizeT Align = 1 << getBundleAlignLog2Bytes();
47 SizeT BytesNeeded = Utils::OffsetToAlignment(Buffer.getPosition(), Align);
3827 void AssemblerX86Base<TraitsType>::align(intptr_t alignment, intptr_t offset) { function in class:Ice::X86NAMESPACE::AssemblerX86Base
[all...] |
| IceTargetLowering.cpp | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/Support/ |
| AMDGPUCodeObjectMetadata.h | 156 constexpr char Align[] = "Align";
|
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/Support/ |
| AMDGPUCodeObjectMetadata.h | 156 constexpr char Align[] = "Align";
|
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/Support/ |
| AMDGPUMetadata.h | 161 constexpr char Align[] = "Align";
|
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/Support/ |
| AMDGPUMetadata.h | 161 constexpr char Align[] = "Align";
|
