| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/GlobalISel/ |
| MachineIRBuilder.h | 50 MachineBasicBlock *MBB;
72 assert(MBB && "MachineBasicBlock is not set");
73 return *MBB;
82 /// \pre MBB must be in getMF().
83 /// \pre II must be a valid iterator in MBB.
84 void setInsertPt(MachineBasicBlock &MBB, MachineBasicBlock::iterator II);
92 /// Set the insertion point to the end of \p MBB.
93 /// \pre \p MBB must be contained by getMF().
94 void setMBB(MachineBasicBlock &MBB);
|
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/CodeGen/GlobalISel/ |
| MachineIRBuilder.h | 50 MachineBasicBlock *MBB;
72 assert(MBB && "MachineBasicBlock is not set");
73 return *MBB;
82 /// \pre MBB must be in getMF().
83 /// \pre II must be a valid iterator in MBB.
84 void setInsertPt(MachineBasicBlock &MBB, MachineBasicBlock::iterator II);
92 /// Set the insertion point to the end of \p MBB.
93 /// \pre \p MBB must be contained by getMF().
94 void setMBB(MachineBasicBlock &MBB);
|
| /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/CodeGen/GlobalISel/ |
| MachineIRBuilder.h | 50 MachineBasicBlock *MBB;
72 assert(MBB && "MachineBasicBlock is not set");
73 return *MBB;
82 /// \pre MBB must be in getMF().
83 /// \pre II must be a valid iterator in MBB.
84 void setInsertPt(MachineBasicBlock &MBB, MachineBasicBlock::iterator II);
92 /// Set the insertion point to the end of \p MBB.
93 /// \pre \p MBB must be contained by getMF().
94 void setMBB(MachineBasicBlock &MBB);
|
| /external/llvm/lib/CodeGen/ |
| ExpandPostRAPseudos.cpp | 81 MachineBasicBlock *MBB = MI->getParent();
122 TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,
133 MBB->erase(MI);
|
| /external/llvm/lib/CodeGen/GlobalISel/ |
| IRTranslator.cpp | 55 MachineBasicBlock *&MBB = BBToMBB[&BB];
56 if (!MBB) {
58 MBB = MF.CreateMachineBasicBlock();
59 MF.push_back(MBB);
61 return *MBB;
135 MachineBasicBlock &MBB = getOrCreateBB(F.front());
136 MIRBuilder.setMBB(MBB);
146 MachineBasicBlock &MBB = getOrCreateBB(BB);
149 MIRBuilder.setMBB(MBB);
|
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUMCInstLower.cpp | 110 const MachineBasicBlock *MBB = MI->getParent();
112 while (I != MBB->instr_end() && I->isInsideBundle()) {
124 const MachineBasicBlock *MBB = MI->getOperand(0).getMBB();
126 = MCSymbolRefExpr::create(MBB->getSymbol(), OutContext);
|
| SILowerI1Copies.cpp | 78 MachineBasicBlock &MBB = *BI;
80 for (I = MBB.begin(); I != MBB.end(); I = Next) {
118 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_MOV_B32_e32))
126 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_CNDMASK_B32_e64))
134 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(AMDGPU::V_CMP_NE_I32_e64))
|
| /external/llvm/lib/Target/ARM/ |
| Thumb2InstrInfo.cpp | 51 MachineBasicBlock *MBB = Tail->getParent();
52 ARMFunctionInfo *AFI = MBB->getParent()->getInfo<ARMFunctionInfo>();
72 MachineBasicBlock::iterator E = MBB->begin();
100 Thumb2InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB,
104 if (MBBI == MBB.end())
112 void Thumb2InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
118 return ARMBaseInstrInfo::copyPhysReg(MBB, I, DL, DestReg, SrcReg, KillSrc);
120 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
125 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
130 if (I != MBB.end()) DL = I->getDebugLoc()
[all...] |
| /external/llvm/lib/Target/AVR/ |
| AVRRegisterInfo.cpp | 128 MachineBasicBlock &MBB = *MI.getParent();
129 const MachineFunction &MF = *MBB.getParent();
185 MachineInstr *New = BuildMI(MBB, std::next(II), dl, TII.get(Opcode), DstReg)
211 BuildMI(MBB, II, dl, TII.get(AVR::INRdA), AVR::R0).addImm(0x3f);
213 MachineInstr *New = BuildMI(MBB, II, dl, TII.get(AddOpc), AVR::R29R28)
219 BuildMI(MBB, std::next(II), dl, TII.get(AVR::OUTARr))
225 New = BuildMI(MBB, std::next(II), dl, TII.get(SubOpc), AVR::R29R28)
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonCFGOptimizer.cpp | 109 MachineBasicBlock *MBB = &*MBBb;
112 MachineBasicBlock::iterator MII = MBB->getFirstTerminator();
113 if (MII != MBB->end()) {
147 unsigned NumSuccs = MBB->succ_size();
148 MachineBasicBlock::succ_iterator SI = MBB->succ_begin();
154 if (MBB->isLayoutSuccessor(FirstSucc)) {
157 } else if (MBB->isLayoutSuccessor(SecondSucc)) {
194 MBB->replaceSuccessor(JumpAroundTarget, UncondTarget);
|
| HexagonFixupHwLoops.cpp | 117 for (const MachineBasicBlock &MBB : MF) {
118 if (MBB.getAlignment()) {
122 int ByteAlign = (1u << MBB.getAlignment()) - 1;
126 BlockToInstOffset[&MBB] = InstOffset;
127 for (const MachineInstr &MI : MBB)
134 for (MachineBasicBlock &MBB : MF) {
135 InstOffset = BlockToInstOffset[&MBB];
138 MachineBasicBlock::iterator MII = MBB.begin();
139 MachineBasicBlock::iterator MIE = MBB.end();
152 MII = MBB.erase(MII)
[all...] |
| HexagonSplitConst32AndConst64.cpp | 84 MachineBasicBlock *MBB = &*MBBb;
86 MachineBasicBlock::iterator MII = MBB->begin();
87 MachineBasicBlock::iterator MIE = MBB->end ();
96 BuildMI(*MBB, MII, MI.getDebugLoc(), TII->get(Hexagon::LO), DestReg)
98 BuildMI(*MBB, MII, MI.getDebugLoc(), TII->get(Hexagon::HI), DestReg)
100 // MBB->erase returns the iterator to the next instruction, which is the
102 MII = MBB->erase(&MI);
120 BuildMI(*MBB, MII, MI.getDebugLoc(), TII->get(Hexagon::A2_tfrsi),
123 MII = MBB->erase(&MI);
146 BuildMI(*MBB, MII, MI.getDebugLoc(), TII->get(Hexagon::A2_tfrsi)
[all...] |
| /external/llvm/lib/Target/Lanai/ |
| LanaiDelaySlotFiller.cpp | 47 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
76 bool findDelayInstr(MachineBasicBlock &MBB,
92 bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
94 LastFiller = MBB.instr_end();
96 for (MachineBasicBlock::instr_iterator I = MBB.instr_begin();
97 I != MBB.instr_end(); ++I) {
122 MBB.splice(std::next(I), &MBB, FI, I);
125 if (!NopDelaySlotFiller && findDelayInstr(MBB, I, J)) {
126 MBB.splice(std::next(I), &MBB, J)
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.cpp | 110 MachineBasicBlock &MBB = *MI.getParent();
111 MachineFunction &MF = *MBB.getParent();
145 BuildMI(MBB, std::next(II), dl, TII.get(MSP430::SUB16ri), DstReg)
148 BuildMI(MBB, std::next(II), dl, TII.get(MSP430::ADD16ri), DstReg)
|
| /external/llvm/lib/Target/Mips/ |
| Mips16RegisterInfo.cpp | 58 (MachineBasicBlock &MBB,
64 const TargetInstrInfo &TII = *MBB.getParent()->getSubtarget().getInstrInfo();
65 TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true);
66 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
135 MachineBasicBlock &MBB = *MI.getParent();
140 FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCBranchSelector.cpp | 79 [TII](MachineBasicBlock &MBB, unsigned Offset) -> unsigned {
80 unsigned Align = MBB.getAlignment();
85 unsigned ParentAlign = MBB.getParent()->getAlignment();
90 // The alignment of this MBB is larger than the function's alignment, so we
95 // Measure each MBB and compute a size for the entire function.
99 MachineBasicBlock *MBB = &*MFI;
103 if (MBB->getNumber() > 0) {
104 unsigned AlignExtra = GetAlignmentAdjustment(*MBB, FuncSize);
105 BlockSizes[MBB->getNumber()-1] += AlignExtra;
110 for (MachineInstr &MI : *MBB)
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.cpp | 71 MachineBasicBlock &MBB = *MI->getParent();
72 MachineFunction &MF = *MBB.getParent();
123 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
131 BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg)
136 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
137 BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg)
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyRegisterInfo.cpp | 60 MachineBasicBlock &MBB = *MI.getParent();
61 MachineFunction &MF = *MBB.getParent();
113 BuildMI(MBB, *II, II->getDebugLoc(), TII->get(WebAssembly::CONST_I32),
117 BuildMI(MBB, *II, II->getDebugLoc(), TII->get(WebAssembly::ADD_I32),
|
| /external/llvm/lib/Target/X86/ |
| X86PadShortFunction.cpp | 68 void findReturns(MachineBasicBlock *MBB,
71 bool cyclesUntilReturn(MachineBasicBlock *MBB,
74 void addPadding(MachineBasicBlock *MBB,
121 MachineBasicBlock *MBB;
127 MBB = I->first;
133 assert(MBB->size() > 0 &&
135 MachineBasicBlock::iterator ReturnLoc = --MBB->end();
142 addPadding(MBB, ReturnLoc, Threshold - Cycles);
151 /// findReturn - Starting at MBB, follow control flow and add all
153 void PadShortFunc::findReturns(MachineBasicBlock *MBB, unsigned int Cycles)
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| RegisterScavenging.h | 34 MachineBasicBlock *MBB;
73 : MBB(NULL), NumPhysRegs(0), Tracking(false),
78 void enterBasicBlock(MachineBasicBlock *mbb);
84 /// forward - Move the internal MBB iterator and update register states.
87 /// forward - Move the internal MBB iterator and update register states until
90 if (!Tracking && MBB->begin() != I) forward();
94 /// skipTo - Move the internal MBB iterator but do not update register states.
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| ExpandPostRAPseudos.cpp | 101 MachineBasicBlock *MBB = MI->getParent();
136 TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,
148 MBB->erase(MI);
|
| LiveRangeCalc.cpp | 35 MachineBasicBlock *MBB = I->DomNode->getBlock();
41 tie(Start, End) = Indexes->getMBBRange(MBB);
49 assert(Seen.test(MBB->getNumber()));
50 LiveOut[MBB] = LiveOutPair(VNI, (MachineDomTreeNode *)0);
68 assert(Kill && "No MBB at Kill");
70 // Is there a def in the same MBB we can extend?
115 MachineBasicBlock *MBB = WorkList[i];
116 assert(!MBB->pred_empty() && "Value live-in to entry block?");
117 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
118 PE = MBB->pred_end(); PI != PE; ++PI)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| Thumb2InstrInfo.cpp | 46 MachineBasicBlock *MBB = Tail->getParent();
47 ARMFunctionInfo *AFI = MBB->getParent()->getInfo<ARMFunctionInfo>();
67 MachineBasicBlock::iterator E = MBB->begin();
95 Thumb2InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB,
99 if (MBBI == MBB.end())
107 void Thumb2InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
113 return ARMBaseInstrInfo::copyPhysReg(MBB, I, DL, DestReg, SrcReg, KillSrc);
115 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
120 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
128 if (I != MBB.end()) DL = I->getDebugLoc()
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| AlphaRegisterInfo.cpp | 85 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
113 MBB.insert(I, New);
117 MBB.erase(I);
135 MachineBasicBlock &MBB = *MI.getParent();
136 MachineFunction &MF = *MBB.getParent();
173 MBB.insert(II, nMI);
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinRegisterInfo.cpp | 88 void BlackfinRegisterInfo::adjustRegister(MachineBasicBlock &MBB,
97 BuildMI(MBB, I, DL, TII.get(BF::ADDpp_imm7), Reg)
104 loadConstant(MBB, I, DL, ScratchReg, delta);
108 BuildMI(MBB, I, DL, TII.get(BF::ADDpp), Reg)
115 BuildMI(MBB, I, DL, TII.get(BF::ADD), Reg)
122 void BlackfinRegisterInfo::loadConstant(MachineBasicBlock &MBB,
128 BuildMI(MBB, I, DL, TII.get(BF::LOADimm7), Reg).addImm(value);
133 BuildMI(MBB, I, DL, TII.get(BF::LOADuimm16), Reg).addImm(value);
138 BuildMI(MBB, I, DL, TII.get(BF::LOADimm16), Reg).addImm(value);
143 BuildMI(MBB, I, DL
[all...] |
