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  /external/llvm/test/CodeGen/Mips/
eh-return64.ll 1 ; RUN: llc -march=mips64el -mcpu=mips4 -asm-show-inst -relocation-model=pic < %s | FileCheck %s -check-prefixes=CHECK,NOT-R6
zeroreg.ll 4 ; RUN: llc < %s -march=mipsel -mcpu=mips4 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
longbranch.ll 6 ; RUN: llc -march=mips64el -mcpu=mips4 -target-abi=n64 -force-mips-long-branch -O3 -relocation-model=pic \
  /external/llvm/test/MC/Disassembler/Mips/mips4/
valid-xfail-mips4.txt 1 # RUN: llvm-mc %s -triple=mips64-unknown-linux -disassemble -mcpu=mips4 | FileCheck %s
  /external/llvm/test/MC/Mips/mips4/
invalid-mips5-wrong-error.s 4 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips4 \
invalid-mips64r2.s 3 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips4 \
  /external/llvm/test/CodeGen/Mips/llvm-ir/
udiv.ll 16 ; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
call.ll 10 ; RUN: llc -march=mips64 -mcpu=mips4 -enable-mips-tail-calls < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
not.ll 13 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
ret.ll 15 ; RUN: llc -march=mips64 -mcpu=mips4 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,GPR64,DMTC1,NOT-R6
sdiv.ll 16 ; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
srem.ll 16 ; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
sub.ll 19 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
xor.ll 13 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
ashr.ll 15 ; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
lshr.ll 15 ; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
mul.ll 13 ; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | \
select-int.ll 15 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
shl.ll 15 ; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
urem.ll 16 ; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
  /toolchain/binutils/binutils-2.27/gas/testsuite/
ChangeLog-2011 104 (mips4-fp, mips5-fp): Run twice, one with -32 and once with -mabi=o64.
167 * gas/mips/mips4-branch-likely.l: Likewise.
168 * gas/mips/mips4-fp.l: Likewise.
345 architecture properties adding them to "mips3", "mips4", "mips5"
347 "24k-triple-stores-1", "24k-triple-stores-3", "mips4-fp",
495 * gas/mips/micromips@mips4-branch-likely.d: Likewise.
496 * gas/mips/micromips@mips4-fp.d: Likewise.
497 * gas/mips/micromips@mips4.d: Likewise.
568 * gas/mips/mips4.s: Likewise.
569 * gas/mips/mips4-fp.s: Likewise
    [all...]
ChangeLog-2010     [all...]
ChangeLog-2008 633 * gas/mips/mips4.s: Split out fp instruction from here ...
634 * gas/mips/mips4-fp.s: ... to here.
635 * gas/mips/mips4.d: Update.
636 * gas/mips/mips4-fp.l: New file. Check error messages with
638 * gas/mips/mips4-fp.d: New file. Check disassembly with
664 * gas/mips/mips.exp: Run new mips4-fp and mips32r2-fp dump tests.
665 Run mips4-fp and mips32r2-fp list tests with -msoft-float. Run
    [all...]
  /external/libffi/src/mips/
n32.S 46 .set mips4
  /external/llvm/test/MC/Mips/
module-directive-bad.s 36 .set mips4

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