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  /external/llvm/include/llvm/CodeGen/
ScheduleDAG.h 163 /// memory accesses where both sides of the dependence access memory
  /external/llvm/include/llvm/MC/
MCInstrDesc.h 364 /// 2. Memory accesses. Use mayLoad/mayStore.
  /external/llvm/lib/CodeGen/
Analysis.cpp 150 // Indirect operand accesses access memory.
SafeStack.cpp 267 // Go through all uses of this alloca and check whether all accesses to the
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  /external/llvm/lib/Target/AMDGPU/
SIISelLowering.cpp 343 // Assume the we will use FLAT for all global memory accesses
436 // TODO: I think v3i32 should allow unaligned accesses on CI with DS_READ_B96,
485 // use. Make sure we switch these to 64-bit accesses.
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SIRegisterInfo.cpp 371 // private accesses, so this is correct in that case.
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  /external/llvm/lib/Target/Lanai/
LanaiInstrInfo.cpp 103 // then the memory accesses are different.
  /external/llvm/lib/Target/PowerPC/
README.txt 113 address of the struct to be CSE'd, avoiding PIC accesses (also reduces the size
  /external/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp 236 // WebAssembly supports unaligned accesses, though it should be declared
WebAssemblyRegStackify.cpp 167 // Record volatile accesses, unless it's a call, as calls are handled
    [all...]
  /external/llvm/lib/Target/X86/
X86RegisterInfo.td 418 // Register classes used for ABIs that use 32-bit address accesses,
  /external/llvm/test/Analysis/LoopAccessAnalysis/
wrapping-pointer-versioning.ll 1 ; RUN: opt -basicaa -loop-accesses -analyze < %s | FileCheck %s -check-prefix=LAA
  /external/llvm/test/CodeGen/AArch64/
arm64-vector-ldst.ll 266 ; registers for unscaled vector accesses
  /external/llvm/utils/unittest/googletest/include/gtest/
gtest-printers.h 432 // possibly causing invalid memory accesses.
  /external/mesa3d/src/gtest/include/gtest/
gtest-printers.h 432 // possibly causing invalid memory accesses.
  /external/mesa3d/src/mesa/program/
prog_noise.c 76 * A vector-valued noise over 3D accesses it 96 times, and a
  /external/okhttp/okhttp/src/main/java/com/squareup/okhttp/internal/
DiskLruCache.java 132 * o READ lines track accesses for LRU.
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  /external/pcre/dist2/doc/html/
pcre2build.html 441 memory accesses, and is mostly useful for debugging PCRE2 itself.
  /external/pdfium/third_party/base/allocator/partition_allocator/
partition_alloc.h 141 // of the slot span. Metadata accesses to other PartitionPages are
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  /external/python/cpython2/Lib/test/
test_zlib.py 466 # Issue #16411: decompressor accesses input to last decompress() call
  /external/python/cpython3/Lib/
enum.py 842 # issue29167: wrap accesses to _value2member_map_ in a list to avoid race
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functools.py 527 # Size limited caching that tracks accesses by recency
  /external/python/cpython3/Lib/test/
test_zlib.py 596 # Issue #16411: decompressor accesses input to last decompress() call
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  /external/skia/src/codec/
SkPngCodec.cpp     [all...]
  /external/skqp/src/codec/
SkPngCodec.cpp     [all...]

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