| /frameworks/base/tools/aapt2/filter/ |
| AbiFilter_test.cpp | 44 {"lib/mips64/armeabi-v7a/foo.so", false},
45 {"lib/mips64/x86_64/x86.so", false},
|
| /system/core/libpixelflinger/ |
| Android.mk | 60 arch-mips64/col32cb16blend.S \
61 arch-mips64/t32cb16blend.S \
|
| /art/runtime/interpreter/mterp/ |
| config_mips64 | 23 asm-alt-stub mips64/alt_stub.S
26 import mips64/header.S
29 import mips64/entry.S
32 fallback-stub mips64/fallback.S
35 op-start mips64
298 import mips64/footer.S
|
| /external/llvm/test/MC/Disassembler/Mips/eva/ |
| valid_preR6-eva.txt | 1 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips32r2 -mattr=eva | FileCheck %s
2 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips32r3 -mattr=eva | FileCheck %s
3 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips32r5 -mattr=eva | FileCheck %s
4 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r2 -mattr=eva | FileCheck %s
5 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r3 -mattr=eva | FileCheck %s
6 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r5 -mattr=eva | FileCheck %s
|
| /external/libvpx/ |
| generate_config.sh | 233 gen_config_files mips64 "--target=mips64-linux-gcc --disable-msa ${all_platforms}"
234 gen_config_files mips64-msa "--target=mips64-linux-gcc --enable-msa ${all_platforms}"
250 lint_config mips64
251 lint_config mips64-msa
268 gen_rtcd_header mips64 mips64
269 gen_rtcd_header mips64-msa mips64
[all...] |
| /external/llvm/test/CodeGen/Mips/msa/ |
| elm_insv.ll | 8 ; RUN: llc -march=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -relocation-model=pic < %s | \
9 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS64
11 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS64
97 ; MIPS64-DAG: ld [[R1:\$[0-9]+]], 0(
99 ; MIPS64-DAG: ld.d [[W1:\$w[0-9]+]],
102 ; MIPS64-DAG: insert.d [[W1]][1], [[R1]]
104 ; MIPS64-DAG: st.d [[W1]],
125 ; MIPS64-DAG: ld [[R1:\$[0-9]+]], %got_disp(llvm_mips_insve_b_ARG1)(
126 ; MIPS64-DAG: ld [[R2:\$[0-9]+]], %got_disp(llvm_mips_insve_b_ARG3)(
151 ; MIPS64-DAG: ld [[R1:\$[0-9]+]], %got_disp(llvm_mips_insve_h_ARG1)
[all...] |
| 3r_splat.ll | 89 ; MIPS64-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_splat_d_ARG1)(
90 ; MIPS64-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_splat_d_RES)(
91 ; MIPS64-DAG: ld.d [[R3:\$w[0-9]+]], 0([[R1]])
92 ; MIPS64-DAG: splat.d [[R4:\$w[0-9]+]], [[R3]][$4]
93 ; MIPS64-DAG: st.d [[R4]], 0([[R2]])
|
| /art/test/640-checker-float-simd/src/ |
| Main.java | 33 /// CHECK-START-{ARM64,MIPS64}: void Main.add(float) loop_optimization (after)
46 /// CHECK-START-{ARM64,MIPS64}: void Main.sub(float) loop_optimization (after)
59 /// CHECK-START-{ARM64,MIPS64}: void Main.mul(float) loop_optimization (after)
72 /// CHECK-START-{ARM64,MIPS64}: void Main.div(float) loop_optimization (after)
85 /// CHECK-START-{ARM64,MIPS64}: void Main.neg() loop_optimization (after)
98 /// CHECK-START-{ARM64,MIPS64}: void Main.abs() loop_optimization (after)
111 /// CHECK-START-{ARM64,MIPS64}: void Main.conv(int[]) loop_optimization (after)
|
| /bionic/libc/tools/ |
| test_genseccomp.py | 29 int fchown:fchown(int, uid_t, gid_t) arm64,mips,mips64,x86_64
57 int fchown2:fchown2(int, uid_t, gid_t) arm64,mips,mips64,x86_64
67 int fchown:fchown(int, uid_t, gid_t) arm64,mips,mips64,x86_64
78 int fchown:fchown(int, uid_t, gid_t) arm64,mips,mips64,x86_64
128 self.get_headers("mips64"),
129 self.get_switches("mips64")),
196 int fchown:fchown(int, uid_t, gid_t) arm64,mips,mips64,x86_64
|
| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 24 #include "arch/mips64/instruction_set_features_mips64.h"
39 namespace mips64 { namespace in namespace:art
448 void Daddu(GpuRegister rd, GpuRegister rs, GpuRegister rt); // MIPS64
449 void Daddiu(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
451 void Dsubu(GpuRegister rd, GpuRegister rs, GpuRegister rt); // MIPS64
459 void Dmul(GpuRegister rd, GpuRegister rs, GpuRegister rt); // MIPS64
460 void Dmuh(GpuRegister rd, GpuRegister rs, GpuRegister rt); // MIPS64
461 void Ddiv(GpuRegister rd, GpuRegister rs, GpuRegister rt); // MIPS64
462 void Dmod(GpuRegister rd, GpuRegister rs, GpuRegister rt); // MIPS64
463 void Ddivu(GpuRegister rd, GpuRegister rs, GpuRegister rt); // MIPS64
[all...] |
| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| sub.ll | 17 ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
19 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
21 ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
23 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
25 ; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \
27 ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
29 ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
31 ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -mattr=+micromips | FileCheck %s \
|
| /art/runtime/arch/ |
| arch_test.cc | 152 namespace mips64 { namespace in namespace:art
153 #include "arch/mips64/asm_support_mips64.h"
171 } // namespace mips64
232 TEST_ARCH(Mips64, mips64)
|
| /external/v8/ |
| BUILD.gn | 324 # TODO(jochen): Add support for mips64.
[all...] |
| /external/v8/src/ |
| v8.gyp | [all...] |
| /art/compiler/linker/mips64/ |
| relative_patcher_mips64.cc | 17 #include "linker/mips64/relative_patcher_mips64.h"
45 UNIMPLEMENTED(FATAL) << "PatchCall unimplemented on MIPS64";
72 // PC-0x80000000 to PC+0x7FFF7FFF on MIPS64, that is, short of 2GB on one end
|
| /art/compiler/utils/ |
| managed_register.h | 36 namespace mips64 { namespace in namespace:art
38 } // namespace mips64
60 constexpr mips64::Mips64ManagedRegister AsMips64() const;
|
| /external/compiler-rt/cmake/ |
| builtin-config-ix.cmake | 22 set(MIPS64 mips64 mips64el)
34 ${MIPS32} ${MIPS64} ${WASM32} ${WASM64})
|
| /external/llvm/test/CodeGen/Mips/cconv/ |
| arguments-struct.ll | 4 ; RUN-TODO: llc -mtriple=mips64-unknown-linux-gnu -relocation-model=static -target-abi n32 < %s | FileCheck --check-prefixes=ALL,SYM32,O32-BE %s
7 ; RUN: llc -mtriple=mips64-unknown-linux-gnu -relocation-model=static -target-abi n32 < %s | FileCheck --check-prefixes=ALL,SYM32,NEW-BE %s
10 ; RUN: llc -mtriple=mips64-unknown-linux-gnu -relocation-model=static -target-abi n64 < %s | FileCheck --check-prefixes=ALL,SYM64,NEW-BE %s
|
| return-float.ll | 4 ; RUN-TODO: llc -mtriple=mips64-linux-gnu -mattr=+soft-float -relocation-model=static -target-abi o32 < %s | FileCheck --check-prefixes=ALL,O32 %s
7 ; RUN: llc -mtriple=mips64-linux-gnu -mattr=+soft-float -relocation-model=static -target-abi n32 < %s | FileCheck --check-prefixes=ALL,N32 %s
10 ; RUN: llc -mtriple=mips64-linux-gnu -mattr=+soft-float -relocation-model=static -target-abi n64 < %s | FileCheck --check-prefixes=ALL,N64 %s
|
| return-hard-float.ll | 4 ; RUN-TODO: llc -mtriple=mips64-linux-gnu -relocation-model=static -target-abi o32 < %s | FileCheck --check-prefixes=ALL,O32 %s
7 ; RUN: llc -mtriple=mips64-linux-gnu -relocation-model=static -target-abi n32 < %s | FileCheck --check-prefixes=ALL,N32 %s
10 ; RUN: llc -mtriple=mips64-linux-gnu -relocation-model=static -target-abi n64 < %s | FileCheck --check-prefixes=ALL,N64 %s
|
| /external/llvm/test/CodeGen/Mips/ |
| fpxx.ll | 7 ; RUN: llc -march=mips64 -mcpu=mips4 < %s | FileCheck %s -check-prefixes=ALL,4-NOFPXX
8 ; RUN: not llc -march=mips64 -mcpu=mips4 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=4-FPXX
10 ; RUN: llc -march=mips64 -mcpu=mips64 < %s | FileCheck %s -check-prefixes=ALL,64-NOFPXX
11 ; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=64-FPXX
13 ; RUN-TODO: llc -march=mips64 -mcpu=mips4 -target-abi o32 < %s | FileCheck %s -check-prefixes=ALL,4-O32-NOFPXX
14 ; RUN-TODO: llc -march=mips64 -mcpu=mips4 -target-abi o32 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,4-O32-FPXX
16 ; RUN-TODO: llc -march=mips64 -mcpu=mips64 -target-abi o32 < %s | FileCheck %s -check-prefixes=ALL,64-O32-NOFPX
[all...] |
| /external/llvm/test/ExecutionEngine/RuntimeDyld/Mips/ |
| ELF_N64R6_relocations.s | 5 # RUN: llvm-mc -triple=mips64-unknown-linux -mcpu=mips64r6 -code-model=small -filetype=obj -o %T/test_ELF_N64R6.o %s
6 # RUN: llc -mtriple=mips64-unknown-linux -mcpu=mips64r6 -filetype=obj -o %T/test_ELF_ExternalFunction_N64R6.o %S/Inputs/ExternalFunction.ll
7 # RUN: llvm-rtdyld -triple=mips64-unknown-linux -mcpu=mips64r6 -verify -map-section test_ELF_N64R6.o,.text=0x1000 -map-section test_ELF_ExternalFunction_N64R6.o,.text=0x10000 -check=%s %/T/test_ELF_N64R6.o %T/test_ELF_ExternalFunction_N64R6.o
|
| /external/llvm/test/MC/Mips/ |
| elf-gprel-32-64.s | 1 // RUN: llvm-mc -filetype=obj -triple=mips64el-pc-linux -mcpu=mips64 %s -o - \
4 // RUN: llvm-mc -filetype=obj -triple=mips64-pc-linux -mcpu=mips64 %s -o - \
|
| /external/valgrind/include/ |
| Makefile.am | 61 vki/vki-posixtypes-mips64-linux.h \
70 vki/vki-mips64-linux.h \
79 vki/vki-scnums-mips64-linux.h \
|
| /art/test/552-checker-sharpening/src/ |
| Main.java | 47 /// CHECK-START-{ARM,ARM64,MIPS,MIPS64,X86,X86_64}: int Main.testSimple(int) sharpening (after)
66 /// CHECK-START-{ARM,ARM64,MIPS,MIPS64,X86,X86_64}: int Main.testDiamond(boolean, int) sharpening (after)
142 /// CHECK-START-{ARM,ARM64,MIPS,MIPS64,X86,X86_64}: java.lang.String Main.$noinline$getBootImageString() builder (after)
153 /// CHECK-START-{ARM,ARM64,MIPS,MIPS64,X86,X86_64}: java.lang.String Main.$noinline$getNonBootImageString() builder (after)
170 /// CHECK-START-{ARM,ARM64,MIPS,MIPS64,X86,X86_64}: java.lang.Class Main.$noinline$getStringClass() builder (after)
181 /// CHECK-START-{ARM,ARM64,MIPS,MIPS64,X86,X86_64}: java.lang.Class Main.$noinline$getOtherClass() builder (after)
|
