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  /external/kernel-headers/original/uapi/linux/
mroute.h 172 /* Pseudo messages used by mrouted */
prctl.h 64 # define PR_ENDIAN_PPC_LITTLE 2 /* "PowerPC" pseudo little endian */
  /external/libcap/libcap/include/uapi/linux/
prctl.h 61 # define PR_ENDIAN_PPC_LITTLE 2 /* "PowerPC" pseudo little endian */
  /external/libchrome/base/
base_switches.cc 23 // Report native (walk the stack) allocation traces. By default pseudo stacks
task_runner.h 90 // operation can be canceled. See the following pseudo-code:
  /external/libdrm/tests/
random.c 65 * [Sch92] Bruce Schneier. "Pseudo-Ransom Sequence Generator for 32-Bit
  /external/libdrm/
xf86drmRandom.c 65 * [Sch92] Bruce Schneier. "Pseudo-Ransom Sequence Generator for 32-Bit
  /external/libjpeg-turbo/
jconfig.txt 72 * and pseudo-ANSI compilers get confused. To keep one of these bozos happy,
  /external/libnl/include/linux-private/linux/
if_arp.h 29 #define ARPHRD_NETROM 0 /* from KA9Q: NET/ROM pseudo */
if_ether.h 99 #define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */
  /external/libtextclassifier/util/base/
logging.h 94 // Pseudo-stream that "eats" the tokens <<-pumped into it, without printing
  /external/libusb/libusb/os/
haiku_pollfs.cpp 115 // Calculate pseudo-device-address
  /external/libvncserver/webclients/novnc/
README.md 51 * Supports desktop resize notification/pseudo-encoding
  /external/libvpx/libvpx/third_party/libyuv/include/libyuv/
mjpeg_decoder.h 59 // MJPEG ("Motion JPEG") is a pseudo-standard video codec where the frames are
  /external/libyuv/files/include/libyuv/
mjpeg_decoder.h 58 // MJPEG ("Motion JPEG") is a pseudo-standard video codec where the frames are
  /external/llvm/lib/Target/AMDGPU/
AMDGPUInstrInfo.cpp 114 // (uint16_t)-1 means that Opcode is a pseudo instruction that has
AMDGPUMCInstLower.cpp 55 C.emitError("AMDGPUMCInstLower::lower - Pseudo instruction doesn't have "
  /external/llvm/lib/Target/ARM/
ARMExpandPseudoInsts.cpp 1 //===-- ARMExpandPseudoInsts.cpp - Expand pseudo instructions -------------===//
10 // This file contains a pass that expands pseudo instructions into target
35 #define DEBUG_TYPE "arm-pseudo"
38 VerifyARMPseudo("verify-arm-pseudo-expand", cl::Hidden,
60 return "ARM pseudo instruction expansion pass";
89 /// TransferImpOps - Transfer implicit operands on the pseudo instruction to
108 // For quad-register load-lane and store-lane pseudo instructors, the
346 /// load or store pseudo instruction.
390 /// ExpandVLD - Translate VLD pseudo instructions with Q, QQ or QQQQ register
427 // For an instruction writing double-spaced subregs, the pseudo instructio
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  /external/llvm/lib/Target/PowerPC/
PPCInstrHTM.td 24 def TCHECK_RET : Pseudo<(outs crrc:$out), (ins), "#TCHECK_RET", []>;
PPCQPXLoadSplat.cpp 13 // (i.e. replace the load with a load-and-splat pseudo instruction).
PPCTLSDynamicCall.cpp 101 // gets translated to the pseudo instruction (e.g. ADDItlsgdLADDR).
  /external/llvm/soong/
tblgen.go 109 return "-gen-pseudo-lowering"
  /external/llvm/test/CodeGen/ARM/
2012-01-24-RegSequenceLiveRange.ll 63 ; Check that pseudo-expansion preserves <undef> flags.
crash.ll 1 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -verify-arm-pseudo-expand
  /external/llvm/test/CodeGen/MIR/Mips/
memory-operands.mir 2 # This test ensures that the MIR parser parses the call entry pseudo source

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