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  /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/GlobalISel/
RegisterBankInfo.h 56 const RegisterBank *RegBank;
62 const RegisterBank &RegBank)
63 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
75 /// Check that the Mask is compatible with the RegBank.
76 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
433 const RegisterBank &RegBank) const;
441 const RegisterBank &RegBank) const;
538 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/CodeGen/GlobalISel/
RegisterBankInfo.h 56 const RegisterBank *RegBank;
62 const RegisterBank &RegBank)
63 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
75 /// Check that the Mask is compatible with the RegBank.
76 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
441 const RegisterBank &RegBank) const;
449 const RegisterBank &RegBank) const;
573 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/CodeGen/GlobalISel/
RegisterBankInfo.h 56 const RegisterBank *RegBank;
62 const RegisterBank &RegBank)
63 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
75 /// Check that the Mask is compatible with the RegBank.
76 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
441 const RegisterBank &RegBank) const;
449 const RegisterBank &RegBank) const;
573 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/CodeGen/GlobalISel/
RegisterBankInfo.h 59 const RegisterBank *RegBank;
65 const RegisterBank &RegBank)
66 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
78 /// Check that the Mask is compatible with the RegBank.
79 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
461 const RegisterBank &RegBank) const;
469 const RegisterBank &RegBank) const;
593 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/CodeGen/GlobalISel/
RegisterBankInfo.h 59 const RegisterBank *RegBank;
65 const RegisterBank &RegBank)
66 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
78 /// Check that the Mask is compatible with the RegBank.
79 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
461 const RegisterBank &RegBank) const;
469 const RegisterBank &RegBank) const;
593 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/CodeGen/GlobalISel/
RegisterBankInfo.h 59 const RegisterBank *RegBank;
65 const RegisterBank &RegBank)
66 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
78 /// Check that the Mask is compatible with the RegBank.
79 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
461 const RegisterBank &RegBank) const;
469 const RegisterBank &RegBank) const;
593 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/CodeGen/GlobalISel/
RegisterBankInfo.h 59 const RegisterBank *RegBank;
65 const RegisterBank &RegBank)
66 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
78 /// Check that the Mask is compatible with the RegBank.
79 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
461 const RegisterBank &RegBank) const;
469 const RegisterBank &RegBank) const;
593 /// \note The mapping RC -> RegBank could be built while adding the
  /external/swiftshader/third_party/LLVM/utils/TableGen/
RegisterInfoEmitter.cpp 243 CodeGenRegBank &RegBank) {
250 RegBank.computeOverlaps(Overlaps);
262 const std::vector<CodeGenRegister*> &Regs = RegBank.getRegisters();
333 ArrayRef<CodeGenRegisterClass*> RegisterClasses = RegBank.getRegClasses();
407 CodeGenRegBank &RegBank) {
433 const std::vector<Record*> &SubRegIndices = RegBank.getSubRegIndices();
440 for (unsigned i = 0, e = RegBank.getNumNamedIndices(); i != e; ++i)
448 ArrayRef<CodeGenRegisterClass*> RegisterClasses = RegBank.getRegClasses();
483 CodeGenRegBank &RegBank){
496 ArrayRef<CodeGenRegisterClass*> RegisterClasses = RegBank.getRegClasses()
    [all...]
CodeGenRegisters.cpp 49 CodeGenRegister::getSubRegs(CodeGenRegBank &RegBank) {
63 CodeGenRegister *SR = RegBank.getReg(SubList[i]);
75 CodeGenRegister *SR = RegBank.getReg(SubList[i]);
76 const SubRegMap &Map = SR->getSubRegs(RegBank);
115 const SubRegMap &R2Subs = R2->getSubRegs(RegBank);
138 SubRegs[RegBank.getCompositeSubRegIndex(O.First, O.Second, true)] =
258 CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank, Record *R)
277 const SetTheory::RecVec *Elements = RegBank.getSets().expand(R);
284 Members.insert(RegBank.getReg((*Elements)[i]));
290 RegBank.getSets().evaluate(AltOrders->getElement(i), Order)
    [all...]
CodeGenTarget.cpp 113 : Records(records), RegBank(0) {
162 if (!RegBank)
163 RegBank = new CodeGenRegBank(Records);
164 return *RegBank;
CodeGenTarget.h 68 mutable CodeGenRegBank *RegBank;
  /external/llvm/utils/TableGen/
CodeGenRegisters.cpp 56 void CodeGenSubRegIndex::updateComponents(CodeGenRegBank &RegBank) {
65 CodeGenSubRegIndex *A = RegBank.getSubRegIdx(Comps[0]);
66 CodeGenSubRegIndex *B = RegBank.getSubRegIdx(Comps[1]);
80 IdxParts.push_back(RegBank.getSubRegIdx(Parts[i]));
81 RegBank.addConcatSubRegIndex(IdxParts, this);
117 void CodeGenRegister::buildObjectGraph(CodeGenRegBank &RegBank) {
126 ExplicitSubRegIndices.push_back(RegBank.getSubRegIdx(SRIs[i]));
127 ExplicitSubRegs.push_back(RegBank.getReg(SRs[i]));
142 CodeGenRegister *Reg = RegBank.getReg(Aliases[i]);
202 bool CodeGenRegister::inheritRegUnits(CodeGenRegBank &RegBank) {
    [all...]
CodeGenTarget.h 70 mutable std::unique_ptr<CodeGenRegBank> RegBank;
CodeGenTarget.cpp 222 if (!RegBank)
223 RegBank = llvm::make_unique<CodeGenRegBank>(Records);
224 return *RegBank;
CodeGenRegisters.h 174 // This is valid after computeSubRegs visits all registers during RegBank
189 // less than RegBank.getNumTopoSigs(). Registers with the same TopoSig have
224 bool inheritRegUnits(CodeGenRegBank &RegBank);
231 unsigned getWeight(const CodeGenRegBank &RegBank) const;
  /external/llvm/lib/CodeGen/
MachineRegisterInfo.cpp 45 const RegisterBank &RegBank) {
46 VRegInfo[Reg].first = &RegBank;
MachineVerifier.cpp     [all...]
  /external/llvm/lib/CodeGen/GlobalISel/
RegBankSelect.cpp 94 const RegisterBank *DesiredRegBrank = ValMapping.BreakDown[0].RegBank;
176 const RegisterBank *DesiredRegBrank = ValMapping.BreakDown[0].RegBank;
494 MRI->setRegBank(Reg, *ValMapping.BreakDown[0].RegBank);
    [all...]
  /external/llvm/lib/CodeGen/MIRParser/
MIRParser.cpp 380 const auto *RegBank = getRegBank(MF, VReg.Class.Value);
381 if (!RegBank)
387 RegInfo.setRegBank(Reg, *RegBank);
736 const auto &RegBank = RBI->getRegBank(I);
738 std::make_pair(StringRef(RegBank.getName()).lower(), &RegBank));
  /external/llvm/include/llvm/CodeGen/
MachineRegisterInfo.h 618 /// Set the register bank to \p RegBank for \p Reg.
620 void setRegBank(unsigned Reg, const RegisterBank &RegBank);
    [all...]
  /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/
MachineRegisterInfo.h 641 /// Set the register bank to \p RegBank for \p Reg.
643 void setRegBank(unsigned Reg, const RegisterBank &RegBank);
    [all...]
  /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/CodeGen/
MachineRegisterInfo.h 639 /// Set the register bank to \p RegBank for \p Reg.
640 void setRegBank(unsigned Reg, const RegisterBank &RegBank);
    [all...]
  /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/CodeGen/
MachineRegisterInfo.h 639 /// Set the register bank to \p RegBank for \p Reg.
640 void setRegBank(unsigned Reg, const RegisterBank &RegBank);
    [all...]
  /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/CodeGen/
MachineRegisterInfo.h 637 /// Set the register bank to \p RegBank for \p Reg.
638 void setRegBank(unsigned Reg, const RegisterBank &RegBank);
    [all...]
  /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/CodeGen/
MachineRegisterInfo.h 637 /// Set the register bank to \p RegBank for \p Reg.
638 void setRegBank(unsigned Reg, const RegisterBank &RegBank);
    [all...]

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