| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| si_pm4.c | 94 struct r600_resource *bo,
101 r600_resource_reference(&state->bo[idx], bo);
109 r600_resource_reference(&state->bo[i], NULL);
140 radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, state->bo[i],
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_sf_state.c | 137 drm_intel_bo *bo = brw->batch.bo; local
183 sf->sf5.sf_viewport_state_offset = (brw->batch.bo->offset64 +
296 drm_intel_bo_emit_reloc(bo, (brw->sf.state_offset +
298 brw->batch.bo, (brw->sf.vp_offset |
|
| brw_clip_state.c | 138 (brw->batch.bo->offset64 + brw->clip.vp_offset) >> 5;
141 drm_intel_bo_emit_reloc(brw->batch.bo,
144 brw->batch.bo, brw->clip.vp_offset,
|
| gen6_depth_state.c | 126 OUT_RELOC(depth_mt->bo,
177 OUT_RELOC(hiz_mt->bo,
218 OUT_RELOC(stencil_mt->bo,
|
| gen7_misc_state.c | 117 OUT_RELOC(depth_mt->bo,
155 OUT_RELOC(hiz_buf->aux_base.bo,
187 OUT_RELOC(stencil_mt->bo,
|
| intel_tex_image.c | 131 bool tex_busy = intelImage->mt && drm_intel_bo_busy(intelImage->mt->bo);
224 intel_miptree_create_for_bo(brw, image->bo, format,
246 * Binds a BO to a texture image, as if it was uploaded by glTexImage2D().
262 mt = intel_miptree_create_for_bo(brw, image->bo, image->format,
319 * to get the BO for the drawable from the window system.
339 mt = intel_miptree_create_for_bo(brw, rb->mt->bo, texFormat, 0,
470 drm_intel_bo *bo; local
528 bo = image->mt->bo;
530 if (drm_intel_bo_references(brw->batch.bo, bo))
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| radeon_maos_arrays.c | 101 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, emitsize * 4, 32);
106 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, emitsize * count * 4, 32);
115 radeon_bo_map(aos->bo, 1);
116 out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
135 radeon_bo_unmap(aos->bo);
|
| radeon_maos_verts.c | 378 rmesa->radeon.tcl.aos[0].bo)
381 if (rmesa->radeon.tcl.aos[0].bo)
385 &rmesa->radeon.tcl.aos[0].bo,
424 radeon_bo_map(rmesa->radeon.tcl.aos[0].bo, 1);
426 rmesa->radeon.tcl.aos[0].bo->ptr + rmesa->radeon.tcl.aos[0].offset);
427 radeon_bo_unmap(rmesa->radeon.tcl.aos[0].bo);
|
| /external/mesa3d/src/mesa/state_tracker/ |
| st_cb_xformfb.c | 124 struct st_buffer_object *bo = st_buffer_object(sobj->base.Buffers[i]); local
126 if (bo && bo->buffer) {
133 sobj->targets[i]->buffer != bo->buffer ||
138 pipe->create_stream_output_target(pipe, bo->buffer,
|
| /frameworks/native/opengl/libagl/ |
| array.cpp | 311 const GLvoid *pointer, const buffer_t* bo, GLsizei count)
330 this->bo = bo;
336 physical_pointer = (bo) ? (bo->data + uintptr_t(pointer)) : pointer;
1460 buffer_t const* bo = 0; local
1487 buffer_t const* bo = ((target == GL_ARRAY_BUFFER) ? local
1517 buffer_t const* bo = ((target == GL_ARRAY_BUFFER) ? local
[all...] |
| /external/icu/android_icu4j/src/main/tests/android/icu/dev/util/ |
| CollectionUtilities.java | 275 Comparable bo = (Comparable) bi.next(); local
277 int rel = ao.compareTo(bo);
283 bo = (Comparable) bi.next();
292 Object bo = bi.next(); local
294 int rel = aac.compare(ao, bo);
300 bo = bi.next();
328 Comparable bo = (Comparable) bi.next(); local
330 int rel = ao.compareTo(bo);
334 bo = (Comparable) bi.next();
347 Object bo = bi.next() local
[all...] |
| /external/icu/icu4j/main/tests/framework/src/com/ibm/icu/dev/util/ |
| CollectionUtilities.java | 272 Comparable bo = (Comparable) bi.next(); local
274 int rel = ao.compareTo(bo);
280 bo = (Comparable) bi.next();
289 Object bo = bi.next(); local
291 int rel = aac.compare(ao, bo);
297 bo = bi.next();
325 Comparable bo = (Comparable) bi.next(); local
327 int rel = ao.compareTo(bo);
331 bo = (Comparable) bi.next();
344 Object bo = bi.next() local
[all...] |
| /external/libdrm/tests/planetest/ |
| atomictest.c | 16 #include "bo.h"
94 plane[i]->bo = create_sp_bo(dev, plane_w, plane_h, 16, plane[i]->format, 0);
95 if (!plane[i]->bo) {
96 printf("failed to create plane bo\n");
100 fill_bo(plane[i]->bo, 0xFF, 0xFF, 0xFF, 0xFF);
|
| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| intel_blit.c | 192 src_mt->region->bo, src_mt->offset,
195 dst_mt->region->bo, dst_mt->offset,
253 aper_array[0] = intel->batch.bo;
408 assert(region->bo);
425 region->bo, pitch,
486 aper_array[0] = intel->batch.bo;
487 aper_array[1] = region->bo;
499 OUT_RELOC_FENCED(region->bo,
661 __func__, region->bo, pitch, x, y, width, height);
670 aper_array[0] = intel->batch.bo;
[all...] |
| /libcore/ojluni/src/main/java/java/util/ |
| DualPivotQuicksort.java | 164 int ao, bo; // array offsets from 'left' local
173 bo = 0;
179 bo = workBase - left;
188 b[i + bo] = a[p++ + ao];
190 b[i + bo] = a[q++ + ao];
197 b[i + bo] = a[i + ao]
202 int o = ao; ao = bo; bo = o;
612 int ao, bo; // array offsets from 'left' local
621 bo = 0
1096 int ao, bo; \/\/ array offsets from 'left' local
1580 int ao, bo; \/\/ array offsets from 'left' local
2160 int ao, bo; \/\/ array offsets from 'left' local
2699 int ao, bo; \/\/ array offsets from 'left' local
[all...] |
| /external/mesa3d/src/intel/vulkan/ |
| anv_private.h | 290 anv_bo_init(struct anv_bo *bo, uint32_t gem_handle, uint64_t size)
292 bo->gem_handle = gem_handle;
293 bo->index = 0;
294 bo->offset = -1;
295 bo->size = size;
296 bo->map = NULL;
297 bo->is_winsys_bo = false;
329 struct anv_bo bo; member in struct:anv_block_pool
331 /* The offset from the start of the bo to the "center" of the block
333 * bo.map + center_bo_offset + offsets
487 struct anv_bo bo; member in struct:anv_scratch_bo
667 struct anv_bo bo; member in struct:anv_batch_bo
699 struct anv_bo *bo; member in struct:anv_address
817 struct anv_bo bo; member in struct:anv_device_memory
970 struct anv_bo * bo; member in struct:anv_buffer
1331 struct anv_bo bo; member in struct:anv_fence
1582 struct anv_bo *bo; member in struct:anv_image
1648 struct anv_bo *bo; member in struct:anv_image_view
1686 struct anv_bo *bo; member in struct:anv_buffer_view
1823 struct anv_bo bo; member in struct:anv_query_pool
[all...] |
| /external/libdrm/radeon/ |
| radeon_cs.c | 17 radeon_cs_write_reloc(struct radeon_cs *cs, struct radeon_bo *bo,
24 bo,
|
| /external/libdrm/tests/util/ |
| format.c | 39 #define MAKE_RGB_INFO(rl, ro, gl, go, bl, bo, al, ao) \
40 .rgb = { { (rl), (ro) }, { (gl), (go) }, { (bl), (bo) }, { (al), (ao) } }
|
| /external/mesa3d/src/gallium/drivers/freedreno/ |
| freedreno_query_hw.c | 259 if (!rsc->bo)
262 ret = fd_bo_cpu_prep(rsc->bo, ctx->screen->pipe,
267 fd_bo_cpu_fini(rsc->bo);
286 if (!rsc->bo)
289 fd_bo_cpu_prep(rsc->bo, ctx->screen->pipe, DRM_FREEDRENO_PREP_READ);
291 void *ptr = fd_bo_map(rsc->bo);
298 fd_bo_cpu_fini(rsc->bo);
420 OUT_RELOCW(ring, fd_resource(batch->query_buf)->bo, offset, 0, 0);
|
| freedreno_resource.c | 101 if (rsc->bo)
102 fd_bo_del(rsc->bo);
104 rsc->bo = fd_bo_new(screen->dev, size, flags);
184 /* Swap the backing bo's, so shadow becomes the old buffer,
198 swap(rsc->bo, shadow->bo);
304 float *depth = fd_bo_map(rsc->bo) + slice->offset +
307 uint8_t *stencil = fd_bo_map(rsc->stencil->bo) + sslice->offset +
330 uint8_t *data = fd_bo_map(rsc->bo) + slice->offset +
421 fd_bo_cpu_fini(rsc->bo);
[all...] |
| /external/mesa3d/src/gallium/drivers/vc4/ |
| vc4_job.c | 121 if (referenced_bos[i] == rsc->bo) {
133 if (ctex->bo == rsc->bo) {
143 if (ztex->bo == rsc->bo) {
278 submit_surf->hindex = vc4_gem_hindex(job, rsc->bo);
319 submit_surf->hindex = vc4_gem_hindex(job, rsc->bo);
346 submit_surf->hindex = vc4_gem_hindex(job, rsc->bo);
|
| /external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| nv30_state_validate.c | 123 rbo = nv30_miptree(rsf->base.texture)->base.bo;
124 zbo = nv30_miptree(zsf->base.texture)->base.bo;
143 struct nouveau_bo *bo = nv30_miptree(sf->base.texture)->base.bo; local
146 PUSH_MTHDl(push, NV30_3D(COLOR1_OFFSET), BUFCTX_FB, bo, sf->offset,
153 struct nouveau_bo *bo = nv30_miptree(sf->base.texture)->base.bo; local
156 PUSH_MTHDl(push, NV40_3D(COLOR2_OFFSET), BUFCTX_FB, bo, sf->offset,
164 struct nouveau_bo *bo = nv30_miptree(sf->base.texture)->base.bo; local
[all...] |
| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| nv50_miptree.c | 167 nouveau_fence_work(mt->base.fence, nouveau_fence_unref_bo, mt->base.bo);
169 nouveau_bo_ref(NULL, &mt->base.bo);
189 if (!mt || !mt->base.bo)
195 mt->base.bo,
367 /* BO allocation done by client */
390 &mt->base.bo);
395 mt->base.address = mt->base.bo->offset;
420 mt->base.bo = nouveau_screen_bo_from_handle(pscreen, whandle, &stride);
421 if (mt->base.bo == NULL) {
425 mt->base.domain = mt->base.bo->flags & NOUVEAU_BO_APER
[all...] |
| /external/libdrm/tests/amdgpu/ |
| basic_tests.c | 244 amdgpu_bo_handle bo; local
250 bo = gpu_mem_alloc(device_handle,
256 r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
260 bo = gpu_mem_alloc(device_handle,
266 r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
270 bo = gpu_mem_alloc(device_handle,
275 r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
279 bo = gpu_mem_alloc(device_handle,
285 r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
801 amdgpu_bo_handle bo; local
902 amdgpu_bo_handle bo; local
[all...] |
| /external/mesa3d/src/gallium/drivers/ilo/ |
| ilo_transfer.c | 46 * buffer can be discarded. We can replace the backing bo by a new one of
49 * range can be discarded. We can allocate and map a staging bo on
50 * mapping, and (pipelined-)copy it over to the real bo on unmapping.
53 * staging bo, but should copy only the flushed regions over.
136 * Return true if usage allows the use of staging bo to avoid blocking.
276 ptr = intel_bo_map(vma->bo, xfer->base.usage & PIPE_TRANSFER_WRITE);
280 ptr = intel_bo_map_gtt(vma->bo);
284 ptr = intel_bo_map_gtt_async(vma->bo);
294 * for a linear bo. We can call resource_get_transfer_method(), but
298 ptr = intel_bo_map(vma->bo, true)
[all...] |
