1 /* 2 * Copyright (C) 2011 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #include "assembler_x86.h" 18 19 #include "base/casts.h" 20 #include "entrypoints/quick/quick_entrypoints.h" 21 #include "memory_region.h" 22 #include "thread.h" 23 24 namespace art { 25 namespace x86 { 26 27 std::ostream& operator<<(std::ostream& os, const XmmRegister& reg) { 28 return os << "XMM" << static_cast<int>(reg); 29 } 30 31 std::ostream& operator<<(std::ostream& os, const X87Register& reg) { 32 return os << "ST" << static_cast<int>(reg); 33 } 34 35 std::ostream& operator<<(std::ostream& os, const Address& addr) { 36 switch (addr.mod()) { 37 case 0: 38 if (addr.rm() != ESP || addr.index() == ESP) { 39 return os << "(%" << addr.rm() << ")"; 40 } else if (addr.base() == EBP) { 41 return os << static_cast<int>(addr.disp32()) << "(,%" << addr.index() 42 << "," << (1 << addr.scale()) << ")"; 43 } 44 return os << "(%" << addr.base() << ",%" << addr.index() << "," << (1 << addr.scale()) << ")"; 45 case 1: 46 if (addr.rm() != ESP || addr.index() == ESP) { 47 return os << static_cast<int>(addr.disp8()) << "(%" << addr.rm() << ")"; 48 } 49 return os << static_cast<int>(addr.disp8()) << "(%" << addr.base() << ",%" 50 << addr.index() << "," << (1 << addr.scale()) << ")"; 51 case 2: 52 if (addr.rm() != ESP || addr.index() == ESP) { 53 return os << static_cast<int>(addr.disp32()) << "(%" << addr.rm() << ")"; 54 } 55 return os << static_cast<int>(addr.disp32()) << "(%" << addr.base() << ",%" 56 << addr.index() << "," << (1 << addr.scale()) << ")"; 57 default: 58 return os << "<address?>"; 59 } 60 } 61 62 void X86Assembler::call(Register reg) { 63 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 64 EmitUint8(0xFF); 65 EmitRegisterOperand(2, reg); 66 } 67 68 69 void X86Assembler::call(const Address& address) { 70 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 71 EmitUint8(0xFF); 72 EmitOperand(2, address); 73 } 74 75 76 void X86Assembler::call(Label* label) { 77 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 78 EmitUint8(0xE8); 79 static const int kSize = 5; 80 // Offset by one because we already have emitted the opcode. 81 EmitLabel(label, kSize - 1); 82 } 83 84 85 void X86Assembler::call(const ExternalLabel& label) { 86 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 87 intptr_t call_start = buffer_.GetPosition(); 88 EmitUint8(0xE8); 89 EmitInt32(label.address()); 90 static const intptr_t kCallExternalLabelSize = 5; 91 DCHECK_EQ((buffer_.GetPosition() - call_start), kCallExternalLabelSize); 92 } 93 94 95 void X86Assembler::pushl(Register reg) { 96 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 97 EmitUint8(0x50 + reg); 98 } 99 100 101 void X86Assembler::pushl(const Address& address) { 102 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 103 EmitUint8(0xFF); 104 EmitOperand(6, address); 105 } 106 107 108 void X86Assembler::pushl(const Immediate& imm) { 109 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 110 if (imm.is_int8()) { 111 EmitUint8(0x6A); 112 EmitUint8(imm.value() & 0xFF); 113 } else { 114 EmitUint8(0x68); 115 EmitImmediate(imm); 116 } 117 } 118 119 120 void X86Assembler::popl(Register reg) { 121 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 122 EmitUint8(0x58 + reg); 123 } 124 125 126 void X86Assembler::popl(const Address& address) { 127 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 128 EmitUint8(0x8F); 129 EmitOperand(0, address); 130 } 131 132 133 void X86Assembler::movl(Register dst, const Immediate& imm) { 134 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 135 EmitUint8(0xB8 + dst); 136 EmitImmediate(imm); 137 } 138 139 140 void X86Assembler::movl(Register dst, Register src) { 141 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 142 EmitUint8(0x89); 143 EmitRegisterOperand(src, dst); 144 } 145 146 147 void X86Assembler::movl(Register dst, const Address& src) { 148 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 149 EmitUint8(0x8B); 150 EmitOperand(dst, src); 151 } 152 153 154 void X86Assembler::movl(const Address& dst, Register src) { 155 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 156 EmitUint8(0x89); 157 EmitOperand(src, dst); 158 } 159 160 161 void X86Assembler::movl(const Address& dst, const Immediate& imm) { 162 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 163 EmitUint8(0xC7); 164 EmitOperand(0, dst); 165 EmitImmediate(imm); 166 } 167 168 void X86Assembler::movl(const Address& dst, Label* lbl) { 169 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 170 EmitUint8(0xC7); 171 EmitOperand(0, dst); 172 EmitLabel(lbl, dst.length_ + 5); 173 } 174 175 void X86Assembler::movntl(const Address& dst, Register src) { 176 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 177 EmitUint8(0x0F); 178 EmitUint8(0xC3); 179 EmitOperand(src, dst); 180 } 181 182 void X86Assembler::bswapl(Register dst) { 183 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 184 EmitUint8(0x0F); 185 EmitUint8(0xC8 + dst); 186 } 187 188 void X86Assembler::bsfl(Register dst, Register src) { 189 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 190 EmitUint8(0x0F); 191 EmitUint8(0xBC); 192 EmitRegisterOperand(dst, src); 193 } 194 195 void X86Assembler::bsfl(Register dst, const Address& src) { 196 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 197 EmitUint8(0x0F); 198 EmitUint8(0xBC); 199 EmitOperand(dst, src); 200 } 201 202 void X86Assembler::bsrl(Register dst, Register src) { 203 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 204 EmitUint8(0x0F); 205 EmitUint8(0xBD); 206 EmitRegisterOperand(dst, src); 207 } 208 209 void X86Assembler::bsrl(Register dst, const Address& src) { 210 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 211 EmitUint8(0x0F); 212 EmitUint8(0xBD); 213 EmitOperand(dst, src); 214 } 215 216 void X86Assembler::popcntl(Register dst, Register src) { 217 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 218 EmitUint8(0xF3); 219 EmitUint8(0x0F); 220 EmitUint8(0xB8); 221 EmitRegisterOperand(dst, src); 222 } 223 224 void X86Assembler::popcntl(Register dst, const Address& src) { 225 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 226 EmitUint8(0xF3); 227 EmitUint8(0x0F); 228 EmitUint8(0xB8); 229 EmitOperand(dst, src); 230 } 231 232 void X86Assembler::movzxb(Register dst, ByteRegister src) { 233 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 234 EmitUint8(0x0F); 235 EmitUint8(0xB6); 236 EmitRegisterOperand(dst, src); 237 } 238 239 240 void X86Assembler::movzxb(Register dst, const Address& src) { 241 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 242 EmitUint8(0x0F); 243 EmitUint8(0xB6); 244 EmitOperand(dst, src); 245 } 246 247 248 void X86Assembler::movsxb(Register dst, ByteRegister src) { 249 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 250 EmitUint8(0x0F); 251 EmitUint8(0xBE); 252 EmitRegisterOperand(dst, src); 253 } 254 255 256 void X86Assembler::movsxb(Register dst, const Address& src) { 257 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 258 EmitUint8(0x0F); 259 EmitUint8(0xBE); 260 EmitOperand(dst, src); 261 } 262 263 264 void X86Assembler::movb(Register /*dst*/, const Address& /*src*/) { 265 LOG(FATAL) << "Use movzxb or movsxb instead."; 266 } 267 268 269 void X86Assembler::movb(const Address& dst, ByteRegister src) { 270 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 271 EmitUint8(0x88); 272 EmitOperand(src, dst); 273 } 274 275 276 void X86Assembler::movb(const Address& dst, const Immediate& imm) { 277 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 278 EmitUint8(0xC6); 279 EmitOperand(EAX, dst); 280 CHECK(imm.is_int8()); 281 EmitUint8(imm.value() & 0xFF); 282 } 283 284 285 void X86Assembler::movzxw(Register dst, Register src) { 286 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 287 EmitUint8(0x0F); 288 EmitUint8(0xB7); 289 EmitRegisterOperand(dst, src); 290 } 291 292 293 void X86Assembler::movzxw(Register dst, const Address& src) { 294 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 295 EmitUint8(0x0F); 296 EmitUint8(0xB7); 297 EmitOperand(dst, src); 298 } 299 300 301 void X86Assembler::movsxw(Register dst, Register src) { 302 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 303 EmitUint8(0x0F); 304 EmitUint8(0xBF); 305 EmitRegisterOperand(dst, src); 306 } 307 308 309 void X86Assembler::movsxw(Register dst, const Address& src) { 310 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 311 EmitUint8(0x0F); 312 EmitUint8(0xBF); 313 EmitOperand(dst, src); 314 } 315 316 317 void X86Assembler::movw(Register /*dst*/, const Address& /*src*/) { 318 LOG(FATAL) << "Use movzxw or movsxw instead."; 319 } 320 321 322 void X86Assembler::movw(const Address& dst, Register src) { 323 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 324 EmitOperandSizeOverride(); 325 EmitUint8(0x89); 326 EmitOperand(src, dst); 327 } 328 329 330 void X86Assembler::movw(const Address& dst, const Immediate& imm) { 331 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 332 EmitOperandSizeOverride(); 333 EmitUint8(0xC7); 334 EmitOperand(0, dst); 335 CHECK(imm.is_uint16() || imm.is_int16()); 336 EmitUint8(imm.value() & 0xFF); 337 EmitUint8(imm.value() >> 8); 338 } 339 340 341 void X86Assembler::leal(Register dst, const Address& src) { 342 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 343 EmitUint8(0x8D); 344 EmitOperand(dst, src); 345 } 346 347 348 void X86Assembler::cmovl(Condition condition, Register dst, Register src) { 349 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 350 EmitUint8(0x0F); 351 EmitUint8(0x40 + condition); 352 EmitRegisterOperand(dst, src); 353 } 354 355 356 void X86Assembler::cmovl(Condition condition, Register dst, const Address& src) { 357 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 358 EmitUint8(0x0F); 359 EmitUint8(0x40 + condition); 360 EmitOperand(dst, src); 361 } 362 363 364 void X86Assembler::setb(Condition condition, Register dst) { 365 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 366 EmitUint8(0x0F); 367 EmitUint8(0x90 + condition); 368 EmitOperand(0, Operand(dst)); 369 } 370 371 372 void X86Assembler::movaps(XmmRegister dst, XmmRegister src) { 373 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 374 EmitUint8(0x0F); 375 EmitUint8(0x28); 376 EmitXmmRegisterOperand(dst, src); 377 } 378 379 380 void X86Assembler::movaps(XmmRegister dst, const Address& src) { 381 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 382 EmitUint8(0x0F); 383 EmitUint8(0x28); 384 EmitOperand(dst, src); 385 } 386 387 388 void X86Assembler::movups(XmmRegister dst, const Address& src) { 389 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 390 EmitUint8(0x0F); 391 EmitUint8(0x10); 392 EmitOperand(dst, src); 393 } 394 395 396 void X86Assembler::movaps(const Address& dst, XmmRegister src) { 397 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 398 EmitUint8(0x0F); 399 EmitUint8(0x29); 400 EmitOperand(src, dst); 401 } 402 403 404 void X86Assembler::movups(const Address& dst, XmmRegister src) { 405 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 406 EmitUint8(0x0F); 407 EmitUint8(0x11); 408 EmitOperand(src, dst); 409 } 410 411 412 void X86Assembler::movss(XmmRegister dst, const Address& src) { 413 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 414 EmitUint8(0xF3); 415 EmitUint8(0x0F); 416 EmitUint8(0x10); 417 EmitOperand(dst, src); 418 } 419 420 421 void X86Assembler::movss(const Address& dst, XmmRegister src) { 422 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 423 EmitUint8(0xF3); 424 EmitUint8(0x0F); 425 EmitUint8(0x11); 426 EmitOperand(src, dst); 427 } 428 429 430 void X86Assembler::movss(XmmRegister dst, XmmRegister src) { 431 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 432 EmitUint8(0xF3); 433 EmitUint8(0x0F); 434 EmitUint8(0x11); 435 EmitXmmRegisterOperand(src, dst); 436 } 437 438 439 void X86Assembler::movd(XmmRegister dst, Register src) { 440 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 441 EmitUint8(0x66); 442 EmitUint8(0x0F); 443 EmitUint8(0x6E); 444 EmitOperand(dst, Operand(src)); 445 } 446 447 448 void X86Assembler::movd(Register dst, XmmRegister src) { 449 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 450 EmitUint8(0x66); 451 EmitUint8(0x0F); 452 EmitUint8(0x7E); 453 EmitOperand(src, Operand(dst)); 454 } 455 456 457 void X86Assembler::addss(XmmRegister dst, XmmRegister src) { 458 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 459 EmitUint8(0xF3); 460 EmitUint8(0x0F); 461 EmitUint8(0x58); 462 EmitXmmRegisterOperand(dst, src); 463 } 464 465 466 void X86Assembler::addss(XmmRegister dst, const Address& src) { 467 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 468 EmitUint8(0xF3); 469 EmitUint8(0x0F); 470 EmitUint8(0x58); 471 EmitOperand(dst, src); 472 } 473 474 475 void X86Assembler::subss(XmmRegister dst, XmmRegister src) { 476 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 477 EmitUint8(0xF3); 478 EmitUint8(0x0F); 479 EmitUint8(0x5C); 480 EmitXmmRegisterOperand(dst, src); 481 } 482 483 484 void X86Assembler::subss(XmmRegister dst, const Address& src) { 485 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 486 EmitUint8(0xF3); 487 EmitUint8(0x0F); 488 EmitUint8(0x5C); 489 EmitOperand(dst, src); 490 } 491 492 493 void X86Assembler::mulss(XmmRegister dst, XmmRegister src) { 494 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 495 EmitUint8(0xF3); 496 EmitUint8(0x0F); 497 EmitUint8(0x59); 498 EmitXmmRegisterOperand(dst, src); 499 } 500 501 502 void X86Assembler::mulss(XmmRegister dst, const Address& src) { 503 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 504 EmitUint8(0xF3); 505 EmitUint8(0x0F); 506 EmitUint8(0x59); 507 EmitOperand(dst, src); 508 } 509 510 511 void X86Assembler::divss(XmmRegister dst, XmmRegister src) { 512 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 513 EmitUint8(0xF3); 514 EmitUint8(0x0F); 515 EmitUint8(0x5E); 516 EmitXmmRegisterOperand(dst, src); 517 } 518 519 520 void X86Assembler::divss(XmmRegister dst, const Address& src) { 521 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 522 EmitUint8(0xF3); 523 EmitUint8(0x0F); 524 EmitUint8(0x5E); 525 EmitOperand(dst, src); 526 } 527 528 529 void X86Assembler::addps(XmmRegister dst, XmmRegister src) { 530 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 531 EmitUint8(0x0F); 532 EmitUint8(0x58); 533 EmitXmmRegisterOperand(dst, src); 534 } 535 536 537 void X86Assembler::subps(XmmRegister dst, XmmRegister src) { 538 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 539 EmitUint8(0x0F); 540 EmitUint8(0x5C); 541 EmitXmmRegisterOperand(dst, src); 542 } 543 544 545 void X86Assembler::mulps(XmmRegister dst, XmmRegister src) { 546 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 547 EmitUint8(0x0F); 548 EmitUint8(0x59); 549 EmitXmmRegisterOperand(dst, src); 550 } 551 552 553 void X86Assembler::divps(XmmRegister dst, XmmRegister src) { 554 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 555 EmitUint8(0x0F); 556 EmitUint8(0x5E); 557 EmitXmmRegisterOperand(dst, src); 558 } 559 560 561 void X86Assembler::movapd(XmmRegister dst, XmmRegister src) { 562 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 563 EmitUint8(0x66); 564 EmitUint8(0x0F); 565 EmitUint8(0x28); 566 EmitXmmRegisterOperand(dst, src); 567 } 568 569 570 void X86Assembler::movapd(XmmRegister dst, const Address& src) { 571 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 572 EmitUint8(0x66); 573 EmitUint8(0x0F); 574 EmitUint8(0x28); 575 EmitOperand(dst, src); 576 } 577 578 579 void X86Assembler::movupd(XmmRegister dst, const Address& src) { 580 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 581 EmitUint8(0x66); 582 EmitUint8(0x0F); 583 EmitUint8(0x10); 584 EmitOperand(dst, src); 585 } 586 587 588 void X86Assembler::movapd(const Address& dst, XmmRegister src) { 589 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 590 EmitUint8(0x66); 591 EmitUint8(0x0F); 592 EmitUint8(0x29); 593 EmitOperand(src, dst); 594 } 595 596 597 void X86Assembler::movupd(const Address& dst, XmmRegister src) { 598 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 599 EmitUint8(0x66); 600 EmitUint8(0x0F); 601 EmitUint8(0x11); 602 EmitOperand(src, dst); 603 } 604 605 606 void X86Assembler::flds(const Address& src) { 607 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 608 EmitUint8(0xD9); 609 EmitOperand(0, src); 610 } 611 612 613 void X86Assembler::fsts(const Address& dst) { 614 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 615 EmitUint8(0xD9); 616 EmitOperand(2, dst); 617 } 618 619 620 void X86Assembler::fstps(const Address& dst) { 621 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 622 EmitUint8(0xD9); 623 EmitOperand(3, dst); 624 } 625 626 627 void X86Assembler::movsd(XmmRegister dst, const Address& src) { 628 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 629 EmitUint8(0xF2); 630 EmitUint8(0x0F); 631 EmitUint8(0x10); 632 EmitOperand(dst, src); 633 } 634 635 636 void X86Assembler::movsd(const Address& dst, XmmRegister src) { 637 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 638 EmitUint8(0xF2); 639 EmitUint8(0x0F); 640 EmitUint8(0x11); 641 EmitOperand(src, dst); 642 } 643 644 645 void X86Assembler::movsd(XmmRegister dst, XmmRegister src) { 646 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 647 EmitUint8(0xF2); 648 EmitUint8(0x0F); 649 EmitUint8(0x11); 650 EmitXmmRegisterOperand(src, dst); 651 } 652 653 654 void X86Assembler::movhpd(XmmRegister dst, const Address& src) { 655 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 656 EmitUint8(0x66); 657 EmitUint8(0x0F); 658 EmitUint8(0x16); 659 EmitOperand(dst, src); 660 } 661 662 663 void X86Assembler::movhpd(const Address& dst, XmmRegister src) { 664 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 665 EmitUint8(0x66); 666 EmitUint8(0x0F); 667 EmitUint8(0x17); 668 EmitOperand(src, dst); 669 } 670 671 672 void X86Assembler::addsd(XmmRegister dst, XmmRegister src) { 673 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 674 EmitUint8(0xF2); 675 EmitUint8(0x0F); 676 EmitUint8(0x58); 677 EmitXmmRegisterOperand(dst, src); 678 } 679 680 681 void X86Assembler::addsd(XmmRegister dst, const Address& src) { 682 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 683 EmitUint8(0xF2); 684 EmitUint8(0x0F); 685 EmitUint8(0x58); 686 EmitOperand(dst, src); 687 } 688 689 690 void X86Assembler::subsd(XmmRegister dst, XmmRegister src) { 691 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 692 EmitUint8(0xF2); 693 EmitUint8(0x0F); 694 EmitUint8(0x5C); 695 EmitXmmRegisterOperand(dst, src); 696 } 697 698 699 void X86Assembler::subsd(XmmRegister dst, const Address& src) { 700 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 701 EmitUint8(0xF2); 702 EmitUint8(0x0F); 703 EmitUint8(0x5C); 704 EmitOperand(dst, src); 705 } 706 707 708 void X86Assembler::mulsd(XmmRegister dst, XmmRegister src) { 709 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 710 EmitUint8(0xF2); 711 EmitUint8(0x0F); 712 EmitUint8(0x59); 713 EmitXmmRegisterOperand(dst, src); 714 } 715 716 717 void X86Assembler::mulsd(XmmRegister dst, const Address& src) { 718 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 719 EmitUint8(0xF2); 720 EmitUint8(0x0F); 721 EmitUint8(0x59); 722 EmitOperand(dst, src); 723 } 724 725 726 void X86Assembler::divsd(XmmRegister dst, XmmRegister src) { 727 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 728 EmitUint8(0xF2); 729 EmitUint8(0x0F); 730 EmitUint8(0x5E); 731 EmitXmmRegisterOperand(dst, src); 732 } 733 734 735 void X86Assembler::divsd(XmmRegister dst, const Address& src) { 736 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 737 EmitUint8(0xF2); 738 EmitUint8(0x0F); 739 EmitUint8(0x5E); 740 EmitOperand(dst, src); 741 } 742 743 744 void X86Assembler::addpd(XmmRegister dst, XmmRegister src) { 745 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 746 EmitUint8(0x66); 747 EmitUint8(0x0F); 748 EmitUint8(0x58); 749 EmitXmmRegisterOperand(dst, src); 750 } 751 752 753 void X86Assembler::subpd(XmmRegister dst, XmmRegister src) { 754 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 755 EmitUint8(0x66); 756 EmitUint8(0x0F); 757 EmitUint8(0x5C); 758 EmitXmmRegisterOperand(dst, src); 759 } 760 761 762 void X86Assembler::mulpd(XmmRegister dst, XmmRegister src) { 763 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 764 EmitUint8(0x66); 765 EmitUint8(0x0F); 766 EmitUint8(0x59); 767 EmitXmmRegisterOperand(dst, src); 768 } 769 770 771 void X86Assembler::divpd(XmmRegister dst, XmmRegister src) { 772 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 773 EmitUint8(0x66); 774 EmitUint8(0x0F); 775 EmitUint8(0x5E); 776 EmitXmmRegisterOperand(dst, src); 777 } 778 779 780 void X86Assembler::movdqa(XmmRegister dst, XmmRegister src) { 781 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 782 EmitUint8(0x66); 783 EmitUint8(0x0F); 784 EmitUint8(0x6F); 785 EmitXmmRegisterOperand(dst, src); 786 } 787 788 789 void X86Assembler::movdqa(XmmRegister dst, const Address& src) { 790 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 791 EmitUint8(0x66); 792 EmitUint8(0x0F); 793 EmitUint8(0x6F); 794 EmitOperand(dst, src); 795 } 796 797 798 void X86Assembler::movdqu(XmmRegister dst, const Address& src) { 799 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 800 EmitUint8(0xF3); 801 EmitUint8(0x0F); 802 EmitUint8(0x6F); 803 EmitOperand(dst, src); 804 } 805 806 807 void X86Assembler::movdqa(const Address& dst, XmmRegister src) { 808 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 809 EmitUint8(0x66); 810 EmitUint8(0x0F); 811 EmitUint8(0x7F); 812 EmitOperand(src, dst); 813 } 814 815 816 void X86Assembler::movdqu(const Address& dst, XmmRegister src) { 817 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 818 EmitUint8(0xF3); 819 EmitUint8(0x0F); 820 EmitUint8(0x7F); 821 EmitOperand(src, dst); 822 } 823 824 825 void X86Assembler::paddb(XmmRegister dst, XmmRegister src) { 826 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 827 EmitUint8(0x66); 828 EmitUint8(0x0F); 829 EmitUint8(0xFC); 830 EmitXmmRegisterOperand(dst, src); 831 } 832 833 834 void X86Assembler::psubb(XmmRegister dst, XmmRegister src) { 835 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 836 EmitUint8(0x66); 837 EmitUint8(0x0F); 838 EmitUint8(0xF8); 839 EmitXmmRegisterOperand(dst, src); 840 } 841 842 843 void X86Assembler::paddw(XmmRegister dst, XmmRegister src) { 844 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 845 EmitUint8(0x66); 846 EmitUint8(0x0F); 847 EmitUint8(0xFD); 848 EmitXmmRegisterOperand(dst, src); 849 } 850 851 852 void X86Assembler::psubw(XmmRegister dst, XmmRegister src) { 853 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 854 EmitUint8(0x66); 855 EmitUint8(0x0F); 856 EmitUint8(0xF9); 857 EmitXmmRegisterOperand(dst, src); 858 } 859 860 861 void X86Assembler::pmullw(XmmRegister dst, XmmRegister src) { 862 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 863 EmitUint8(0x66); 864 EmitUint8(0x0F); 865 EmitUint8(0xD5); 866 EmitXmmRegisterOperand(dst, src); 867 } 868 869 870 void X86Assembler::paddd(XmmRegister dst, XmmRegister src) { 871 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 872 EmitUint8(0x66); 873 EmitUint8(0x0F); 874 EmitUint8(0xFE); 875 EmitXmmRegisterOperand(dst, src); 876 } 877 878 879 void X86Assembler::psubd(XmmRegister dst, XmmRegister src) { 880 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 881 EmitUint8(0x66); 882 EmitUint8(0x0F); 883 EmitUint8(0xFA); 884 EmitXmmRegisterOperand(dst, src); 885 } 886 887 888 void X86Assembler::pmulld(XmmRegister dst, XmmRegister src) { 889 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 890 EmitUint8(0x66); 891 EmitUint8(0x0F); 892 EmitUint8(0x38); 893 EmitUint8(0x40); 894 EmitXmmRegisterOperand(dst, src); 895 } 896 897 898 void X86Assembler::paddq(XmmRegister dst, XmmRegister src) { 899 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 900 EmitUint8(0x66); 901 EmitUint8(0x0F); 902 EmitUint8(0xD4); 903 EmitXmmRegisterOperand(dst, src); 904 } 905 906 907 void X86Assembler::psubq(XmmRegister dst, XmmRegister src) { 908 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 909 EmitUint8(0x66); 910 EmitUint8(0x0F); 911 EmitUint8(0xFB); 912 EmitXmmRegisterOperand(dst, src); 913 } 914 915 916 void X86Assembler::cvtsi2ss(XmmRegister dst, Register src) { 917 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 918 EmitUint8(0xF3); 919 EmitUint8(0x0F); 920 EmitUint8(0x2A); 921 EmitOperand(dst, Operand(src)); 922 } 923 924 925 void X86Assembler::cvtsi2sd(XmmRegister dst, Register src) { 926 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 927 EmitUint8(0xF2); 928 EmitUint8(0x0F); 929 EmitUint8(0x2A); 930 EmitOperand(dst, Operand(src)); 931 } 932 933 934 void X86Assembler::cvtss2si(Register dst, XmmRegister src) { 935 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 936 EmitUint8(0xF3); 937 EmitUint8(0x0F); 938 EmitUint8(0x2D); 939 EmitXmmRegisterOperand(dst, src); 940 } 941 942 943 void X86Assembler::cvtss2sd(XmmRegister dst, XmmRegister src) { 944 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 945 EmitUint8(0xF3); 946 EmitUint8(0x0F); 947 EmitUint8(0x5A); 948 EmitXmmRegisterOperand(dst, src); 949 } 950 951 952 void X86Assembler::cvtsd2si(Register dst, XmmRegister src) { 953 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 954 EmitUint8(0xF2); 955 EmitUint8(0x0F); 956 EmitUint8(0x2D); 957 EmitXmmRegisterOperand(dst, src); 958 } 959 960 961 void X86Assembler::cvttss2si(Register dst, XmmRegister src) { 962 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 963 EmitUint8(0xF3); 964 EmitUint8(0x0F); 965 EmitUint8(0x2C); 966 EmitXmmRegisterOperand(dst, src); 967 } 968 969 970 void X86Assembler::cvttsd2si(Register dst, XmmRegister src) { 971 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 972 EmitUint8(0xF2); 973 EmitUint8(0x0F); 974 EmitUint8(0x2C); 975 EmitXmmRegisterOperand(dst, src); 976 } 977 978 979 void X86Assembler::cvtsd2ss(XmmRegister dst, XmmRegister src) { 980 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 981 EmitUint8(0xF2); 982 EmitUint8(0x0F); 983 EmitUint8(0x5A); 984 EmitXmmRegisterOperand(dst, src); 985 } 986 987 988 void X86Assembler::cvtdq2ps(XmmRegister dst, XmmRegister src) { 989 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 990 EmitUint8(0x0F); 991 EmitUint8(0x5B); 992 EmitXmmRegisterOperand(dst, src); 993 } 994 995 996 void X86Assembler::cvtdq2pd(XmmRegister dst, XmmRegister src) { 997 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 998 EmitUint8(0xF3); 999 EmitUint8(0x0F); 1000 EmitUint8(0xE6); 1001 EmitXmmRegisterOperand(dst, src); 1002 } 1003 1004 1005 void X86Assembler::comiss(XmmRegister a, XmmRegister b) { 1006 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1007 EmitUint8(0x0F); 1008 EmitUint8(0x2F); 1009 EmitXmmRegisterOperand(a, b); 1010 } 1011 1012 1013 void X86Assembler::comiss(XmmRegister a, const Address& b) { 1014 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1015 EmitUint8(0x0F); 1016 EmitUint8(0x2F); 1017 EmitOperand(a, b); 1018 } 1019 1020 1021 void X86Assembler::comisd(XmmRegister a, XmmRegister b) { 1022 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1023 EmitUint8(0x66); 1024 EmitUint8(0x0F); 1025 EmitUint8(0x2F); 1026 EmitXmmRegisterOperand(a, b); 1027 } 1028 1029 1030 void X86Assembler::comisd(XmmRegister a, const Address& b) { 1031 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1032 EmitUint8(0x66); 1033 EmitUint8(0x0F); 1034 EmitUint8(0x2F); 1035 EmitOperand(a, b); 1036 } 1037 1038 1039 void X86Assembler::ucomiss(XmmRegister a, XmmRegister b) { 1040 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1041 EmitUint8(0x0F); 1042 EmitUint8(0x2E); 1043 EmitXmmRegisterOperand(a, b); 1044 } 1045 1046 1047 void X86Assembler::ucomiss(XmmRegister a, const Address& b) { 1048 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1049 EmitUint8(0x0F); 1050 EmitUint8(0x2E); 1051 EmitOperand(a, b); 1052 } 1053 1054 1055 void X86Assembler::ucomisd(XmmRegister a, XmmRegister b) { 1056 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1057 EmitUint8(0x66); 1058 EmitUint8(0x0F); 1059 EmitUint8(0x2E); 1060 EmitXmmRegisterOperand(a, b); 1061 } 1062 1063 1064 void X86Assembler::ucomisd(XmmRegister a, const Address& b) { 1065 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1066 EmitUint8(0x66); 1067 EmitUint8(0x0F); 1068 EmitUint8(0x2E); 1069 EmitOperand(a, b); 1070 } 1071 1072 1073 void X86Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { 1074 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1075 EmitUint8(0x66); 1076 EmitUint8(0x0F); 1077 EmitUint8(0x3A); 1078 EmitUint8(0x0B); 1079 EmitXmmRegisterOperand(dst, src); 1080 EmitUint8(imm.value()); 1081 } 1082 1083 1084 void X86Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { 1085 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1086 EmitUint8(0x66); 1087 EmitUint8(0x0F); 1088 EmitUint8(0x3A); 1089 EmitUint8(0x0A); 1090 EmitXmmRegisterOperand(dst, src); 1091 EmitUint8(imm.value()); 1092 } 1093 1094 1095 void X86Assembler::sqrtsd(XmmRegister dst, XmmRegister src) { 1096 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1097 EmitUint8(0xF2); 1098 EmitUint8(0x0F); 1099 EmitUint8(0x51); 1100 EmitXmmRegisterOperand(dst, src); 1101 } 1102 1103 1104 void X86Assembler::sqrtss(XmmRegister dst, XmmRegister src) { 1105 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1106 EmitUint8(0xF3); 1107 EmitUint8(0x0F); 1108 EmitUint8(0x51); 1109 EmitXmmRegisterOperand(dst, src); 1110 } 1111 1112 1113 void X86Assembler::xorpd(XmmRegister dst, const Address& src) { 1114 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1115 EmitUint8(0x66); 1116 EmitUint8(0x0F); 1117 EmitUint8(0x57); 1118 EmitOperand(dst, src); 1119 } 1120 1121 1122 void X86Assembler::xorpd(XmmRegister dst, XmmRegister src) { 1123 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1124 EmitUint8(0x66); 1125 EmitUint8(0x0F); 1126 EmitUint8(0x57); 1127 EmitXmmRegisterOperand(dst, src); 1128 } 1129 1130 1131 void X86Assembler::xorps(XmmRegister dst, const Address& src) { 1132 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1133 EmitUint8(0x0F); 1134 EmitUint8(0x57); 1135 EmitOperand(dst, src); 1136 } 1137 1138 1139 void X86Assembler::xorps(XmmRegister dst, XmmRegister src) { 1140 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1141 EmitUint8(0x0F); 1142 EmitUint8(0x57); 1143 EmitXmmRegisterOperand(dst, src); 1144 } 1145 1146 1147 void X86Assembler::pxor(XmmRegister dst, XmmRegister src) { 1148 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1149 EmitUint8(0x66); 1150 EmitUint8(0x0F); 1151 EmitUint8(0xEF); 1152 EmitXmmRegisterOperand(dst, src); 1153 } 1154 1155 1156 void X86Assembler::andpd(XmmRegister dst, XmmRegister src) { 1157 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1158 EmitUint8(0x66); 1159 EmitUint8(0x0F); 1160 EmitUint8(0x54); 1161 EmitXmmRegisterOperand(dst, src); 1162 } 1163 1164 1165 void X86Assembler::andpd(XmmRegister dst, const Address& src) { 1166 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1167 EmitUint8(0x66); 1168 EmitUint8(0x0F); 1169 EmitUint8(0x54); 1170 EmitOperand(dst, src); 1171 } 1172 1173 1174 void X86Assembler::andps(XmmRegister dst, XmmRegister src) { 1175 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1176 EmitUint8(0x0F); 1177 EmitUint8(0x54); 1178 EmitXmmRegisterOperand(dst, src); 1179 } 1180 1181 1182 void X86Assembler::andps(XmmRegister dst, const Address& src) { 1183 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1184 EmitUint8(0x0F); 1185 EmitUint8(0x54); 1186 EmitOperand(dst, src); 1187 } 1188 1189 1190 void X86Assembler::pand(XmmRegister dst, XmmRegister src) { 1191 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1192 EmitUint8(0x66); 1193 EmitUint8(0x0F); 1194 EmitUint8(0xDB); 1195 EmitXmmRegisterOperand(dst, src); 1196 } 1197 1198 1199 void X86Assembler::andnpd(XmmRegister dst, XmmRegister src) { 1200 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1201 EmitUint8(0x66); 1202 EmitUint8(0x0F); 1203 EmitUint8(0x55); 1204 EmitXmmRegisterOperand(dst, src); 1205 } 1206 1207 1208 void X86Assembler::andnps(XmmRegister dst, XmmRegister src) { 1209 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1210 EmitUint8(0x0F); 1211 EmitUint8(0x55); 1212 EmitXmmRegisterOperand(dst, src); 1213 } 1214 1215 1216 void X86Assembler::pandn(XmmRegister dst, XmmRegister src) { 1217 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1218 EmitUint8(0x66); 1219 EmitUint8(0x0F); 1220 EmitUint8(0xDF); 1221 EmitXmmRegisterOperand(dst, src); 1222 } 1223 1224 1225 void X86Assembler::orpd(XmmRegister dst, XmmRegister src) { 1226 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1227 EmitUint8(0x66); 1228 EmitUint8(0x0F); 1229 EmitUint8(0x56); 1230 EmitXmmRegisterOperand(dst, src); 1231 } 1232 1233 1234 void X86Assembler::orps(XmmRegister dst, XmmRegister src) { 1235 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1236 EmitUint8(0x0F); 1237 EmitUint8(0x56); 1238 EmitXmmRegisterOperand(dst, src); 1239 } 1240 1241 1242 void X86Assembler::por(XmmRegister dst, XmmRegister src) { 1243 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1244 EmitUint8(0x66); 1245 EmitUint8(0x0F); 1246 EmitUint8(0xEB); 1247 EmitXmmRegisterOperand(dst, src); 1248 } 1249 1250 1251 void X86Assembler::pavgb(XmmRegister dst, XmmRegister src) { 1252 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1253 EmitUint8(0x66); 1254 EmitUint8(0x0F); 1255 EmitUint8(0xE0); 1256 EmitXmmRegisterOperand(dst, src); 1257 } 1258 1259 1260 void X86Assembler::pavgw(XmmRegister dst, XmmRegister src) { 1261 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1262 EmitUint8(0x66); 1263 EmitUint8(0x0F); 1264 EmitUint8(0xE3); 1265 EmitXmmRegisterOperand(dst, src); 1266 } 1267 1268 1269 void X86Assembler::psadbw(XmmRegister dst, XmmRegister src) { 1270 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1271 EmitUint8(0x66); 1272 EmitUint8(0x0F); 1273 EmitUint8(0xF6); 1274 EmitXmmRegisterOperand(dst, src); 1275 } 1276 1277 1278 void X86Assembler::pmaddwd(XmmRegister dst, XmmRegister src) { 1279 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1280 EmitUint8(0x66); 1281 EmitUint8(0x0F); 1282 EmitUint8(0xF5); 1283 EmitXmmRegisterOperand(dst, src); 1284 } 1285 1286 1287 void X86Assembler::phaddw(XmmRegister dst, XmmRegister src) { 1288 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1289 EmitUint8(0x66); 1290 EmitUint8(0x0F); 1291 EmitUint8(0x38); 1292 EmitUint8(0x01); 1293 EmitXmmRegisterOperand(dst, src); 1294 } 1295 1296 1297 void X86Assembler::phaddd(XmmRegister dst, XmmRegister src) { 1298 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1299 EmitUint8(0x66); 1300 EmitUint8(0x0F); 1301 EmitUint8(0x38); 1302 EmitUint8(0x02); 1303 EmitXmmRegisterOperand(dst, src); 1304 } 1305 1306 1307 void X86Assembler::haddps(XmmRegister dst, XmmRegister src) { 1308 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1309 EmitUint8(0xF2); 1310 EmitUint8(0x0F); 1311 EmitUint8(0x7C); 1312 EmitXmmRegisterOperand(dst, src); 1313 } 1314 1315 1316 void X86Assembler::haddpd(XmmRegister dst, XmmRegister src) { 1317 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1318 EmitUint8(0x66); 1319 EmitUint8(0x0F); 1320 EmitUint8(0x7C); 1321 EmitXmmRegisterOperand(dst, src); 1322 } 1323 1324 1325 void X86Assembler::phsubw(XmmRegister dst, XmmRegister src) { 1326 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1327 EmitUint8(0x66); 1328 EmitUint8(0x0F); 1329 EmitUint8(0x38); 1330 EmitUint8(0x05); 1331 EmitXmmRegisterOperand(dst, src); 1332 } 1333 1334 1335 void X86Assembler::phsubd(XmmRegister dst, XmmRegister src) { 1336 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1337 EmitUint8(0x66); 1338 EmitUint8(0x0F); 1339 EmitUint8(0x38); 1340 EmitUint8(0x06); 1341 EmitXmmRegisterOperand(dst, src); 1342 } 1343 1344 1345 void X86Assembler::hsubps(XmmRegister dst, XmmRegister src) { 1346 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1347 EmitUint8(0xF2); 1348 EmitUint8(0x0F); 1349 EmitUint8(0x7D); 1350 EmitXmmRegisterOperand(dst, src); 1351 } 1352 1353 1354 void X86Assembler::hsubpd(XmmRegister dst, XmmRegister src) { 1355 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1356 EmitUint8(0x66); 1357 EmitUint8(0x0F); 1358 EmitUint8(0x7D); 1359 EmitXmmRegisterOperand(dst, src); 1360 } 1361 1362 1363 void X86Assembler::pminsb(XmmRegister dst, XmmRegister src) { 1364 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1365 EmitUint8(0x66); 1366 EmitUint8(0x0F); 1367 EmitUint8(0x38); 1368 EmitUint8(0x38); 1369 EmitXmmRegisterOperand(dst, src); 1370 } 1371 1372 void X86Assembler::pmaxsb(XmmRegister dst, XmmRegister src) { 1373 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1374 EmitUint8(0x66); 1375 EmitUint8(0x0F); 1376 EmitUint8(0x38); 1377 EmitUint8(0x3C); 1378 EmitXmmRegisterOperand(dst, src); 1379 } 1380 1381 void X86Assembler::pminsw(XmmRegister dst, XmmRegister src) { 1382 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1383 EmitUint8(0x66); 1384 EmitUint8(0x0F); 1385 EmitUint8(0xEA); 1386 EmitXmmRegisterOperand(dst, src); 1387 } 1388 1389 void X86Assembler::pmaxsw(XmmRegister dst, XmmRegister src) { 1390 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1391 EmitUint8(0x66); 1392 EmitUint8(0x0F); 1393 EmitUint8(0xEE); 1394 EmitXmmRegisterOperand(dst, src); 1395 } 1396 1397 void X86Assembler::pminsd(XmmRegister dst, XmmRegister src) { 1398 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1399 EmitUint8(0x66); 1400 EmitUint8(0x0F); 1401 EmitUint8(0x38); 1402 EmitUint8(0x39); 1403 EmitXmmRegisterOperand(dst, src); 1404 } 1405 1406 void X86Assembler::pmaxsd(XmmRegister dst, XmmRegister src) { 1407 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1408 EmitUint8(0x66); 1409 EmitUint8(0x0F); 1410 EmitUint8(0x38); 1411 EmitUint8(0x3D); 1412 EmitXmmRegisterOperand(dst, src); 1413 } 1414 1415 void X86Assembler::pminub(XmmRegister dst, XmmRegister src) { 1416 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1417 EmitUint8(0x66); 1418 EmitUint8(0x0F); 1419 EmitUint8(0xDA); 1420 EmitXmmRegisterOperand(dst, src); 1421 } 1422 1423 void X86Assembler::pmaxub(XmmRegister dst, XmmRegister src) { 1424 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1425 EmitUint8(0x66); 1426 EmitUint8(0x0F); 1427 EmitUint8(0xDE); 1428 EmitXmmRegisterOperand(dst, src); 1429 } 1430 1431 void X86Assembler::pminuw(XmmRegister dst, XmmRegister src) { 1432 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1433 EmitUint8(0x66); 1434 EmitUint8(0x0F); 1435 EmitUint8(0x38); 1436 EmitUint8(0x3A); 1437 EmitXmmRegisterOperand(dst, src); 1438 } 1439 1440 void X86Assembler::pmaxuw(XmmRegister dst, XmmRegister src) { 1441 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1442 EmitUint8(0x66); 1443 EmitUint8(0x0F); 1444 EmitUint8(0x38); 1445 EmitUint8(0x3E); 1446 EmitXmmRegisterOperand(dst, src); 1447 } 1448 1449 void X86Assembler::pminud(XmmRegister dst, XmmRegister src) { 1450 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1451 EmitUint8(0x66); 1452 EmitUint8(0x0F); 1453 EmitUint8(0x38); 1454 EmitUint8(0x3B); 1455 EmitXmmRegisterOperand(dst, src); 1456 } 1457 1458 void X86Assembler::pmaxud(XmmRegister dst, XmmRegister src) { 1459 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1460 EmitUint8(0x66); 1461 EmitUint8(0x0F); 1462 EmitUint8(0x38); 1463 EmitUint8(0x3F); 1464 EmitXmmRegisterOperand(dst, src); 1465 } 1466 1467 void X86Assembler::minps(XmmRegister dst, XmmRegister src) { 1468 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1469 EmitUint8(0x0F); 1470 EmitUint8(0x5D); 1471 EmitXmmRegisterOperand(dst, src); 1472 } 1473 1474 void X86Assembler::maxps(XmmRegister dst, XmmRegister src) { 1475 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1476 EmitUint8(0x0F); 1477 EmitUint8(0x5F); 1478 EmitXmmRegisterOperand(dst, src); 1479 } 1480 1481 void X86Assembler::minpd(XmmRegister dst, XmmRegister src) { 1482 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1483 EmitUint8(0x66); 1484 EmitUint8(0x0F); 1485 EmitUint8(0x5D); 1486 EmitXmmRegisterOperand(dst, src); 1487 } 1488 1489 void X86Assembler::maxpd(XmmRegister dst, XmmRegister src) { 1490 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1491 EmitUint8(0x66); 1492 EmitUint8(0x0F); 1493 EmitUint8(0x5F); 1494 EmitXmmRegisterOperand(dst, src); 1495 } 1496 1497 void X86Assembler::pcmpeqb(XmmRegister dst, XmmRegister src) { 1498 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1499 EmitUint8(0x66); 1500 EmitUint8(0x0F); 1501 EmitUint8(0x74); 1502 EmitXmmRegisterOperand(dst, src); 1503 } 1504 1505 1506 void X86Assembler::pcmpeqw(XmmRegister dst, XmmRegister src) { 1507 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1508 EmitUint8(0x66); 1509 EmitUint8(0x0F); 1510 EmitUint8(0x75); 1511 EmitXmmRegisterOperand(dst, src); 1512 } 1513 1514 1515 void X86Assembler::pcmpeqd(XmmRegister dst, XmmRegister src) { 1516 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1517 EmitUint8(0x66); 1518 EmitUint8(0x0F); 1519 EmitUint8(0x76); 1520 EmitXmmRegisterOperand(dst, src); 1521 } 1522 1523 1524 void X86Assembler::pcmpeqq(XmmRegister dst, XmmRegister src) { 1525 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1526 EmitUint8(0x66); 1527 EmitUint8(0x0F); 1528 EmitUint8(0x38); 1529 EmitUint8(0x29); 1530 EmitXmmRegisterOperand(dst, src); 1531 } 1532 1533 1534 void X86Assembler::pcmpgtb(XmmRegister dst, XmmRegister src) { 1535 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1536 EmitUint8(0x66); 1537 EmitUint8(0x0F); 1538 EmitUint8(0x64); 1539 EmitXmmRegisterOperand(dst, src); 1540 } 1541 1542 1543 void X86Assembler::pcmpgtw(XmmRegister dst, XmmRegister src) { 1544 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1545 EmitUint8(0x66); 1546 EmitUint8(0x0F); 1547 EmitUint8(0x65); 1548 EmitXmmRegisterOperand(dst, src); 1549 } 1550 1551 1552 void X86Assembler::pcmpgtd(XmmRegister dst, XmmRegister src) { 1553 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1554 EmitUint8(0x66); 1555 EmitUint8(0x0F); 1556 EmitUint8(0x66); 1557 EmitXmmRegisterOperand(dst, src); 1558 } 1559 1560 1561 void X86Assembler::pcmpgtq(XmmRegister dst, XmmRegister src) { 1562 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1563 EmitUint8(0x66); 1564 EmitUint8(0x0F); 1565 EmitUint8(0x38); 1566 EmitUint8(0x37); 1567 EmitXmmRegisterOperand(dst, src); 1568 } 1569 1570 1571 void X86Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { 1572 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1573 EmitUint8(0x66); 1574 EmitUint8(0x0F); 1575 EmitUint8(0xC6); 1576 EmitXmmRegisterOperand(dst, src); 1577 EmitUint8(imm.value()); 1578 } 1579 1580 1581 void X86Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) { 1582 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1583 EmitUint8(0x0F); 1584 EmitUint8(0xC6); 1585 EmitXmmRegisterOperand(dst, src); 1586 EmitUint8(imm.value()); 1587 } 1588 1589 1590 void X86Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) { 1591 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1592 EmitUint8(0x66); 1593 EmitUint8(0x0F); 1594 EmitUint8(0x70); 1595 EmitXmmRegisterOperand(dst, src); 1596 EmitUint8(imm.value()); 1597 } 1598 1599 1600 void X86Assembler::punpcklbw(XmmRegister dst, XmmRegister src) { 1601 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1602 EmitUint8(0x66); 1603 EmitUint8(0x0F); 1604 EmitUint8(0x60); 1605 EmitXmmRegisterOperand(dst, src); 1606 } 1607 1608 1609 void X86Assembler::punpcklwd(XmmRegister dst, XmmRegister src) { 1610 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1611 EmitUint8(0x66); 1612 EmitUint8(0x0F); 1613 EmitUint8(0x61); 1614 EmitXmmRegisterOperand(dst, src); 1615 } 1616 1617 1618 void X86Assembler::punpckldq(XmmRegister dst, XmmRegister src) { 1619 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1620 EmitUint8(0x66); 1621 EmitUint8(0x0F); 1622 EmitUint8(0x62); 1623 EmitXmmRegisterOperand(dst, src); 1624 } 1625 1626 1627 void X86Assembler::punpcklqdq(XmmRegister dst, XmmRegister src) { 1628 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1629 EmitUint8(0x66); 1630 EmitUint8(0x0F); 1631 EmitUint8(0x6C); 1632 EmitXmmRegisterOperand(dst, src); 1633 } 1634 1635 1636 void X86Assembler::punpckhbw(XmmRegister dst, XmmRegister src) { 1637 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1638 EmitUint8(0x66); 1639 EmitUint8(0x0F); 1640 EmitUint8(0x68); 1641 EmitXmmRegisterOperand(dst, src); 1642 } 1643 1644 1645 void X86Assembler::punpckhwd(XmmRegister dst, XmmRegister src) { 1646 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1647 EmitUint8(0x66); 1648 EmitUint8(0x0F); 1649 EmitUint8(0x69); 1650 EmitXmmRegisterOperand(dst, src); 1651 } 1652 1653 1654 void X86Assembler::punpckhdq(XmmRegister dst, XmmRegister src) { 1655 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1656 EmitUint8(0x66); 1657 EmitUint8(0x0F); 1658 EmitUint8(0x6A); 1659 EmitXmmRegisterOperand(dst, src); 1660 } 1661 1662 1663 void X86Assembler::punpckhqdq(XmmRegister dst, XmmRegister src) { 1664 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1665 EmitUint8(0x66); 1666 EmitUint8(0x0F); 1667 EmitUint8(0x6D); 1668 EmitXmmRegisterOperand(dst, src); 1669 } 1670 1671 1672 void X86Assembler::psllw(XmmRegister reg, const Immediate& shift_count) { 1673 DCHECK(shift_count.is_uint8()); 1674 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1675 EmitUint8(0x66); 1676 EmitUint8(0x0F); 1677 EmitUint8(0x71); 1678 EmitXmmRegisterOperand(6, reg); 1679 EmitUint8(shift_count.value()); 1680 } 1681 1682 1683 void X86Assembler::pslld(XmmRegister reg, const Immediate& shift_count) { 1684 DCHECK(shift_count.is_uint8()); 1685 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1686 EmitUint8(0x66); 1687 EmitUint8(0x0F); 1688 EmitUint8(0x72); 1689 EmitXmmRegisterOperand(6, reg); 1690 EmitUint8(shift_count.value()); 1691 } 1692 1693 1694 void X86Assembler::psllq(XmmRegister reg, const Immediate& shift_count) { 1695 DCHECK(shift_count.is_uint8()); 1696 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1697 EmitUint8(0x66); 1698 EmitUint8(0x0F); 1699 EmitUint8(0x73); 1700 EmitXmmRegisterOperand(6, reg); 1701 EmitUint8(shift_count.value()); 1702 } 1703 1704 1705 void X86Assembler::psraw(XmmRegister reg, const Immediate& shift_count) { 1706 DCHECK(shift_count.is_uint8()); 1707 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1708 EmitUint8(0x66); 1709 EmitUint8(0x0F); 1710 EmitUint8(0x71); 1711 EmitXmmRegisterOperand(4, reg); 1712 EmitUint8(shift_count.value()); 1713 } 1714 1715 1716 void X86Assembler::psrad(XmmRegister reg, const Immediate& shift_count) { 1717 DCHECK(shift_count.is_uint8()); 1718 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1719 EmitUint8(0x66); 1720 EmitUint8(0x0F); 1721 EmitUint8(0x72); 1722 EmitXmmRegisterOperand(4, reg); 1723 EmitUint8(shift_count.value()); 1724 } 1725 1726 1727 void X86Assembler::psrlw(XmmRegister reg, const Immediate& shift_count) { 1728 DCHECK(shift_count.is_uint8()); 1729 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1730 EmitUint8(0x66); 1731 EmitUint8(0x0F); 1732 EmitUint8(0x71); 1733 EmitXmmRegisterOperand(2, reg); 1734 EmitUint8(shift_count.value()); 1735 } 1736 1737 1738 void X86Assembler::psrld(XmmRegister reg, const Immediate& shift_count) { 1739 DCHECK(shift_count.is_uint8()); 1740 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1741 EmitUint8(0x66); 1742 EmitUint8(0x0F); 1743 EmitUint8(0x72); 1744 EmitXmmRegisterOperand(2, reg); 1745 EmitUint8(shift_count.value()); 1746 } 1747 1748 1749 void X86Assembler::psrlq(XmmRegister reg, const Immediate& shift_count) { 1750 DCHECK(shift_count.is_uint8()); 1751 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1752 EmitUint8(0x66); 1753 EmitUint8(0x0F); 1754 EmitUint8(0x73); 1755 EmitXmmRegisterOperand(2, reg); 1756 EmitUint8(shift_count.value()); 1757 } 1758 1759 1760 void X86Assembler::psrldq(XmmRegister reg, const Immediate& shift_count) { 1761 DCHECK(shift_count.is_uint8()); 1762 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1763 EmitUint8(0x66); 1764 EmitUint8(0x0F); 1765 EmitUint8(0x73); 1766 EmitXmmRegisterOperand(3, reg); 1767 EmitUint8(shift_count.value()); 1768 } 1769 1770 1771 void X86Assembler::fldl(const Address& src) { 1772 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1773 EmitUint8(0xDD); 1774 EmitOperand(0, src); 1775 } 1776 1777 1778 void X86Assembler::fstl(const Address& dst) { 1779 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1780 EmitUint8(0xDD); 1781 EmitOperand(2, dst); 1782 } 1783 1784 1785 void X86Assembler::fstpl(const Address& dst) { 1786 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1787 EmitUint8(0xDD); 1788 EmitOperand(3, dst); 1789 } 1790 1791 1792 void X86Assembler::fstsw() { 1793 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1794 EmitUint8(0x9B); 1795 EmitUint8(0xDF); 1796 EmitUint8(0xE0); 1797 } 1798 1799 1800 void X86Assembler::fnstcw(const Address& dst) { 1801 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1802 EmitUint8(0xD9); 1803 EmitOperand(7, dst); 1804 } 1805 1806 1807 void X86Assembler::fldcw(const Address& src) { 1808 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1809 EmitUint8(0xD9); 1810 EmitOperand(5, src); 1811 } 1812 1813 1814 void X86Assembler::fistpl(const Address& dst) { 1815 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1816 EmitUint8(0xDF); 1817 EmitOperand(7, dst); 1818 } 1819 1820 1821 void X86Assembler::fistps(const Address& dst) { 1822 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1823 EmitUint8(0xDB); 1824 EmitOperand(3, dst); 1825 } 1826 1827 1828 void X86Assembler::fildl(const Address& src) { 1829 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1830 EmitUint8(0xDF); 1831 EmitOperand(5, src); 1832 } 1833 1834 1835 void X86Assembler::filds(const Address& src) { 1836 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1837 EmitUint8(0xDB); 1838 EmitOperand(0, src); 1839 } 1840 1841 1842 void X86Assembler::fincstp() { 1843 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1844 EmitUint8(0xD9); 1845 EmitUint8(0xF7); 1846 } 1847 1848 1849 void X86Assembler::ffree(const Immediate& index) { 1850 CHECK_LT(index.value(), 7); 1851 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1852 EmitUint8(0xDD); 1853 EmitUint8(0xC0 + index.value()); 1854 } 1855 1856 1857 void X86Assembler::fsin() { 1858 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1859 EmitUint8(0xD9); 1860 EmitUint8(0xFE); 1861 } 1862 1863 1864 void X86Assembler::fcos() { 1865 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1866 EmitUint8(0xD9); 1867 EmitUint8(0xFF); 1868 } 1869 1870 1871 void X86Assembler::fptan() { 1872 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1873 EmitUint8(0xD9); 1874 EmitUint8(0xF2); 1875 } 1876 1877 1878 void X86Assembler::fucompp() { 1879 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1880 EmitUint8(0xDA); 1881 EmitUint8(0xE9); 1882 } 1883 1884 1885 void X86Assembler::fprem() { 1886 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1887 EmitUint8(0xD9); 1888 EmitUint8(0xF8); 1889 } 1890 1891 1892 void X86Assembler::xchgl(Register dst, Register src) { 1893 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1894 EmitUint8(0x87); 1895 EmitRegisterOperand(dst, src); 1896 } 1897 1898 1899 void X86Assembler::xchgl(Register reg, const Address& address) { 1900 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1901 EmitUint8(0x87); 1902 EmitOperand(reg, address); 1903 } 1904 1905 1906 void X86Assembler::cmpb(const Address& address, const Immediate& imm) { 1907 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1908 EmitUint8(0x80); 1909 EmitOperand(7, address); 1910 EmitUint8(imm.value() & 0xFF); 1911 } 1912 1913 1914 void X86Assembler::cmpw(const Address& address, const Immediate& imm) { 1915 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1916 EmitUint8(0x66); 1917 EmitComplex(7, address, imm, /* is_16_op */ true); 1918 } 1919 1920 1921 void X86Assembler::cmpl(Register reg, const Immediate& imm) { 1922 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1923 EmitComplex(7, Operand(reg), imm); 1924 } 1925 1926 1927 void X86Assembler::cmpl(Register reg0, Register reg1) { 1928 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1929 EmitUint8(0x3B); 1930 EmitOperand(reg0, Operand(reg1)); 1931 } 1932 1933 1934 void X86Assembler::cmpl(Register reg, const Address& address) { 1935 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1936 EmitUint8(0x3B); 1937 EmitOperand(reg, address); 1938 } 1939 1940 1941 void X86Assembler::addl(Register dst, Register src) { 1942 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1943 EmitUint8(0x03); 1944 EmitRegisterOperand(dst, src); 1945 } 1946 1947 1948 void X86Assembler::addl(Register reg, const Address& address) { 1949 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1950 EmitUint8(0x03); 1951 EmitOperand(reg, address); 1952 } 1953 1954 1955 void X86Assembler::cmpl(const Address& address, Register reg) { 1956 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1957 EmitUint8(0x39); 1958 EmitOperand(reg, address); 1959 } 1960 1961 1962 void X86Assembler::cmpl(const Address& address, const Immediate& imm) { 1963 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1964 EmitComplex(7, address, imm); 1965 } 1966 1967 1968 void X86Assembler::testl(Register reg1, Register reg2) { 1969 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1970 EmitUint8(0x85); 1971 EmitRegisterOperand(reg1, reg2); 1972 } 1973 1974 1975 void X86Assembler::testl(Register reg, const Address& address) { 1976 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1977 EmitUint8(0x85); 1978 EmitOperand(reg, address); 1979 } 1980 1981 1982 void X86Assembler::testl(Register reg, const Immediate& immediate) { 1983 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1984 // For registers that have a byte variant (EAX, EBX, ECX, and EDX) 1985 // we only test the byte register to keep the encoding short. 1986 if (immediate.is_uint8() && reg < 4) { 1987 // Use zero-extended 8-bit immediate. 1988 if (reg == EAX) { 1989 EmitUint8(0xA8); 1990 } else { 1991 EmitUint8(0xF6); 1992 EmitUint8(0xC0 + reg); 1993 } 1994 EmitUint8(immediate.value() & 0xFF); 1995 } else if (reg == EAX) { 1996 // Use short form if the destination is EAX. 1997 EmitUint8(0xA9); 1998 EmitImmediate(immediate); 1999 } else { 2000 EmitUint8(0xF7); 2001 EmitOperand(0, Operand(reg)); 2002 EmitImmediate(immediate); 2003 } 2004 } 2005 2006 2007 void X86Assembler::testb(const Address& dst, const Immediate& imm) { 2008 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2009 EmitUint8(0xF6); 2010 EmitOperand(EAX, dst); 2011 CHECK(imm.is_int8()); 2012 EmitUint8(imm.value() & 0xFF); 2013 } 2014 2015 2016 void X86Assembler::testl(const Address& dst, const Immediate& imm) { 2017 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2018 EmitUint8(0xF7); 2019 EmitOperand(0, dst); 2020 EmitImmediate(imm); 2021 } 2022 2023 2024 void X86Assembler::andl(Register dst, Register src) { 2025 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2026 EmitUint8(0x23); 2027 EmitOperand(dst, Operand(src)); 2028 } 2029 2030 2031 void X86Assembler::andl(Register reg, const Address& address) { 2032 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2033 EmitUint8(0x23); 2034 EmitOperand(reg, address); 2035 } 2036 2037 2038 void X86Assembler::andl(Register dst, const Immediate& imm) { 2039 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2040 EmitComplex(4, Operand(dst), imm); 2041 } 2042 2043 2044 void X86Assembler::orl(Register dst, Register src) { 2045 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2046 EmitUint8(0x0B); 2047 EmitOperand(dst, Operand(src)); 2048 } 2049 2050 2051 void X86Assembler::orl(Register reg, const Address& address) { 2052 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2053 EmitUint8(0x0B); 2054 EmitOperand(reg, address); 2055 } 2056 2057 2058 void X86Assembler::orl(Register dst, const Immediate& imm) { 2059 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2060 EmitComplex(1, Operand(dst), imm); 2061 } 2062 2063 2064 void X86Assembler::xorl(Register dst, Register src) { 2065 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2066 EmitUint8(0x33); 2067 EmitOperand(dst, Operand(src)); 2068 } 2069 2070 2071 void X86Assembler::xorl(Register reg, const Address& address) { 2072 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2073 EmitUint8(0x33); 2074 EmitOperand(reg, address); 2075 } 2076 2077 2078 void X86Assembler::xorl(Register dst, const Immediate& imm) { 2079 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2080 EmitComplex(6, Operand(dst), imm); 2081 } 2082 2083 2084 void X86Assembler::addl(Register reg, const Immediate& imm) { 2085 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2086 EmitComplex(0, Operand(reg), imm); 2087 } 2088 2089 2090 void X86Assembler::addl(const Address& address, Register reg) { 2091 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2092 EmitUint8(0x01); 2093 EmitOperand(reg, address); 2094 } 2095 2096 2097 void X86Assembler::addl(const Address& address, const Immediate& imm) { 2098 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2099 EmitComplex(0, address, imm); 2100 } 2101 2102 2103 void X86Assembler::addw(const Address& address, const Immediate& imm) { 2104 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2105 CHECK(imm.is_uint16() || imm.is_int16()) << imm.value(); 2106 EmitUint8(0x66); 2107 EmitComplex(0, address, imm, /* is_16_op */ true); 2108 } 2109 2110 2111 void X86Assembler::adcl(Register reg, const Immediate& imm) { 2112 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2113 EmitComplex(2, Operand(reg), imm); 2114 } 2115 2116 2117 void X86Assembler::adcl(Register dst, Register src) { 2118 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2119 EmitUint8(0x13); 2120 EmitOperand(dst, Operand(src)); 2121 } 2122 2123 2124 void X86Assembler::adcl(Register dst, const Address& address) { 2125 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2126 EmitUint8(0x13); 2127 EmitOperand(dst, address); 2128 } 2129 2130 2131 void X86Assembler::subl(Register dst, Register src) { 2132 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2133 EmitUint8(0x2B); 2134 EmitOperand(dst, Operand(src)); 2135 } 2136 2137 2138 void X86Assembler::subl(Register reg, const Immediate& imm) { 2139 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2140 EmitComplex(5, Operand(reg), imm); 2141 } 2142 2143 2144 void X86Assembler::subl(Register reg, const Address& address) { 2145 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2146 EmitUint8(0x2B); 2147 EmitOperand(reg, address); 2148 } 2149 2150 2151 void X86Assembler::subl(const Address& address, Register reg) { 2152 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2153 EmitUint8(0x29); 2154 EmitOperand(reg, address); 2155 } 2156 2157 2158 void X86Assembler::cdq() { 2159 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2160 EmitUint8(0x99); 2161 } 2162 2163 2164 void X86Assembler::idivl(Register reg) { 2165 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2166 EmitUint8(0xF7); 2167 EmitUint8(0xF8 | reg); 2168 } 2169 2170 2171 void X86Assembler::imull(Register dst, Register src) { 2172 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2173 EmitUint8(0x0F); 2174 EmitUint8(0xAF); 2175 EmitOperand(dst, Operand(src)); 2176 } 2177 2178 2179 void X86Assembler::imull(Register dst, Register src, const Immediate& imm) { 2180 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2181 // See whether imm can be represented as a sign-extended 8bit value. 2182 int32_t v32 = static_cast<int32_t>(imm.value()); 2183 if (IsInt<8>(v32)) { 2184 // Sign-extension works. 2185 EmitUint8(0x6B); 2186 EmitOperand(dst, Operand(src)); 2187 EmitUint8(static_cast<uint8_t>(v32 & 0xFF)); 2188 } else { 2189 // Not representable, use full immediate. 2190 EmitUint8(0x69); 2191 EmitOperand(dst, Operand(src)); 2192 EmitImmediate(imm); 2193 } 2194 } 2195 2196 2197 void X86Assembler::imull(Register reg, const Immediate& imm) { 2198 imull(reg, reg, imm); 2199 } 2200 2201 2202 void X86Assembler::imull(Register reg, const Address& address) { 2203 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2204 EmitUint8(0x0F); 2205 EmitUint8(0xAF); 2206 EmitOperand(reg, address); 2207 } 2208 2209 2210 void X86Assembler::imull(Register reg) { 2211 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2212 EmitUint8(0xF7); 2213 EmitOperand(5, Operand(reg)); 2214 } 2215 2216 2217 void X86Assembler::imull(const Address& address) { 2218 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2219 EmitUint8(0xF7); 2220 EmitOperand(5, address); 2221 } 2222 2223 2224 void X86Assembler::mull(Register reg) { 2225 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2226 EmitUint8(0xF7); 2227 EmitOperand(4, Operand(reg)); 2228 } 2229 2230 2231 void X86Assembler::mull(const Address& address) { 2232 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2233 EmitUint8(0xF7); 2234 EmitOperand(4, address); 2235 } 2236 2237 2238 void X86Assembler::sbbl(Register dst, Register src) { 2239 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2240 EmitUint8(0x1B); 2241 EmitOperand(dst, Operand(src)); 2242 } 2243 2244 2245 void X86Assembler::sbbl(Register reg, const Immediate& imm) { 2246 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2247 EmitComplex(3, Operand(reg), imm); 2248 } 2249 2250 2251 void X86Assembler::sbbl(Register dst, const Address& address) { 2252 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2253 EmitUint8(0x1B); 2254 EmitOperand(dst, address); 2255 } 2256 2257 2258 void X86Assembler::sbbl(const Address& address, Register src) { 2259 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2260 EmitUint8(0x19); 2261 EmitOperand(src, address); 2262 } 2263 2264 2265 void X86Assembler::incl(Register reg) { 2266 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2267 EmitUint8(0x40 + reg); 2268 } 2269 2270 2271 void X86Assembler::incl(const Address& address) { 2272 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2273 EmitUint8(0xFF); 2274 EmitOperand(0, address); 2275 } 2276 2277 2278 void X86Assembler::decl(Register reg) { 2279 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2280 EmitUint8(0x48 + reg); 2281 } 2282 2283 2284 void X86Assembler::decl(const Address& address) { 2285 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2286 EmitUint8(0xFF); 2287 EmitOperand(1, address); 2288 } 2289 2290 2291 void X86Assembler::shll(Register reg, const Immediate& imm) { 2292 EmitGenericShift(4, Operand(reg), imm); 2293 } 2294 2295 2296 void X86Assembler::shll(Register operand, Register shifter) { 2297 EmitGenericShift(4, Operand(operand), shifter); 2298 } 2299 2300 2301 void X86Assembler::shll(const Address& address, const Immediate& imm) { 2302 EmitGenericShift(4, address, imm); 2303 } 2304 2305 2306 void X86Assembler::shll(const Address& address, Register shifter) { 2307 EmitGenericShift(4, address, shifter); 2308 } 2309 2310 2311 void X86Assembler::shrl(Register reg, const Immediate& imm) { 2312 EmitGenericShift(5, Operand(reg), imm); 2313 } 2314 2315 2316 void X86Assembler::shrl(Register operand, Register shifter) { 2317 EmitGenericShift(5, Operand(operand), shifter); 2318 } 2319 2320 2321 void X86Assembler::shrl(const Address& address, const Immediate& imm) { 2322 EmitGenericShift(5, address, imm); 2323 } 2324 2325 2326 void X86Assembler::shrl(const Address& address, Register shifter) { 2327 EmitGenericShift(5, address, shifter); 2328 } 2329 2330 2331 void X86Assembler::sarl(Register reg, const Immediate& imm) { 2332 EmitGenericShift(7, Operand(reg), imm); 2333 } 2334 2335 2336 void X86Assembler::sarl(Register operand, Register shifter) { 2337 EmitGenericShift(7, Operand(operand), shifter); 2338 } 2339 2340 2341 void X86Assembler::sarl(const Address& address, const Immediate& imm) { 2342 EmitGenericShift(7, address, imm); 2343 } 2344 2345 2346 void X86Assembler::sarl(const Address& address, Register shifter) { 2347 EmitGenericShift(7, address, shifter); 2348 } 2349 2350 2351 void X86Assembler::shld(Register dst, Register src, Register shifter) { 2352 DCHECK_EQ(ECX, shifter); 2353 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2354 EmitUint8(0x0F); 2355 EmitUint8(0xA5); 2356 EmitRegisterOperand(src, dst); 2357 } 2358 2359 2360 void X86Assembler::shld(Register dst, Register src, const Immediate& imm) { 2361 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2362 EmitUint8(0x0F); 2363 EmitUint8(0xA4); 2364 EmitRegisterOperand(src, dst); 2365 EmitUint8(imm.value() & 0xFF); 2366 } 2367 2368 2369 void X86Assembler::shrd(Register dst, Register src, Register shifter) { 2370 DCHECK_EQ(ECX, shifter); 2371 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2372 EmitUint8(0x0F); 2373 EmitUint8(0xAD); 2374 EmitRegisterOperand(src, dst); 2375 } 2376 2377 2378 void X86Assembler::shrd(Register dst, Register src, const Immediate& imm) { 2379 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2380 EmitUint8(0x0F); 2381 EmitUint8(0xAC); 2382 EmitRegisterOperand(src, dst); 2383 EmitUint8(imm.value() & 0xFF); 2384 } 2385 2386 2387 void X86Assembler::roll(Register reg, const Immediate& imm) { 2388 EmitGenericShift(0, Operand(reg), imm); 2389 } 2390 2391 2392 void X86Assembler::roll(Register operand, Register shifter) { 2393 EmitGenericShift(0, Operand(operand), shifter); 2394 } 2395 2396 2397 void X86Assembler::rorl(Register reg, const Immediate& imm) { 2398 EmitGenericShift(1, Operand(reg), imm); 2399 } 2400 2401 2402 void X86Assembler::rorl(Register operand, Register shifter) { 2403 EmitGenericShift(1, Operand(operand), shifter); 2404 } 2405 2406 2407 void X86Assembler::negl(Register reg) { 2408 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2409 EmitUint8(0xF7); 2410 EmitOperand(3, Operand(reg)); 2411 } 2412 2413 2414 void X86Assembler::notl(Register reg) { 2415 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2416 EmitUint8(0xF7); 2417 EmitUint8(0xD0 | reg); 2418 } 2419 2420 2421 void X86Assembler::enter(const Immediate& imm) { 2422 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2423 EmitUint8(0xC8); 2424 CHECK(imm.is_uint16()); 2425 EmitUint8(imm.value() & 0xFF); 2426 EmitUint8((imm.value() >> 8) & 0xFF); 2427 EmitUint8(0x00); 2428 } 2429 2430 2431 void X86Assembler::leave() { 2432 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2433 EmitUint8(0xC9); 2434 } 2435 2436 2437 void X86Assembler::ret() { 2438 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2439 EmitUint8(0xC3); 2440 } 2441 2442 2443 void X86Assembler::ret(const Immediate& imm) { 2444 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2445 EmitUint8(0xC2); 2446 CHECK(imm.is_uint16()); 2447 EmitUint8(imm.value() & 0xFF); 2448 EmitUint8((imm.value() >> 8) & 0xFF); 2449 } 2450 2451 2452 2453 void X86Assembler::nop() { 2454 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2455 EmitUint8(0x90); 2456 } 2457 2458 2459 void X86Assembler::int3() { 2460 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2461 EmitUint8(0xCC); 2462 } 2463 2464 2465 void X86Assembler::hlt() { 2466 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2467 EmitUint8(0xF4); 2468 } 2469 2470 2471 void X86Assembler::j(Condition condition, Label* label) { 2472 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2473 if (label->IsBound()) { 2474 static const int kShortSize = 2; 2475 static const int kLongSize = 6; 2476 int offset = label->Position() - buffer_.Size(); 2477 CHECK_LE(offset, 0); 2478 if (IsInt<8>(offset - kShortSize)) { 2479 EmitUint8(0x70 + condition); 2480 EmitUint8((offset - kShortSize) & 0xFF); 2481 } else { 2482 EmitUint8(0x0F); 2483 EmitUint8(0x80 + condition); 2484 EmitInt32(offset - kLongSize); 2485 } 2486 } else { 2487 EmitUint8(0x0F); 2488 EmitUint8(0x80 + condition); 2489 EmitLabelLink(label); 2490 } 2491 } 2492 2493 2494 void X86Assembler::j(Condition condition, NearLabel* label) { 2495 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2496 if (label->IsBound()) { 2497 static const int kShortSize = 2; 2498 int offset = label->Position() - buffer_.Size(); 2499 CHECK_LE(offset, 0); 2500 CHECK(IsInt<8>(offset - kShortSize)); 2501 EmitUint8(0x70 + condition); 2502 EmitUint8((offset - kShortSize) & 0xFF); 2503 } else { 2504 EmitUint8(0x70 + condition); 2505 EmitLabelLink(label); 2506 } 2507 } 2508 2509 2510 void X86Assembler::jecxz(NearLabel* label) { 2511 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2512 if (label->IsBound()) { 2513 static const int kShortSize = 2; 2514 int offset = label->Position() - buffer_.Size(); 2515 CHECK_LE(offset, 0); 2516 CHECK(IsInt<8>(offset - kShortSize)); 2517 EmitUint8(0xE3); 2518 EmitUint8((offset - kShortSize) & 0xFF); 2519 } else { 2520 EmitUint8(0xE3); 2521 EmitLabelLink(label); 2522 } 2523 } 2524 2525 2526 void X86Assembler::jmp(Register reg) { 2527 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2528 EmitUint8(0xFF); 2529 EmitRegisterOperand(4, reg); 2530 } 2531 2532 void X86Assembler::jmp(const Address& address) { 2533 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2534 EmitUint8(0xFF); 2535 EmitOperand(4, address); 2536 } 2537 2538 void X86Assembler::jmp(Label* label) { 2539 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2540 if (label->IsBound()) { 2541 static const int kShortSize = 2; 2542 static const int kLongSize = 5; 2543 int offset = label->Position() - buffer_.Size(); 2544 CHECK_LE(offset, 0); 2545 if (IsInt<8>(offset - kShortSize)) { 2546 EmitUint8(0xEB); 2547 EmitUint8((offset - kShortSize) & 0xFF); 2548 } else { 2549 EmitUint8(0xE9); 2550 EmitInt32(offset - kLongSize); 2551 } 2552 } else { 2553 EmitUint8(0xE9); 2554 EmitLabelLink(label); 2555 } 2556 } 2557 2558 2559 void X86Assembler::jmp(NearLabel* label) { 2560 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2561 if (label->IsBound()) { 2562 static const int kShortSize = 2; 2563 int offset = label->Position() - buffer_.Size(); 2564 CHECK_LE(offset, 0); 2565 CHECK(IsInt<8>(offset - kShortSize)); 2566 EmitUint8(0xEB); 2567 EmitUint8((offset - kShortSize) & 0xFF); 2568 } else { 2569 EmitUint8(0xEB); 2570 EmitLabelLink(label); 2571 } 2572 } 2573 2574 2575 void X86Assembler::repne_scasb() { 2576 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2577 EmitUint8(0xF2); 2578 EmitUint8(0xAE); 2579 } 2580 2581 2582 void X86Assembler::repne_scasw() { 2583 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2584 EmitUint8(0x66); 2585 EmitUint8(0xF2); 2586 EmitUint8(0xAF); 2587 } 2588 2589 2590 void X86Assembler::repe_cmpsb() { 2591 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2592 EmitUint8(0xF2); 2593 EmitUint8(0xA6); 2594 } 2595 2596 2597 void X86Assembler::repe_cmpsw() { 2598 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2599 EmitUint8(0x66); 2600 EmitUint8(0xF3); 2601 EmitUint8(0xA7); 2602 } 2603 2604 2605 void X86Assembler::repe_cmpsl() { 2606 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2607 EmitUint8(0xF3); 2608 EmitUint8(0xA7); 2609 } 2610 2611 2612 void X86Assembler::rep_movsb() { 2613 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2614 EmitUint8(0xF3); 2615 EmitUint8(0xA4); 2616 } 2617 2618 2619 void X86Assembler::rep_movsw() { 2620 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2621 EmitUint8(0x66); 2622 EmitUint8(0xF3); 2623 EmitUint8(0xA5); 2624 } 2625 2626 2627 X86Assembler* X86Assembler::lock() { 2628 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2629 EmitUint8(0xF0); 2630 return this; 2631 } 2632 2633 2634 void X86Assembler::cmpxchgl(const Address& address, Register reg) { 2635 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2636 EmitUint8(0x0F); 2637 EmitUint8(0xB1); 2638 EmitOperand(reg, address); 2639 } 2640 2641 2642 void X86Assembler::cmpxchg8b(const Address& address) { 2643 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2644 EmitUint8(0x0F); 2645 EmitUint8(0xC7); 2646 EmitOperand(1, address); 2647 } 2648 2649 2650 void X86Assembler::mfence() { 2651 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2652 EmitUint8(0x0F); 2653 EmitUint8(0xAE); 2654 EmitUint8(0xF0); 2655 } 2656 2657 X86Assembler* X86Assembler::fs() { 2658 // TODO: fs is a prefix and not an instruction 2659 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2660 EmitUint8(0x64); 2661 return this; 2662 } 2663 2664 X86Assembler* X86Assembler::gs() { 2665 // TODO: fs is a prefix and not an instruction 2666 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2667 EmitUint8(0x65); 2668 return this; 2669 } 2670 2671 void X86Assembler::AddImmediate(Register reg, const Immediate& imm) { 2672 int value = imm.value(); 2673 if (value > 0) { 2674 if (value == 1) { 2675 incl(reg); 2676 } else if (value != 0) { 2677 addl(reg, imm); 2678 } 2679 } else if (value < 0) { 2680 value = -value; 2681 if (value == 1) { 2682 decl(reg); 2683 } else if (value != 0) { 2684 subl(reg, Immediate(value)); 2685 } 2686 } 2687 } 2688 2689 2690 void X86Assembler::LoadLongConstant(XmmRegister dst, int64_t value) { 2691 // TODO: Need to have a code constants table. 2692 pushl(Immediate(High32Bits(value))); 2693 pushl(Immediate(Low32Bits(value))); 2694 movsd(dst, Address(ESP, 0)); 2695 addl(ESP, Immediate(2 * sizeof(int32_t))); 2696 } 2697 2698 2699 void X86Assembler::LoadDoubleConstant(XmmRegister dst, double value) { 2700 // TODO: Need to have a code constants table. 2701 int64_t constant = bit_cast<int64_t, double>(value); 2702 LoadLongConstant(dst, constant); 2703 } 2704 2705 2706 void X86Assembler::Align(int alignment, int offset) { 2707 CHECK(IsPowerOfTwo(alignment)); 2708 // Emit nop instruction until the real position is aligned. 2709 while (((offset + buffer_.GetPosition()) & (alignment-1)) != 0) { 2710 nop(); 2711 } 2712 } 2713 2714 2715 void X86Assembler::Bind(Label* label) { 2716 int bound = buffer_.Size(); 2717 CHECK(!label->IsBound()); // Labels can only be bound once. 2718 while (label->IsLinked()) { 2719 int position = label->LinkPosition(); 2720 int next = buffer_.Load<int32_t>(position); 2721 buffer_.Store<int32_t>(position, bound - (position + 4)); 2722 label->position_ = next; 2723 } 2724 label->BindTo(bound); 2725 } 2726 2727 2728 void X86Assembler::Bind(NearLabel* label) { 2729 int bound = buffer_.Size(); 2730 CHECK(!label->IsBound()); // Labels can only be bound once. 2731 while (label->IsLinked()) { 2732 int position = label->LinkPosition(); 2733 uint8_t delta = buffer_.Load<uint8_t>(position); 2734 int offset = bound - (position + 1); 2735 CHECK(IsInt<8>(offset)); 2736 buffer_.Store<int8_t>(position, offset); 2737 label->position_ = delta != 0u ? label->position_ - delta : 0; 2738 } 2739 label->BindTo(bound); 2740 } 2741 2742 2743 void X86Assembler::EmitOperand(int reg_or_opcode, const Operand& operand) { 2744 CHECK_GE(reg_or_opcode, 0); 2745 CHECK_LT(reg_or_opcode, 8); 2746 const int length = operand.length_; 2747 CHECK_GT(length, 0); 2748 // Emit the ModRM byte updated with the given reg value. 2749 CHECK_EQ(operand.encoding_[0] & 0x38, 0); 2750 EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3)); 2751 // Emit the rest of the encoded operand. 2752 for (int i = 1; i < length; i++) { 2753 EmitUint8(operand.encoding_[i]); 2754 } 2755 AssemblerFixup* fixup = operand.GetFixup(); 2756 if (fixup != nullptr) { 2757 EmitFixup(fixup); 2758 } 2759 } 2760 2761 2762 void X86Assembler::EmitImmediate(const Immediate& imm, bool is_16_op) { 2763 if (is_16_op) { 2764 EmitUint8(imm.value() & 0xFF); 2765 EmitUint8(imm.value() >> 8); 2766 } else { 2767 EmitInt32(imm.value()); 2768 } 2769 } 2770 2771 2772 void X86Assembler::EmitComplex(int reg_or_opcode, 2773 const Operand& operand, 2774 const Immediate& immediate, 2775 bool is_16_op) { 2776 CHECK_GE(reg_or_opcode, 0); 2777 CHECK_LT(reg_or_opcode, 8); 2778 if (immediate.is_int8()) { 2779 // Use sign-extended 8-bit immediate. 2780 EmitUint8(0x83); 2781 EmitOperand(reg_or_opcode, operand); 2782 EmitUint8(immediate.value() & 0xFF); 2783 } else if (operand.IsRegister(EAX)) { 2784 // Use short form if the destination is eax. 2785 EmitUint8(0x05 + (reg_or_opcode << 3)); 2786 EmitImmediate(immediate, is_16_op); 2787 } else { 2788 EmitUint8(0x81); 2789 EmitOperand(reg_or_opcode, operand); 2790 EmitImmediate(immediate, is_16_op); 2791 } 2792 } 2793 2794 2795 void X86Assembler::EmitLabel(Label* label, int instruction_size) { 2796 if (label->IsBound()) { 2797 int offset = label->Position() - buffer_.Size(); 2798 CHECK_LE(offset, 0); 2799 EmitInt32(offset - instruction_size); 2800 } else { 2801 EmitLabelLink(label); 2802 } 2803 } 2804 2805 2806 void X86Assembler::EmitLabelLink(Label* label) { 2807 CHECK(!label->IsBound()); 2808 int position = buffer_.Size(); 2809 EmitInt32(label->position_); 2810 label->LinkTo(position); 2811 } 2812 2813 2814 void X86Assembler::EmitLabelLink(NearLabel* label) { 2815 CHECK(!label->IsBound()); 2816 int position = buffer_.Size(); 2817 if (label->IsLinked()) { 2818 // Save the delta in the byte that we have to play with. 2819 uint32_t delta = position - label->LinkPosition(); 2820 CHECK(IsUint<8>(delta)); 2821 EmitUint8(delta & 0xFF); 2822 } else { 2823 EmitUint8(0); 2824 } 2825 label->LinkTo(position); 2826 } 2827 2828 2829 void X86Assembler::EmitGenericShift(int reg_or_opcode, 2830 const Operand& operand, 2831 const Immediate& imm) { 2832 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2833 CHECK(imm.is_int8()); 2834 if (imm.value() == 1) { 2835 EmitUint8(0xD1); 2836 EmitOperand(reg_or_opcode, operand); 2837 } else { 2838 EmitUint8(0xC1); 2839 EmitOperand(reg_or_opcode, operand); 2840 EmitUint8(imm.value() & 0xFF); 2841 } 2842 } 2843 2844 2845 void X86Assembler::EmitGenericShift(int reg_or_opcode, 2846 const Operand& operand, 2847 Register shifter) { 2848 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2849 CHECK_EQ(shifter, ECX); 2850 EmitUint8(0xD3); 2851 EmitOperand(reg_or_opcode, operand); 2852 } 2853 2854 void X86Assembler::AddConstantArea() { 2855 ArrayRef<const int32_t> area = constant_area_.GetBuffer(); 2856 // Generate the data for the literal area. 2857 for (size_t i = 0, e = area.size(); i < e; i++) { 2858 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2859 EmitInt32(area[i]); 2860 } 2861 } 2862 2863 size_t ConstantArea::AppendInt32(int32_t v) { 2864 size_t result = buffer_.size() * elem_size_; 2865 buffer_.push_back(v); 2866 return result; 2867 } 2868 2869 size_t ConstantArea::AddInt32(int32_t v) { 2870 for (size_t i = 0, e = buffer_.size(); i < e; i++) { 2871 if (v == buffer_[i]) { 2872 return i * elem_size_; 2873 } 2874 } 2875 2876 // Didn't match anything. 2877 return AppendInt32(v); 2878 } 2879 2880 size_t ConstantArea::AddInt64(int64_t v) { 2881 int32_t v_low = Low32Bits(v); 2882 int32_t v_high = High32Bits(v); 2883 if (buffer_.size() > 1) { 2884 // Ensure we don't pass the end of the buffer. 2885 for (size_t i = 0, e = buffer_.size() - 1; i < e; i++) { 2886 if (v_low == buffer_[i] && v_high == buffer_[i + 1]) { 2887 return i * elem_size_; 2888 } 2889 } 2890 } 2891 2892 // Didn't match anything. 2893 size_t result = buffer_.size() * elem_size_; 2894 buffer_.push_back(v_low); 2895 buffer_.push_back(v_high); 2896 return result; 2897 } 2898 2899 size_t ConstantArea::AddDouble(double v) { 2900 // Treat the value as a 64-bit integer value. 2901 return AddInt64(bit_cast<int64_t, double>(v)); 2902 } 2903 2904 size_t ConstantArea::AddFloat(float v) { 2905 // Treat the value as a 32-bit integer value. 2906 return AddInt32(bit_cast<int32_t, float>(v)); 2907 } 2908 2909 } // namespace x86 2910 } // namespace art 2911