1 /* 2 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #ifndef __PLAT_ARM_H__ 7 #define __PLAT_ARM_H__ 8 9 #include <arm_xlat_tables.h> 10 #include <bakery_lock.h> 11 #include <cassert.h> 12 #include <cpu_data.h> 13 #include <stdint.h> 14 #include <utils_def.h> 15 16 /******************************************************************************* 17 * Forward declarations 18 ******************************************************************************/ 19 struct bl31_params; 20 struct meminfo; 21 struct image_info; 22 23 #define ARM_CASSERT_MMAP \ 24 CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \ 25 <= MAX_MMAP_REGIONS, \ 26 assert_max_mmap_regions); 27 28 /* 29 * Utility functions common to ARM standard platforms 30 */ 31 void arm_setup_page_tables(uintptr_t total_base, 32 size_t total_size, 33 uintptr_t code_start, 34 uintptr_t code_limit, 35 uintptr_t rodata_start, 36 uintptr_t rodata_limit 37 #if USE_COHERENT_MEM 38 , uintptr_t coh_start, 39 uintptr_t coh_limit 40 #endif 41 ); 42 43 #if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) 44 /* 45 * Use this macro to instantiate lock before it is used in below 46 * arm_lock_xxx() macros 47 */ 48 #define ARM_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(arm_lock) 49 #define ARM_LOCK_GET_INSTANCE (&arm_lock) 50 /* 51 * These are wrapper macros to the Coherent Memory Bakery Lock API. 52 */ 53 #define arm_lock_init() bakery_lock_init(&arm_lock) 54 #define arm_lock_get() bakery_lock_get(&arm_lock) 55 #define arm_lock_release() bakery_lock_release(&arm_lock) 56 57 #else 58 59 /* 60 * Empty macros for all other BL stages other than BL31 and BL32 61 */ 62 #define ARM_INSTANTIATE_LOCK static int arm_lock __unused 63 #define ARM_LOCK_GET_INSTANCE 0 64 #define arm_lock_init() 65 #define arm_lock_get() 66 #define arm_lock_release() 67 68 #endif /* defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) */ 69 70 #if ARM_RECOM_STATE_ID_ENC 71 /* 72 * Macros used to parse state information from State-ID if it is using the 73 * recommended encoding for State-ID. 74 */ 75 #define ARM_LOCAL_PSTATE_WIDTH 4 76 #define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1) 77 78 /* Macros to construct the composite power state */ 79 80 /* Make composite power state parameter till power level 0 */ 81 #if PSCI_EXTENDED_STATE_ID 82 83 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ 84 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT)) 85 #else 86 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ 87 (((lvl0_state) << PSTATE_ID_SHIFT) | \ 88 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \ 89 ((type) << PSTATE_TYPE_SHIFT)) 90 #endif /* __PSCI_EXTENDED_STATE_ID__ */ 91 92 /* Make composite power state parameter till power level 1 */ 93 #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ 94 (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \ 95 arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type)) 96 97 /* Make composite power state parameter till power level 2 */ 98 #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ 99 (((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \ 100 arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type)) 101 102 #endif /* __ARM_RECOM_STATE_ID_ENC__ */ 103 104 /* ARM State switch error codes */ 105 #define STATE_SW_E_PARAM (-2) 106 #define STATE_SW_E_DENIED (-3) 107 108 /* IO storage utility functions */ 109 void arm_io_setup(void); 110 111 /* Security utility functions */ 112 void arm_tzc400_setup(void); 113 struct tzc_dmc500_driver_data; 114 void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data); 115 116 /* Systimer utility function */ 117 void arm_configure_sys_timer(void); 118 119 /* PM utility functions */ 120 int arm_validate_power_state(unsigned int power_state, 121 psci_power_state_t *req_state); 122 int arm_validate_ns_entrypoint(uintptr_t entrypoint); 123 void arm_system_pwr_domain_save(void); 124 void arm_system_pwr_domain_resume(void); 125 void arm_program_trusted_mailbox(uintptr_t address); 126 int arm_psci_read_mem_protect(int *val); 127 int arm_nor_psci_write_mem_protect(int val); 128 void arm_nor_psci_do_mem_protect(void); 129 int arm_psci_mem_protect_chk(uintptr_t base, u_register_t length); 130 131 /* Topology utility function */ 132 int arm_check_mpidr(u_register_t mpidr); 133 134 /* BL1 utility functions */ 135 void arm_bl1_early_platform_setup(void); 136 void arm_bl1_platform_setup(void); 137 void arm_bl1_plat_arch_setup(void); 138 139 /* BL2 utility functions */ 140 void arm_bl2_early_platform_setup(struct meminfo *mem_layout); 141 void arm_bl2_platform_setup(void); 142 void arm_bl2_plat_arch_setup(void); 143 uint32_t arm_get_spsr_for_bl32_entry(void); 144 uint32_t arm_get_spsr_for_bl33_entry(void); 145 int arm_bl2_handle_post_image_load(unsigned int image_id); 146 147 /* BL2U utility functions */ 148 void arm_bl2u_early_platform_setup(struct meminfo *mem_layout, 149 void *plat_info); 150 void arm_bl2u_platform_setup(void); 151 void arm_bl2u_plat_arch_setup(void); 152 153 /* BL31 utility functions */ 154 #if LOAD_IMAGE_V2 155 void arm_bl31_early_platform_setup(void *from_bl2, 156 void *plat_params_from_bl2); 157 #else 158 void arm_bl31_early_platform_setup(struct bl31_params *from_bl2, 159 void *plat_params_from_bl2); 160 #endif /* LOAD_IMAGE_V2 */ 161 void arm_bl31_platform_setup(void); 162 void arm_bl31_plat_runtime_setup(void); 163 void arm_bl31_plat_arch_setup(void); 164 165 /* TSP utility functions */ 166 void arm_tsp_early_platform_setup(void); 167 168 /* SP_MIN utility functions */ 169 void arm_sp_min_early_platform_setup(void *from_bl2, 170 void *plat_params_from_bl2); 171 void arm_sp_min_plat_runtime_setup(void); 172 173 /* FIP TOC validity check */ 174 int arm_io_is_toc_valid(void); 175 176 /* 177 * Mandatory functions required in ARM standard platforms 178 */ 179 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr); 180 void plat_arm_gic_driver_init(void); 181 void plat_arm_gic_init(void); 182 void plat_arm_gic_cpuif_enable(void); 183 void plat_arm_gic_cpuif_disable(void); 184 void plat_arm_gic_redistif_on(void); 185 void plat_arm_gic_redistif_off(void); 186 void plat_arm_gic_pcpu_init(void); 187 void plat_arm_gic_save(void); 188 void plat_arm_gic_resume(void); 189 void plat_arm_security_setup(void); 190 void plat_arm_pwrc_setup(void); 191 void plat_arm_interconnect_init(void); 192 void plat_arm_interconnect_enter_coherency(void); 193 void plat_arm_interconnect_exit_coherency(void); 194 195 #if ARM_PLAT_MT 196 unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr); 197 #endif 198 199 #if LOAD_IMAGE_V2 200 /* 201 * This function is called after loading SCP_BL2 image and it is used to perform 202 * any platform-specific actions required to handle the SCP firmware. 203 */ 204 int plat_arm_bl2_handle_scp_bl2(struct image_info *scp_bl2_image_info); 205 #endif 206 207 /* 208 * Optional functions required in ARM standard platforms 209 */ 210 void plat_arm_io_setup(void); 211 int plat_arm_get_alt_image_source( 212 unsigned int image_id, 213 uintptr_t *dev_handle, 214 uintptr_t *image_spec); 215 unsigned int plat_arm_calc_core_pos(u_register_t mpidr); 216 const mmap_region_t *plat_arm_get_mmap(void); 217 218 /* Allow platform to override psci_pm_ops during runtime */ 219 const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops); 220 221 /* Execution state switch in ARM platforms */ 222 int arm_execution_state_switch(unsigned int smc_fid, 223 uint32_t pc_hi, 224 uint32_t pc_lo, 225 uint32_t cookie_hi, 226 uint32_t cookie_lo, 227 void *handle); 228 229 /* Disable Statistical Profiling Extensions helper */ 230 void arm_disable_spe(void); 231 232 #endif /* __PLAT_ARM_H__ */ 233
