1 # 2 # Copyright (c) 2011-2013, ARM Limited. All rights reserved. 3 # 4 # This program and the accompanying materials 5 # are licensed and made available under the terms and conditions of the BSD License 6 # which accompanies this distribution. The full text of the license may be found at 7 # http://opensource.org/licenses/bsd-license.php 8 # 9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11 # 12 # 13 14 #include <AsmMacroIoLib.h> 15 #include <Library/ArmLib.h> 16 17 #include <Chipset/ArmCortexA9.h> 18 19 ASM_FUNC(ArmPlatformPeiBootAction) 20 bx lr 21 22 # IN None 23 # OUT r0 = SCU Base Address 24 ASM_FUNC(ArmGetScuBaseAddress) 25 # Read Configuration Base Address Register. ArmCBar cannot be called to get 26 # the Configuration BAR as a stack is not necessary setup. The SCU is at the 27 # offset 0x0000 from the Private Memory Region. 28 mrc p15, 4, r0, c15, c0, 0 29 bx lr 30 31 //UINTN 32 //ArmPlatformGetPrimaryCoreMpId ( 33 // VOID 34 // ); 35 ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) 36 MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore)) 37 bx lr 38 39 # IN None 40 # OUT r0 = number of cores present in the system 41 ASM_FUNC(ArmGetCpuCountPerCluster) 42 stmfd SP!, {r1-r2} 43 44 # Read CP15 MIDR 45 mrc p15, 0, r1, c0, c0, 0 46 47 # Check if the CPU is A15 48 mov r1, r1, LSR #4 49 MOV32 (r0, ARM_CPU_TYPE_MASK) 50 and r1, r1, r0 51 52 MOV32 (r0, ARM_CPU_TYPE_A15) 53 cmp r1, r0 54 beq _Read_cp15_reg 55 56 _CPU_is_not_A15: 57 mov r2, lr @ Save link register 58 bl ArmGetScuBaseAddress @ Read SCU Base Address 59 mov lr, r2 @ Restore link register val 60 ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] @ Read SCU Config reg to get CPU count 61 b _Return 62 63 _Read_cp15_reg: 64 mrc p15, 1, r0, c9, c0, 2 @ Read C9 register of CP15 to get CPU count 65 lsr r0, #24 66 67 _Return: 68 and r0, r0, #3 69 # Add '1' to the number of CPU on the Cluster 70 add r0, r0, #1 71 ldmfd SP!, {r1-r2} 72 bx lr 73 74 //UINTN 75 //ArmPlatformIsPrimaryCore ( 76 // IN UINTN MpId 77 // ); 78 ASM_FUNC(ArmPlatformIsPrimaryCore) 79 MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) 80 and r0, r0, r1 81 MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore)) 82 cmp r0, r1 83 moveq r0, #1 84 movne r0, #0 85 bx lr 86 87 //UINTN 88 //ArmPlatformGetCorePosition ( 89 // IN UINTN MpId 90 // ); 91 ASM_FUNC(ArmPlatformGetCorePosition) 92 and r1, r0, #ARM_CORE_MASK 93 and r0, r0, #ARM_CLUSTER_MASK 94 add r0, r1, r0, LSR #7 95 bx lr 96 97 ASM_FUNCTION_REMOVE_IF_UNREFERENCED 98
