1 //===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 /// \file 11 /// \brief Provides AMDGPU specific target descriptions. 12 // 13 //===----------------------------------------------------------------------===// 14 // 15 16 #ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCTARGETDESC_H 17 #define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCTARGETDESC_H 18 19 #include "llvm/Support/DataTypes.h" 20 21 namespace llvm { 22 class StringRef; 23 class MCAsmBackend; 24 class MCCodeEmitter; 25 class MCContext; 26 class MCInstrInfo; 27 class MCObjectWriter; 28 class MCRegisterInfo; 29 class MCSubtargetInfo; 30 class Target; 31 class Triple; 32 class raw_pwrite_stream; 33 class raw_ostream; 34 35 extern Target TheAMDGPUTarget; 36 extern Target TheGCNTarget; 37 38 MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII, 39 const MCRegisterInfo &MRI, 40 MCContext &Ctx); 41 42 MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII, 43 const MCRegisterInfo &MRI, 44 MCContext &Ctx); 45 46 MCAsmBackend *createAMDGPUAsmBackend(const Target &T, const MCRegisterInfo &MRI, 47 const Triple &TT, StringRef CPU); 48 49 MCObjectWriter *createAMDGPUELFObjectWriter(bool Is64Bit, 50 bool HasRelocationAddend, 51 raw_pwrite_stream &OS); 52 } // End llvm namespace 53 54 #define GET_REGINFO_ENUM 55 #include "AMDGPUGenRegisterInfo.inc" 56 57 #define GET_INSTRINFO_ENUM 58 #include "AMDGPUGenInstrInfo.inc" 59 60 #define GET_SUBTARGETINFO_ENUM 61 #include "AMDGPUGenSubtargetInfo.inc" 62 63 #endif 64
