1 //===-- HexagonMCCodeEmitter.h - Hexagon Target Descriptions ----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// \brief Definition for classes that emit Hexagon machine code from MCInsts 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #ifndef HEXAGONMCCODEEMITTER_H 16 #define HEXAGONMCCODEEMITTER_H 17 18 #include "llvm/MC/MCCodeEmitter.h" 19 #include "llvm/MC/MCExpr.h" 20 #include "llvm/MC/MCInst.h" 21 #include "llvm/MC/MCInstrInfo.h" 22 #include "llvm/MC/MCRegisterInfo.h" 23 #include "llvm/MC/MCSubtargetInfo.h" 24 #include "llvm/Support/raw_ostream.h" 25 26 namespace llvm { 27 28 class HexagonMCCodeEmitter : public MCCodeEmitter { 29 MCContext &MCT; 30 MCInstrInfo const &MCII; 31 std::unique_ptr<unsigned> Addend; 32 std::unique_ptr<bool> Extended; 33 std::unique_ptr<MCInst const *> CurrentBundle; 34 35 // helper routine for getMachineOpValue() 36 unsigned getExprOpValue(const MCInst &MI, const MCOperand &MO, 37 const MCExpr *ME, SmallVectorImpl<MCFixup> &Fixups, 38 const MCSubtargetInfo &STI) const; 39 40 public: 41 HexagonMCCodeEmitter(MCInstrInfo const &aMII, MCContext &aMCT); 42 43 // Return parse bits for instruction `MCI' inside bundle `MCB' 44 uint32_t parseBits(size_t Instruction, size_t Last, MCInst const &MCB, 45 MCInst const &MCI) const; 46 47 void encodeInstruction(MCInst const &MI, raw_ostream &OS, 48 SmallVectorImpl<MCFixup> &Fixups, 49 MCSubtargetInfo const &STI) const override; 50 51 void EncodeSingleInstruction(const MCInst &MI, raw_ostream &OS, 52 SmallVectorImpl<MCFixup> &Fixups, 53 const MCSubtargetInfo &STI, 54 uint32_t Parse, size_t Index) const; 55 56 // \brief TableGen'erated function for getting the 57 // binary encoding for an instruction. 58 uint64_t getBinaryCodeForInstr(MCInst const &MI, 59 SmallVectorImpl<MCFixup> &Fixups, 60 MCSubtargetInfo const &STI) const; 61 62 /// \brief Return binary encoding of operand. 63 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO, 64 SmallVectorImpl<MCFixup> &Fixups, 65 MCSubtargetInfo const &STI) const; 66 }; // class HexagonMCCodeEmitter 67 68 } // namespace llvm 69 70 #endif /* HEXAGONMCCODEEMITTER_H */ 71
