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      1 //===-- SparcSchedule.td - Describe the Sparc Itineries ----*- tablegen -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 //
     11 //===----------------------------------------------------------------------===//
     12 
     13 def IIC_iu_or_fpu_instr : InstrItinClass;
     14 def IIC_iu_instr : InstrItinClass;
     15 def IIC_fpu_normal_instr : InstrItinClass;
     16 def IIC_fpu_fast_instr : InstrItinClass;
     17 def IIC_jmp_or_call : InstrItinClass;
     18 def IIC_ldd : InstrItinClass;
     19 def IIC_st : InstrItinClass;
     20 def IIC_std : InstrItinClass;
     21 def IIC_iu_smul : InstrItinClass;
     22 def IIC_iu_umul : InstrItinClass;
     23 def IIC_iu_div : InstrItinClass;
     24 def IIC_ticc : InstrItinClass;
     25 def IIC_ldstub : InstrItinClass;
     26 def IIC_fpu_muls : InstrItinClass;
     27 def IIC_fpu_muld : InstrItinClass;
     28 def IIC_fpu_divs : InstrItinClass;
     29 def IIC_fpu_divd : InstrItinClass;
     30 def IIC_fpu_sqrts : InstrItinClass;
     31 def IIC_fpu_sqrtd : InstrItinClass;
     32 def IIC_fpu_abs : InstrItinClass;
     33 def IIC_fpu_movs : InstrItinClass;
     34 def IIC_fpu_negs : InstrItinClass;
     35 def IIC_smac_umac : InstrItinClass;
     36 def IIC_fpu_stod : InstrItinClass;
     37 
     38 def LEONIU : FuncUnit; // integer unit
     39 def LEONFPU : FuncUnit; // floating-point unit
     40 
     41 // Ref: http://www.atmel.com/Images/doc4226.pdf
     42 
     43 def LEON2Itineraries : ProcessorItineraries<
     44 [LEONIU, LEONFPU], [], [
     45   InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
     46   InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>,
     47   InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,
     48   InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,
     49   InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,
     50   InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,
     51   InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,
     52   InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
     53   InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [5, 1]>,
     54   InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [5, 1]>,
     55   InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>,
     56   InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [4, 1]>,
     57   InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
     58   InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [16, 1]>,
     59   InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [21, 1]>,
     60   InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [20, 1]>,
     61   InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [36, 1]>,
     62   InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [37, 1]>,
     63   InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [65, 1]>,
     64   InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
     65   InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
     66   InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
     67   InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [2, 1]>
     68 ]>;
     69 
     70 def LEON3Itineraries : ProcessorItineraries<
     71 [LEONIU, LEONFPU], [], [
     72   InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
     73   InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>,
     74   InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,
     75   InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [4, 1]>,
     76   InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
     77   InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,
     78   InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [4, 1]>,
     79   InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>,
     80   InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [1, 1]>,
     81   InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [4, 1]>,
     82   InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>,
     83   InstrItinData<IIC_smac_umac, [InstrStage<1, [LEONIU]>], [2, 1]>,
     84   InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>,
     85   InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
     86   InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [4, 1]>,
     87   InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [4, 1]>,
     88   InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [16, 1]>,
     89   InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [17, 1]>,
     90   InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [24, 1]>,
     91   InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [25, 1]>,
     92   InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
     93   InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
     94   InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
     95   InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [4, 1]>
     96 ]>;
     97 
     98 def LEON4Itineraries : ProcessorItineraries<
     99 [LEONIU, LEONFPU], [], [
    100   InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
    101   InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>,
    102   InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,
    103   InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [4, 1]>,
    104   InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
    105   InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
    106   InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
    107   InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
    108   InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [1, 1]>,
    109   InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [4, 1]>,
    110   InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>,
    111   InstrItinData<IIC_smac_umac, [InstrStage<1, [LEONIU]>], [2, 1]>,
    112   InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>,
    113   InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
    114   InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [4, 1]>,
    115   InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [4, 1]>,
    116   InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [16, 1]>,
    117   InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [17, 1]>,
    118   InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [24, 1]>,
    119   InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [25, 1]>,
    120   InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
    121   InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
    122   InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
    123   InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [4, 1]>
    124 ]>;
    125