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      1 //===-- WebAssemblyTargetTransformInfo.cpp - WebAssembly-specific TTI -----===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 ///
     10 /// \file
     11 /// \brief This file defines the WebAssembly-specific TargetTransformInfo
     12 /// implementation.
     13 ///
     14 //===----------------------------------------------------------------------===//
     15 
     16 #include "WebAssemblyTargetTransformInfo.h"
     17 #include "llvm/Support/Debug.h"
     18 #include "llvm/Target/CostTable.h"
     19 using namespace llvm;
     20 
     21 #define DEBUG_TYPE "wasmtti"
     22 
     23 TargetTransformInfo::PopcntSupportKind
     24 WebAssemblyTTIImpl::getPopcntSupport(unsigned TyWidth) const {
     25   assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
     26   return TargetTransformInfo::PSK_FastHardware;
     27 }
     28 
     29 unsigned WebAssemblyTTIImpl::getNumberOfRegisters(bool Vector) {
     30   unsigned Result = BaseT::getNumberOfRegisters(Vector);
     31 
     32   // For SIMD, use at least 16 registers, as a rough guess.
     33   if (Vector)
     34     Result = std::max(Result, 16u);
     35 
     36   return Result;
     37 }
     38 
     39 unsigned WebAssemblyTTIImpl::getRegisterBitWidth(bool Vector) {
     40   if (Vector && getST()->hasSIMD128())
     41     return 128;
     42 
     43   return 64;
     44 }
     45 
     46 unsigned WebAssemblyTTIImpl::getArithmeticInstrCost(
     47     unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info,
     48     TTI::OperandValueKind Opd2Info, TTI::OperandValueProperties Opd1PropInfo,
     49     TTI::OperandValueProperties Opd2PropInfo) {
     50 
     51   unsigned Cost = BasicTTIImplBase<WebAssemblyTTIImpl>::getArithmeticInstrCost(
     52       Opcode, Ty, Opd1Info, Opd2Info, Opd1PropInfo, Opd2PropInfo);
     53 
     54   if (VectorType *VTy = dyn_cast<VectorType>(Ty)) {
     55     switch (Opcode) {
     56     case Instruction::LShr:
     57     case Instruction::AShr:
     58     case Instruction::Shl:
     59       // SIMD128's shifts currently only accept a scalar shift count. For each
     60       // element, we'll need to extract, op, insert. The following is a rough
     61       // approxmation.
     62       if (Opd2Info != TTI::OK_UniformValue &&
     63           Opd2Info != TTI::OK_UniformConstantValue)
     64         Cost = VTy->getNumElements() *
     65                (TargetTransformInfo::TCC_Basic +
     66                 getArithmeticInstrCost(Opcode, VTy->getElementType()) +
     67                 TargetTransformInfo::TCC_Basic);
     68       break;
     69     }
     70   }
     71   return Cost;
     72 }
     73 
     74 unsigned WebAssemblyTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
     75                                                 unsigned Index) {
     76   unsigned Cost = BasicTTIImplBase::getVectorInstrCost(Opcode, Val, Index);
     77 
     78   // SIMD128's insert/extract currently only take constant indices.
     79   if (Index == -1u)
     80     return Cost + 25 * TargetTransformInfo::TCC_Expensive;
     81 
     82   return Cost;
     83 }
     84