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      1 /*
      2  * Mesa 3-D graphics library
      3  *
      4  * Copyright (C) 2012-2013 LunarG, Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included
     14  * in all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
     22  * DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors:
     25  *    Chia-I Wu <olv (at) lunarg.com>
     26  */
     27 
     28 #include "pipe/p_state.h"
     29 #include "os/os_misc.h"
     30 #include "util/u_format_s3tc.h"
     31 #include "vl/vl_decoder.h"
     32 #include "vl/vl_video_buffer.h"
     33 #include "genhw/genhw.h" /* for GEN6_REG_TIMESTAMP */
     34 #include "core/intel_winsys.h"
     35 
     36 #include "ilo_context.h"
     37 #include "ilo_format.h"
     38 #include "ilo_resource.h"
     39 #include "ilo_transfer.h" /* for ILO_TRANSFER_MAP_BUFFER_ALIGNMENT */
     40 #include "ilo_public.h"
     41 #include "ilo_screen.h"
     42 
     43 struct pipe_fence_handle {
     44    struct pipe_reference reference;
     45    struct intel_bo *seqno_bo;
     46 };
     47 
     48 static float
     49 ilo_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
     50 {
     51    switch (param) {
     52    case PIPE_CAPF_MAX_LINE_WIDTH:
     53       /* in U3.7, defined in 3DSTATE_SF */
     54       return 7.0f;
     55    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
     56       /* line width minus one, which is reserved for AA region */
     57       return 6.0f;
     58    case PIPE_CAPF_MAX_POINT_WIDTH:
     59       /* in U8.3, defined in 3DSTATE_SF */
     60       return 255.0f;
     61    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
     62       /* same as point width, as we ignore rasterizer->point_smooth */
     63       return 255.0f;
     64    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
     65       /* [2.0, 16.0], defined in SAMPLER_STATE */
     66       return 16.0f;
     67    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
     68       /* [-16.0, 16.0), defined in SAMPLER_STATE */
     69       return 15.0f;
     70    case PIPE_CAPF_GUARD_BAND_LEFT:
     71    case PIPE_CAPF_GUARD_BAND_TOP:
     72    case PIPE_CAPF_GUARD_BAND_RIGHT:
     73    case PIPE_CAPF_GUARD_BAND_BOTTOM:
     74       /* what are these for? */
     75       return 0.0f;
     76 
     77    default:
     78       return 0.0f;
     79    }
     80 }
     81 
     82 static int
     83 ilo_get_shader_param(struct pipe_screen *screen, unsigned shader,
     84                      enum pipe_shader_cap param)
     85 {
     86    switch (shader) {
     87    case PIPE_SHADER_FRAGMENT:
     88    case PIPE_SHADER_VERTEX:
     89    case PIPE_SHADER_GEOMETRY:
     90       break;
     91    default:
     92       return 0;
     93    }
     94 
     95    switch (param) {
     96    /* the limits are copied from the classic driver */
     97    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
     98       return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 16384;
     99    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
    100       return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 0;
    101    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
    102       return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 0;
    103    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
    104       return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 0;
    105    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
    106       return UINT_MAX;
    107    case PIPE_SHADER_CAP_MAX_INPUTS:
    108    case PIPE_SHADER_CAP_MAX_OUTPUTS:
    109       /* this is limited by how many attributes SF can remap */
    110       return 16;
    111    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
    112       return 1024 * sizeof(float[4]);
    113    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
    114       return ILO_MAX_CONST_BUFFERS;
    115    case PIPE_SHADER_CAP_MAX_TEMPS:
    116       return 256;
    117    case PIPE_SHADER_CAP_MAX_PREDS:
    118       return 0;
    119    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
    120       return 1;
    121    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
    122       return 0;
    123    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
    124       return 0;
    125    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
    126       return (shader == PIPE_SHADER_FRAGMENT) ? 0 : 1;
    127    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
    128       return 1;
    129    case PIPE_SHADER_CAP_SUBROUTINES:
    130       return 0;
    131    case PIPE_SHADER_CAP_INTEGERS:
    132       return 1;
    133    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
    134       return ILO_MAX_SAMPLERS;
    135    case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
    136       return ILO_MAX_SAMPLER_VIEWS;
    137    case PIPE_SHADER_CAP_PREFERRED_IR:
    138       return PIPE_SHADER_IR_TGSI;
    139    case PIPE_SHADER_CAP_SUPPORTED_IRS:
    140       return 0;
    141    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
    142       return 1;
    143    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
    144       return 32;
    145 
    146    default:
    147       return 0;
    148    }
    149 }
    150 
    151 static int
    152 ilo_get_video_param(struct pipe_screen *screen,
    153                     enum pipe_video_profile profile,
    154                     enum pipe_video_entrypoint entrypoint,
    155                     enum pipe_video_cap param)
    156 {
    157    switch (param) {
    158    case PIPE_VIDEO_CAP_SUPPORTED:
    159       return vl_profile_supported(screen, profile, entrypoint);
    160    case PIPE_VIDEO_CAP_NPOT_TEXTURES:
    161       return 1;
    162    case PIPE_VIDEO_CAP_MAX_WIDTH:
    163    case PIPE_VIDEO_CAP_MAX_HEIGHT:
    164       return vl_video_buffer_max_size(screen);
    165    case PIPE_VIDEO_CAP_PREFERED_FORMAT:
    166       return PIPE_FORMAT_NV12;
    167    case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
    168       return 1;
    169    case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
    170       return 1;
    171    case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
    172       return 0;
    173    case PIPE_VIDEO_CAP_MAX_LEVEL:
    174       return vl_level_supported(screen, profile);
    175    default:
    176       return 0;
    177    }
    178 }
    179 
    180 static int
    181 ilo_get_compute_param(struct pipe_screen *screen,
    182                       enum pipe_shader_ir ir_type,
    183                       enum pipe_compute_cap param,
    184                       void *ret)
    185 {
    186    struct ilo_screen *is = ilo_screen(screen);
    187    union {
    188       const char *ir_target;
    189       uint64_t grid_dimension;
    190       uint64_t max_grid_size[3];
    191       uint64_t max_block_size[3];
    192       uint64_t max_threads_per_block;
    193       uint64_t max_global_size;
    194       uint64_t max_local_size;
    195       uint64_t max_private_size;
    196       uint64_t max_input_size;
    197       uint64_t max_mem_alloc_size;
    198       uint32_t max_clock_frequency;
    199       uint32_t max_compute_units;
    200       uint32_t images_supported;
    201       uint32_t subgroup_size;
    202       uint32_t address_bits;
    203    } val;
    204    const void *ptr;
    205    int size;
    206 
    207    switch (param) {
    208    case PIPE_COMPUTE_CAP_IR_TARGET:
    209       val.ir_target = "ilog";
    210 
    211       ptr = val.ir_target;
    212       size = strlen(val.ir_target) + 1;
    213       break;
    214    case PIPE_COMPUTE_CAP_GRID_DIMENSION:
    215       val.grid_dimension = ARRAY_SIZE(val.max_grid_size);
    216 
    217       ptr = &val.grid_dimension;
    218       size = sizeof(val.grid_dimension);
    219       break;
    220    case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
    221       val.max_grid_size[0] = 0xffffffffu;
    222       val.max_grid_size[1] = 0xffffffffu;
    223       val.max_grid_size[2] = 0xffffffffu;
    224 
    225       ptr = &val.max_grid_size;
    226       size = sizeof(val.max_grid_size);
    227       break;
    228    case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
    229       val.max_block_size[0] = 1024;
    230       val.max_block_size[1] = 1024;
    231       val.max_block_size[2] = 1024;
    232 
    233       ptr = &val.max_block_size;
    234       size = sizeof(val.max_block_size);
    235       break;
    236 
    237    case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
    238       val.max_threads_per_block = 1024;
    239 
    240       ptr = &val.max_threads_per_block;
    241       size = sizeof(val.max_threads_per_block);
    242       break;
    243    case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
    244       /* \see ilo_max_resource_size */
    245       val.max_global_size = 1u << 31;
    246 
    247       ptr = &val.max_global_size;
    248       size = sizeof(val.max_global_size);
    249       break;
    250    case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
    251       /* Shared Local Memory Size of INTERFACE_DESCRIPTOR_DATA */
    252       val.max_local_size = 64 * 1024;
    253 
    254       ptr = &val.max_local_size;
    255       size = sizeof(val.max_local_size);
    256       break;
    257    case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
    258       /* scratch size */
    259       val.max_private_size = 12 * 1024;
    260 
    261       ptr = &val.max_private_size;
    262       size = sizeof(val.max_private_size);
    263       break;
    264    case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
    265       val.max_input_size = 1024;
    266 
    267       ptr = &val.max_input_size;
    268       size = sizeof(val.max_input_size);
    269       break;
    270    case PIPE_COMPUTE_CAP_ADDRESS_BITS:
    271       val.address_bits = 32;
    272       ptr = &val.address_bits;
    273       size = sizeof(val.address_bits);
    274       break;
    275    case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
    276       val.max_mem_alloc_size = 1u << 31;
    277 
    278       ptr = &val.max_mem_alloc_size;
    279       size = sizeof(val.max_mem_alloc_size);
    280       break;
    281    case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
    282       val.max_clock_frequency = 1000;
    283 
    284       ptr = &val.max_clock_frequency;
    285       size = sizeof(val.max_clock_frequency);
    286       break;
    287    case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
    288       val.max_compute_units = is->dev.eu_count;
    289 
    290       ptr = &val.max_compute_units;
    291       size = sizeof(val.max_compute_units);
    292       break;
    293    case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
    294       val.images_supported = 1;
    295 
    296       ptr = &val.images_supported;
    297       size = sizeof(val.images_supported);
    298       break;
    299    case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
    300       /* best case is actually SIMD32 */
    301       val.subgroup_size = 16;
    302 
    303       ptr = &val.subgroup_size;
    304       size = sizeof(val.subgroup_size);
    305       break;
    306    case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
    307       /* fallthrough */
    308    default:
    309       ptr = NULL;
    310       size = 0;
    311       break;
    312    }
    313 
    314    if (ret)
    315       memcpy(ret, ptr, size);
    316 
    317    return size;
    318 }
    319 
    320 static int
    321 ilo_get_param(struct pipe_screen *screen, enum pipe_cap param)
    322 {
    323    struct ilo_screen *is = ilo_screen(screen);
    324 
    325    switch (param) {
    326    case PIPE_CAP_NPOT_TEXTURES:
    327    case PIPE_CAP_TWO_SIDED_STENCIL:
    328       return true;
    329    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
    330       return 0; /* TODO */
    331    case PIPE_CAP_ANISOTROPIC_FILTER:
    332    case PIPE_CAP_POINT_SPRITE:
    333       return true;
    334    case PIPE_CAP_MAX_RENDER_TARGETS:
    335       return ILO_MAX_DRAW_BUFFERS;
    336    case PIPE_CAP_OCCLUSION_QUERY:
    337    case PIPE_CAP_QUERY_TIME_ELAPSED:
    338    case PIPE_CAP_TEXTURE_SHADOW_MAP:
    339    case PIPE_CAP_TEXTURE_SWIZZLE: /* must be supported for shadow map */
    340       return true;
    341    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
    342       /*
    343        * As defined in SURFACE_STATE, we have
    344        *
    345        *           Max WxHxD for 2D and CUBE     Max WxHxD for 3D
    346        *  GEN6           8192x8192x512            2048x2048x2048
    347        *  GEN7         16384x16384x2048           2048x2048x2048
    348        */
    349       return (ilo_dev_gen(&is->dev) >= ILO_GEN(7)) ? 15 : 14;
    350    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
    351       return 12;
    352    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
    353       return (ilo_dev_gen(&is->dev) >= ILO_GEN(7)) ? 15 : 14;
    354    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
    355       return false;
    356    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
    357    case PIPE_CAP_SM3:
    358       return true;
    359    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
    360       if (ilo_dev_gen(&is->dev) >= ILO_GEN(7) && !is->dev.has_gen7_sol_reset)
    361          return 0;
    362       return ILO_MAX_SO_BUFFERS;
    363    case PIPE_CAP_PRIMITIVE_RESTART:
    364       return true;
    365    case PIPE_CAP_INDEP_BLEND_ENABLE:
    366    case PIPE_CAP_INDEP_BLEND_FUNC:
    367       return true;
    368    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
    369       return (ilo_dev_gen(&is->dev) >= ILO_GEN(7.5)) ? 2048 : 512;
    370    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
    371    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
    372    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
    373    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
    374    case PIPE_CAP_DEPTH_CLIP_DISABLE:
    375       return true;
    376    case PIPE_CAP_SHADER_STENCIL_EXPORT:
    377       return false;
    378    case PIPE_CAP_TGSI_INSTANCEID:
    379    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
    380       return true;
    381    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
    382       return false;
    383    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
    384       return true;
    385    case PIPE_CAP_SEAMLESS_CUBE_MAP:
    386    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
    387       return true;
    388    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
    389    case PIPE_CAP_MIN_TEXEL_OFFSET:
    390       return -8;
    391    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
    392    case PIPE_CAP_MAX_TEXEL_OFFSET:
    393       return 7;
    394    case PIPE_CAP_CONDITIONAL_RENDER:
    395    case PIPE_CAP_TEXTURE_BARRIER:
    396       return true;
    397    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
    398       return ILO_MAX_SO_BINDINGS / ILO_MAX_SO_BUFFERS;
    399    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
    400       return ILO_MAX_SO_BINDINGS;
    401    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
    402    case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
    403       if (ilo_dev_gen(&is->dev) >= ILO_GEN(7))
    404          return is->dev.has_gen7_sol_reset;
    405       else
    406          return false; /* TODO */
    407    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
    408       return false;
    409    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
    410       return true;
    411    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
    412       return false;
    413    case PIPE_CAP_GLSL_FEATURE_LEVEL:
    414       return 140;
    415    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
    416    case PIPE_CAP_USER_VERTEX_BUFFERS:
    417       return false;
    418    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
    419    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
    420    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
    421       return false;
    422    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
    423       return 2048;
    424    case PIPE_CAP_COMPUTE:
    425       return false; /* TODO */
    426    case PIPE_CAP_USER_INDEX_BUFFERS:
    427    case PIPE_CAP_USER_CONSTANT_BUFFERS:
    428       return true;
    429    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
    430       /* imposed by OWord (Dual) Block Read */
    431       return 16;
    432    case PIPE_CAP_START_INSTANCE:
    433       return true;
    434    case PIPE_CAP_QUERY_TIMESTAMP:
    435       return is->dev.has_timestamp;
    436    case PIPE_CAP_TEXTURE_MULTISAMPLE:
    437       return false; /* TODO */
    438    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
    439       return ILO_TRANSFER_MAP_BUFFER_ALIGNMENT;
    440    case PIPE_CAP_CUBE_MAP_ARRAY:
    441    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
    442       return true;
    443    case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
    444       return 0;
    445    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
    446       return 1;
    447    case PIPE_CAP_TGSI_TEXCOORD:
    448       return false;
    449    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
    450    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
    451       return true;
    452    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
    453       return 0;
    454    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
    455       /* a GEN6_SURFTYPE_BUFFER can have up to 2^27 elements */
    456       return 1 << 27;
    457    case PIPE_CAP_MAX_VIEWPORTS:
    458       return ILO_MAX_VIEWPORTS;
    459    case PIPE_CAP_ENDIANNESS:
    460       return PIPE_ENDIAN_LITTLE;
    461    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
    462    case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
    463       return true;
    464    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
    465    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
    466    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
    467    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
    468    case PIPE_CAP_TEXTURE_GATHER_SM5:
    469       return 0;
    470    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
    471    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
    472    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
    473       return true;
    474    case PIPE_CAP_FAKE_SW_MSAA:
    475    case PIPE_CAP_TEXTURE_QUERY_LOD:
    476    case PIPE_CAP_SAMPLE_SHADING:
    477    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
    478    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
    479    case PIPE_CAP_MAX_VERTEX_STREAMS:
    480    case PIPE_CAP_DRAW_INDIRECT:
    481    case PIPE_CAP_MULTI_DRAW_INDIRECT:
    482    case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
    483    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
    484    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
    485    case PIPE_CAP_SAMPLER_VIEW_TARGET:
    486    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
    487    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
    488    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
    489    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
    490    case PIPE_CAP_DEPTH_BOUNDS_TEST:
    491    case PIPE_CAP_TGSI_TXQS:
    492    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
    493    case PIPE_CAP_SHAREABLE_SHADERS:
    494    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
    495    case PIPE_CAP_CLEAR_TEXTURE:
    496    case PIPE_CAP_DRAW_PARAMETERS:
    497    case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
    498    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
    499    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
    500    case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
    501    case PIPE_CAP_INVALIDATE_BUFFER:
    502    case PIPE_CAP_GENERATE_MIPMAP:
    503    case PIPE_CAP_STRING_MARKER:
    504    case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
    505    case PIPE_CAP_QUERY_BUFFER_OBJECT:
    506    case PIPE_CAP_QUERY_MEMORY_INFO:
    507    case PIPE_CAP_PCI_GROUP:
    508    case PIPE_CAP_PCI_BUS:
    509    case PIPE_CAP_PCI_DEVICE:
    510    case PIPE_CAP_PCI_FUNCTION:
    511    case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
    512    case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
    513    case PIPE_CAP_CULL_DISTANCE:
    514    case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
    515    case PIPE_CAP_TGSI_VOTE:
    516    case PIPE_CAP_MAX_WINDOW_RECTANGLES:
    517    case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
    518    case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
    519    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
    520    case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
    521    case PIPE_CAP_NATIVE_FENCE_FD:
    522    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
    523    case PIPE_CAP_TGSI_FS_FBFETCH:
    524       return 0;
    525 
    526    case PIPE_CAP_VENDOR_ID:
    527       return 0x8086;
    528    case PIPE_CAP_DEVICE_ID:
    529       return is->dev.devid;
    530    case PIPE_CAP_ACCELERATED:
    531       return true;
    532    case PIPE_CAP_VIDEO_MEMORY: {
    533       /* Once a batch uses more than 75% of the maximum mappable size, we
    534        * assume that there's some fragmentation, and we start doing extra
    535        * flushing, etc.  That's the big cliff apps will care about.
    536        */
    537       const uint64_t gpu_memory = is->dev.aperture_total * 3 / 4;
    538       uint64_t system_memory;
    539 
    540       if (!os_get_total_physical_memory(&system_memory))
    541          return 0;
    542 
    543       return (int) (MIN2(gpu_memory, system_memory) >> 20);
    544    }
    545    case PIPE_CAP_UMA:
    546       return true;
    547    case PIPE_CAP_CLIP_HALFZ:
    548       return true;
    549    case PIPE_CAP_VERTEXID_NOBASE:
    550       return false;
    551    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
    552       return true;
    553 
    554    default:
    555       return 0;
    556    }
    557 }
    558 
    559 static const char *
    560 ilo_get_vendor(struct pipe_screen *screen)
    561 {
    562    return "LunarG, Inc.";
    563 }
    564 
    565 static const char *
    566 ilo_get_device_vendor(struct pipe_screen *screen)
    567 {
    568    return "Intel";
    569 }
    570 
    571 static const char *
    572 ilo_get_name(struct pipe_screen *screen)
    573 {
    574    struct ilo_screen *is = ilo_screen(screen);
    575    const char *chipset = NULL;
    576 
    577    if (gen_is_chv(is->dev.devid)) {
    578       chipset = "Intel(R) Cherryview";
    579    } else if (gen_is_bdw(is->dev.devid)) {
    580       /* this is likely wrong */
    581       if (gen_is_desktop(is->dev.devid))
    582          chipset = "Intel(R) Broadwell Desktop";
    583       else if (gen_is_mobile(is->dev.devid))
    584          chipset = "Intel(R) Broadwell Mobile";
    585       else if (gen_is_server(is->dev.devid))
    586          chipset = "Intel(R) Broadwell Server";
    587    } else if (gen_is_vlv(is->dev.devid)) {
    588       chipset = "Intel(R) Bay Trail";
    589    } else if (gen_is_hsw(is->dev.devid)) {
    590       if (gen_is_desktop(is->dev.devid))
    591          chipset = "Intel(R) Haswell Desktop";
    592       else if (gen_is_mobile(is->dev.devid))
    593          chipset = "Intel(R) Haswell Mobile";
    594       else if (gen_is_server(is->dev.devid))
    595          chipset = "Intel(R) Haswell Server";
    596    } else if (gen_is_ivb(is->dev.devid)) {
    597       if (gen_is_desktop(is->dev.devid))
    598          chipset = "Intel(R) Ivybridge Desktop";
    599       else if (gen_is_mobile(is->dev.devid))
    600          chipset = "Intel(R) Ivybridge Mobile";
    601       else if (gen_is_server(is->dev.devid))
    602          chipset = "Intel(R) Ivybridge Server";
    603    } else if (gen_is_snb(is->dev.devid)) {
    604       if (gen_is_desktop(is->dev.devid))
    605          chipset = "Intel(R) Sandybridge Desktop";
    606       else if (gen_is_mobile(is->dev.devid))
    607          chipset = "Intel(R) Sandybridge Mobile";
    608       else if (gen_is_server(is->dev.devid))
    609          chipset = "Intel(R) Sandybridge Server";
    610    }
    611 
    612    if (!chipset)
    613       chipset = "Unknown Intel Chipset";
    614 
    615    return chipset;
    616 }
    617 
    618 static uint64_t
    619 ilo_get_timestamp(struct pipe_screen *screen)
    620 {
    621    struct ilo_screen *is = ilo_screen(screen);
    622    union {
    623       uint64_t val;
    624       uint32_t dw[2];
    625    } timestamp;
    626 
    627    intel_winsys_read_reg(is->dev.winsys, GEN6_REG_TIMESTAMP, &timestamp.val);
    628 
    629    /*
    630     * From the Ivy Bridge PRM, volume 1 part 3, page 107:
    631     *
    632     *     "Note: This timestamp register reflects the value of the PCU TSC.
    633     *      The PCU TSC counts 10ns increments; this timestamp reflects bits
    634     *      38:3 of the TSC (i.e. 80ns granularity, rolling over every 1.5
    635     *      hours)."
    636     *
    637     * However, it seems dw[0] is garbage and dw[1] contains the lower 32 bits
    638     * of the timestamp.  We will have to live with a timestamp that rolls over
    639     * every ~343 seconds.
    640     *
    641     * See also brw_get_timestamp().
    642     */
    643    return (uint64_t) timestamp.dw[1] * 80;
    644 }
    645 
    646 static boolean
    647 ilo_is_format_supported(struct pipe_screen *screen,
    648                         enum pipe_format format,
    649                         enum pipe_texture_target target,
    650                         unsigned sample_count,
    651                         unsigned bindings)
    652 {
    653    struct ilo_screen *is = ilo_screen(screen);
    654    const struct ilo_dev *dev = &is->dev;
    655 
    656    if (!util_format_is_supported(format, bindings))
    657       return false;
    658 
    659    /* no MSAA support yet */
    660    if (sample_count > 1)
    661       return false;
    662 
    663    if ((bindings & PIPE_BIND_DEPTH_STENCIL) &&
    664        !ilo_format_support_zs(dev, format))
    665       return false;
    666 
    667    if ((bindings & PIPE_BIND_RENDER_TARGET) &&
    668        !ilo_format_support_rt(dev, format))
    669       return false;
    670 
    671    if ((bindings & PIPE_BIND_SAMPLER_VIEW) &&
    672        !ilo_format_support_sampler(dev, format))
    673       return false;
    674 
    675    if ((bindings & PIPE_BIND_VERTEX_BUFFER) &&
    676        !ilo_format_support_vb(dev, format))
    677       return false;
    678 
    679    return true;
    680 }
    681 
    682 static boolean
    683 ilo_is_video_format_supported(struct pipe_screen *screen,
    684                               enum pipe_format format,
    685                               enum pipe_video_profile profile,
    686                               enum pipe_video_entrypoint entrypoint)
    687 {
    688    return vl_video_buffer_is_format_supported(screen, format, profile, entrypoint);
    689 }
    690 
    691 static void
    692 ilo_screen_fence_reference(struct pipe_screen *screen,
    693                            struct pipe_fence_handle **ptr,
    694                            struct pipe_fence_handle *fence)
    695 {
    696    struct pipe_fence_handle *old;
    697 
    698    if (likely(ptr)) {
    699       old = *ptr;
    700       *ptr = fence;
    701    } else {
    702       old = NULL;
    703    }
    704 
    705    STATIC_ASSERT(&((struct pipe_fence_handle *) NULL)->reference == NULL);
    706    if (pipe_reference(&old->reference, &fence->reference)) {
    707       intel_bo_unref(old->seqno_bo);
    708       FREE(old);
    709    }
    710 }
    711 
    712 static boolean
    713 ilo_screen_fence_finish(struct pipe_screen *screen,
    714                         struct pipe_context *ctx,
    715                         struct pipe_fence_handle *fence,
    716                         uint64_t timeout)
    717 {
    718    const int64_t wait_timeout = (timeout > INT64_MAX) ? -1 : timeout;
    719    bool signaled;
    720 
    721    signaled = (!fence->seqno_bo ||
    722          intel_bo_wait(fence->seqno_bo, wait_timeout) == 0);
    723 
    724    /* XXX not thread safe */
    725    if (signaled && fence->seqno_bo) {
    726       intel_bo_unref(fence->seqno_bo);
    727       fence->seqno_bo = NULL;
    728    }
    729 
    730    return signaled;
    731 }
    732 
    733 /**
    734  * Create a fence for \p bo.  When \p bo is not NULL, it must be submitted
    735  * before waited on or checked.
    736  */
    737 struct pipe_fence_handle *
    738 ilo_screen_fence_create(struct pipe_screen *screen, struct intel_bo *bo)
    739 {
    740    struct pipe_fence_handle *fence;
    741 
    742    fence = CALLOC_STRUCT(pipe_fence_handle);
    743    if (!fence)
    744       return NULL;
    745 
    746    pipe_reference_init(&fence->reference, 1);
    747 
    748    fence->seqno_bo = intel_bo_ref(bo);
    749 
    750    return fence;
    751 }
    752 
    753 static void
    754 ilo_screen_destroy(struct pipe_screen *screen)
    755 {
    756    struct ilo_screen *is = ilo_screen(screen);
    757 
    758    intel_winsys_destroy(is->dev.winsys);
    759 
    760    FREE(is);
    761 }
    762 
    763 struct pipe_screen *
    764 ilo_screen_create(struct intel_winsys *ws)
    765 {
    766    struct ilo_screen *is;
    767 
    768    ilo_debug_init("ILO_DEBUG");
    769 
    770    is = CALLOC_STRUCT(ilo_screen);
    771    if (!is)
    772       return NULL;
    773 
    774    if (!ilo_dev_init(&is->dev, ws)) {
    775       FREE(is);
    776       return NULL;
    777    }
    778 
    779    util_format_s3tc_init();
    780 
    781    is->base.destroy = ilo_screen_destroy;
    782    is->base.get_name = ilo_get_name;
    783    is->base.get_vendor = ilo_get_vendor;
    784    is->base.get_device_vendor = ilo_get_device_vendor;
    785    is->base.get_param = ilo_get_param;
    786    is->base.get_paramf = ilo_get_paramf;
    787    is->base.get_shader_param = ilo_get_shader_param;
    788    is->base.get_video_param = ilo_get_video_param;
    789    is->base.get_compute_param = ilo_get_compute_param;
    790 
    791    is->base.get_timestamp = ilo_get_timestamp;
    792 
    793    is->base.is_format_supported = ilo_is_format_supported;
    794    is->base.is_video_format_supported = ilo_is_video_format_supported;
    795 
    796    is->base.flush_frontbuffer = NULL;
    797 
    798    is->base.fence_reference = ilo_screen_fence_reference;
    799    is->base.fence_finish = ilo_screen_fence_finish;
    800 
    801    is->base.get_driver_query_info = NULL;
    802 
    803    ilo_init_context_functions(is);
    804    ilo_init_resource_functions(is);
    805 
    806    return &is->base;
    807 }
    808