1 /* 2 * Copyright 2010 Jerome Glisse <glisse (at) freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 #include "r600_pipe.h" 24 #include "compute_memory_pool.h" 25 #include "evergreen_compute.h" 26 #include "util/u_surface.h" 27 #include "util/u_format.h" 28 #include "evergreend.h" 29 30 enum r600_blitter_op /* bitmask */ 31 { 32 R600_SAVE_FRAGMENT_STATE = 1, 33 R600_SAVE_TEXTURES = 2, 34 R600_SAVE_FRAMEBUFFER = 4, 35 R600_DISABLE_RENDER_COND = 8, 36 37 R600_CLEAR = R600_SAVE_FRAGMENT_STATE, 38 39 R600_CLEAR_SURFACE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER, 40 41 R600_COPY_BUFFER = R600_DISABLE_RENDER_COND, 42 43 R600_COPY_TEXTURE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES | 44 R600_DISABLE_RENDER_COND, 45 46 R600_BLIT = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_SAVE_TEXTURES, 47 48 R600_DECOMPRESS = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER | R600_DISABLE_RENDER_COND, 49 50 R600_COLOR_RESOLVE = R600_SAVE_FRAGMENT_STATE | R600_SAVE_FRAMEBUFFER 51 }; 52 53 static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op) 54 { 55 struct r600_context *rctx = (struct r600_context *)ctx; 56 57 util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb); 58 util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso); 59 util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader); 60 util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader); 61 util_blitter_save_tessctrl_shader(rctx->blitter, rctx->tcs_shader); 62 util_blitter_save_tesseval_shader(rctx->blitter, rctx->tes_shader); 63 util_blitter_save_so_targets(rctx->blitter, rctx->b.streamout.num_targets, 64 (struct pipe_stream_output_target**)rctx->b.streamout.targets); 65 util_blitter_save_rasterizer(rctx->blitter, rctx->rasterizer_state.cso); 66 67 if (op & R600_SAVE_FRAGMENT_STATE) { 68 util_blitter_save_viewport(rctx->blitter, &rctx->b.viewports.states[0]); 69 util_blitter_save_scissor(rctx->blitter, &rctx->b.scissors.states[0]); 70 util_blitter_save_fragment_shader(rctx->blitter, rctx->ps_shader); 71 util_blitter_save_blend(rctx->blitter, rctx->blend_state.cso); 72 util_blitter_save_depth_stencil_alpha(rctx->blitter, rctx->dsa_state.cso); 73 util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref.pipe_state); 74 util_blitter_save_sample_mask(rctx->blitter, rctx->sample_mask.sample_mask); 75 } 76 77 if (op & R600_SAVE_FRAMEBUFFER) 78 util_blitter_save_framebuffer(rctx->blitter, &rctx->framebuffer.state); 79 80 if (op & R600_SAVE_TEXTURES) { 81 util_blitter_save_fragment_sampler_states( 82 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].states.enabled_mask), 83 (void**)rctx->samplers[PIPE_SHADER_FRAGMENT].states.states); 84 85 util_blitter_save_fragment_sampler_views( 86 rctx->blitter, util_last_bit(rctx->samplers[PIPE_SHADER_FRAGMENT].views.enabled_mask), 87 (struct pipe_sampler_view**)rctx->samplers[PIPE_SHADER_FRAGMENT].views.views); 88 } 89 90 if (op & R600_DISABLE_RENDER_COND) 91 rctx->b.render_cond_force_off = true; 92 } 93 94 static void r600_blitter_end(struct pipe_context *ctx) 95 { 96 struct r600_context *rctx = (struct r600_context *)ctx; 97 98 rctx->b.render_cond_force_off = false; 99 } 100 101 static unsigned u_max_sample(struct pipe_resource *r) 102 { 103 return r->nr_samples ? r->nr_samples - 1 : 0; 104 } 105 106 static void r600_blit_decompress_depth(struct pipe_context *ctx, 107 struct r600_texture *texture, 108 struct r600_texture *staging, 109 unsigned first_level, unsigned last_level, 110 unsigned first_layer, unsigned last_layer, 111 unsigned first_sample, unsigned last_sample) 112 { 113 struct r600_context *rctx = (struct r600_context *)ctx; 114 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample; 115 struct r600_texture *flushed_depth_texture = staging ? 116 staging : texture->flushed_depth_texture; 117 const struct util_format_description *desc = 118 util_format_description(texture->resource.b.b.format); 119 float depth; 120 121 if (!staging && !texture->dirty_level_mask) 122 return; 123 124 max_sample = u_max_sample(&texture->resource.b.b); 125 126 /* XXX Decompressing MSAA depth textures is broken on R6xx. 127 * There is also a hardlock if CMASK and FMASK are not present. 128 * Just skip this until we find out how to fix it. */ 129 if (rctx->b.chip_class == R600 && max_sample > 0) { 130 texture->dirty_level_mask = 0; 131 return; 132 } 133 134 if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 || 135 rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635) 136 depth = 0.0f; 137 else 138 depth = 1.0f; 139 140 /* Enable decompression in DB_RENDER_CONTROL */ 141 rctx->db_misc_state.flush_depthstencil_through_cb = true; 142 rctx->db_misc_state.copy_depth = util_format_has_depth(desc); 143 rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc); 144 rctx->db_misc_state.copy_sample = first_sample; 145 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); 146 147 for (level = first_level; level <= last_level; level++) { 148 if (!staging && !(texture->dirty_level_mask & (1 << level))) 149 continue; 150 151 /* The smaller the mipmap level, the less layers there are 152 * as far as 3D textures are concerned. */ 153 max_layer = util_max_layer(&texture->resource.b.b, level); 154 checked_last_layer = last_layer < max_layer ? last_layer : max_layer; 155 156 for (layer = first_layer; layer <= checked_last_layer; layer++) { 157 for (sample = first_sample; sample <= last_sample; sample++) { 158 struct pipe_surface *zsurf, *cbsurf, surf_tmpl; 159 160 if (sample != rctx->db_misc_state.copy_sample) { 161 rctx->db_misc_state.copy_sample = sample; 162 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); 163 } 164 165 surf_tmpl.format = texture->resource.b.b.format; 166 surf_tmpl.u.tex.level = level; 167 surf_tmpl.u.tex.first_layer = layer; 168 surf_tmpl.u.tex.last_layer = layer; 169 170 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl); 171 172 surf_tmpl.format = flushed_depth_texture->resource.b.b.format; 173 cbsurf = ctx->create_surface(ctx, 174 &flushed_depth_texture->resource.b.b, &surf_tmpl); 175 176 r600_blitter_begin(ctx, R600_DECOMPRESS); 177 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, cbsurf, 1 << sample, 178 rctx->custom_dsa_flush, depth); 179 r600_blitter_end(ctx); 180 181 pipe_surface_reference(&zsurf, NULL); 182 pipe_surface_reference(&cbsurf, NULL); 183 } 184 } 185 186 /* The texture will always be dirty if some layers or samples aren't flushed. 187 * I don't think this case occurs often though. */ 188 if (!staging && 189 first_layer == 0 && last_layer == max_layer && 190 first_sample == 0 && last_sample == max_sample) { 191 texture->dirty_level_mask &= ~(1 << level); 192 } 193 } 194 195 /* reenable compression in DB_RENDER_CONTROL */ 196 rctx->db_misc_state.flush_depthstencil_through_cb = false; 197 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); 198 } 199 200 static void r600_blit_decompress_depth_in_place(struct r600_context *rctx, 201 struct r600_texture *texture, 202 bool is_stencil_sampler, 203 unsigned first_level, unsigned last_level, 204 unsigned first_layer, unsigned last_layer) 205 { 206 struct pipe_surface *zsurf, surf_tmpl = {{0}}; 207 unsigned layer, max_layer, checked_last_layer, level; 208 unsigned *dirty_level_mask; 209 210 /* Enable decompression in DB_RENDER_CONTROL */ 211 if (is_stencil_sampler) { 212 rctx->db_misc_state.flush_stencil_inplace = true; 213 dirty_level_mask = &texture->stencil_dirty_level_mask; 214 } else { 215 rctx->db_misc_state.flush_depth_inplace = true; 216 dirty_level_mask = &texture->dirty_level_mask; 217 } 218 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); 219 220 surf_tmpl.format = texture->resource.b.b.format; 221 222 for (level = first_level; level <= last_level; level++) { 223 if (!(*dirty_level_mask & (1 << level))) 224 continue; 225 226 surf_tmpl.u.tex.level = level; 227 228 /* The smaller the mipmap level, the less layers there are 229 * as far as 3D textures are concerned. */ 230 max_layer = util_max_layer(&texture->resource.b.b, level); 231 checked_last_layer = last_layer < max_layer ? last_layer : max_layer; 232 233 for (layer = first_layer; layer <= checked_last_layer; layer++) { 234 surf_tmpl.u.tex.first_layer = layer; 235 surf_tmpl.u.tex.last_layer = layer; 236 237 zsurf = rctx->b.b.create_surface(&rctx->b.b, &texture->resource.b.b, &surf_tmpl); 238 239 r600_blitter_begin(&rctx->b.b, R600_DECOMPRESS); 240 util_blitter_custom_depth_stencil(rctx->blitter, zsurf, NULL, ~0, 241 rctx->custom_dsa_flush, 1.0f); 242 r600_blitter_end(&rctx->b.b); 243 244 pipe_surface_reference(&zsurf, NULL); 245 } 246 247 /* The texture will always be dirty if some layers or samples aren't flushed. 248 * I don't think this case occurs often though. */ 249 if (first_layer == 0 && last_layer == max_layer) { 250 *dirty_level_mask &= ~(1 << level); 251 } 252 } 253 254 /* Disable decompression in DB_RENDER_CONTROL */ 255 rctx->db_misc_state.flush_depth_inplace = false; 256 rctx->db_misc_state.flush_stencil_inplace = false; 257 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); 258 } 259 260 void r600_decompress_depth_textures(struct r600_context *rctx, 261 struct r600_samplerview_state *textures) 262 { 263 unsigned i; 264 unsigned depth_texture_mask = textures->compressed_depthtex_mask; 265 266 while (depth_texture_mask) { 267 struct pipe_sampler_view *view; 268 struct r600_pipe_sampler_view *rview; 269 struct r600_texture *tex; 270 271 i = u_bit_scan(&depth_texture_mask); 272 273 view = &textures->views[i]->base; 274 assert(view); 275 rview = (struct r600_pipe_sampler_view*)view; 276 277 tex = (struct r600_texture *)view->texture; 278 assert(tex->db_compatible); 279 280 if (r600_can_sample_zs(tex, rview->is_stencil_sampler)) { 281 r600_blit_decompress_depth_in_place(rctx, tex, 282 rview->is_stencil_sampler, 283 view->u.tex.first_level, view->u.tex.last_level, 284 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level)); 285 } else { 286 r600_blit_decompress_depth(&rctx->b.b, tex, NULL, 287 view->u.tex.first_level, view->u.tex.last_level, 288 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level), 289 0, u_max_sample(&tex->resource.b.b)); 290 } 291 } 292 } 293 294 static void r600_blit_decompress_color(struct pipe_context *ctx, 295 struct r600_texture *rtex, 296 unsigned first_level, unsigned last_level, 297 unsigned first_layer, unsigned last_layer) 298 { 299 struct r600_context *rctx = (struct r600_context *)ctx; 300 unsigned layer, level, checked_last_layer, max_layer; 301 302 if (!rtex->dirty_level_mask) 303 return; 304 305 for (level = first_level; level <= last_level; level++) { 306 if (!(rtex->dirty_level_mask & (1 << level))) 307 continue; 308 309 /* The smaller the mipmap level, the less layers there are 310 * as far as 3D textures are concerned. */ 311 max_layer = util_max_layer(&rtex->resource.b.b, level); 312 checked_last_layer = last_layer < max_layer ? last_layer : max_layer; 313 314 for (layer = first_layer; layer <= checked_last_layer; layer++) { 315 struct pipe_surface *cbsurf, surf_tmpl; 316 317 surf_tmpl.format = rtex->resource.b.b.format; 318 surf_tmpl.u.tex.level = level; 319 surf_tmpl.u.tex.first_layer = layer; 320 surf_tmpl.u.tex.last_layer = layer; 321 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl); 322 323 r600_blitter_begin(ctx, R600_DECOMPRESS); 324 util_blitter_custom_color(rctx->blitter, cbsurf, 325 rtex->fmask.size ? rctx->custom_blend_decompress : rctx->custom_blend_fastclear); 326 r600_blitter_end(ctx); 327 328 pipe_surface_reference(&cbsurf, NULL); 329 } 330 331 /* The texture will always be dirty if some layers aren't flushed. 332 * I don't think this case occurs often though. */ 333 if (first_layer == 0 && last_layer == max_layer) { 334 rtex->dirty_level_mask &= ~(1 << level); 335 } 336 } 337 } 338 339 void r600_decompress_color_textures(struct r600_context *rctx, 340 struct r600_samplerview_state *textures) 341 { 342 unsigned i; 343 unsigned mask = textures->compressed_colortex_mask; 344 345 while (mask) { 346 struct pipe_sampler_view *view; 347 struct r600_texture *tex; 348 349 i = u_bit_scan(&mask); 350 351 view = &textures->views[i]->base; 352 assert(view); 353 354 tex = (struct r600_texture *)view->texture; 355 assert(tex->cmask.size); 356 357 r600_blit_decompress_color(&rctx->b.b, tex, 358 view->u.tex.first_level, view->u.tex.last_level, 359 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level)); 360 } 361 } 362 363 /* Helper for decompressing a portion of a color or depth resource before 364 * blitting if any decompression is needed. 365 * The driver doesn't decompress resources automatically while u_blitter is 366 * rendering. */ 367 static bool r600_decompress_subresource(struct pipe_context *ctx, 368 struct pipe_resource *tex, 369 unsigned level, 370 unsigned first_layer, unsigned last_layer) 371 { 372 struct r600_context *rctx = (struct r600_context *)ctx; 373 struct r600_texture *rtex = (struct r600_texture*)tex; 374 375 if (rtex->db_compatible) { 376 if (r600_can_sample_zs(rtex, false)) { 377 r600_blit_decompress_depth_in_place(rctx, rtex, false, 378 level, level, 379 first_layer, last_layer); 380 if (rtex->surface.flags & RADEON_SURF_SBUFFER) { 381 r600_blit_decompress_depth_in_place(rctx, rtex, true, 382 level, level, 383 first_layer, last_layer); 384 } 385 } else { 386 if (!r600_init_flushed_depth_texture(ctx, tex, NULL)) 387 return false; /* error */ 388 389 r600_blit_decompress_depth(ctx, rtex, NULL, 390 level, level, 391 first_layer, last_layer, 392 0, u_max_sample(tex)); 393 } 394 } else if (rtex->cmask.size) { 395 r600_blit_decompress_color(ctx, rtex, level, level, 396 first_layer, last_layer); 397 } 398 return true; 399 } 400 401 static void r600_clear(struct pipe_context *ctx, unsigned buffers, 402 const union pipe_color_union *color, 403 double depth, unsigned stencil) 404 { 405 struct r600_context *rctx = (struct r600_context *)ctx; 406 struct pipe_framebuffer_state *fb = &rctx->framebuffer.state; 407 408 if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) { 409 evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom, 410 &buffers, NULL, color); 411 if (!buffers) 412 return; /* all buffers have been fast cleared */ 413 } 414 415 if (buffers & PIPE_CLEAR_COLOR) { 416 int i; 417 418 /* These buffers cannot use fast clear, make sure to disable expansion. */ 419 for (i = 0; i < fb->nr_cbufs; i++) { 420 struct r600_texture *tex; 421 422 /* If not clearing this buffer, skip. */ 423 if (!(buffers & (PIPE_CLEAR_COLOR0 << i))) 424 continue; 425 426 if (!fb->cbufs[i]) 427 continue; 428 429 tex = (struct r600_texture *)fb->cbufs[i]->texture; 430 if (tex->fmask.size == 0) 431 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level); 432 } 433 } 434 435 /* if hyperz enabled just clear hyperz */ 436 if (fb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) { 437 struct r600_texture *rtex; 438 unsigned level = fb->zsbuf->u.tex.level; 439 440 rtex = (struct r600_texture*)fb->zsbuf->texture; 441 442 /* We can't use hyperz fast clear if each slice of a texture 443 * array are clear to different value. To simplify code just 444 * disable fast clear for texture array. 445 */ 446 /* Only use htile for first level */ 447 if (rtex->htile_buffer && !level && 448 fb->zsbuf->u.tex.first_layer == 0 && 449 fb->zsbuf->u.tex.last_layer == util_max_layer(&rtex->resource.b.b, level)) { 450 if (rtex->depth_clear_value != depth) { 451 rtex->depth_clear_value = depth; 452 r600_mark_atom_dirty(rctx, &rctx->db_state.atom); 453 } 454 rctx->db_misc_state.htile_clear = true; 455 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); 456 } 457 } 458 459 r600_blitter_begin(ctx, R600_CLEAR); 460 util_blitter_clear(rctx->blitter, fb->width, fb->height, 461 util_framebuffer_get_num_layers(fb), 462 buffers, color, depth, stencil); 463 r600_blitter_end(ctx); 464 465 /* disable fast clear */ 466 if (rctx->db_misc_state.htile_clear) { 467 rctx->db_misc_state.htile_clear = false; 468 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); 469 } 470 } 471 472 static void r600_clear_render_target(struct pipe_context *ctx, 473 struct pipe_surface *dst, 474 const union pipe_color_union *color, 475 unsigned dstx, unsigned dsty, 476 unsigned width, unsigned height, 477 bool render_condition_enabled) 478 { 479 struct r600_context *rctx = (struct r600_context *)ctx; 480 481 r600_blitter_begin(ctx, R600_CLEAR_SURFACE | 482 (render_condition_enabled ? 0 : R600_DISABLE_RENDER_COND)); 483 util_blitter_clear_render_target(rctx->blitter, dst, color, 484 dstx, dsty, width, height); 485 r600_blitter_end(ctx); 486 } 487 488 static void r600_clear_depth_stencil(struct pipe_context *ctx, 489 struct pipe_surface *dst, 490 unsigned clear_flags, 491 double depth, 492 unsigned stencil, 493 unsigned dstx, unsigned dsty, 494 unsigned width, unsigned height, 495 bool render_condition_enabled) 496 { 497 struct r600_context *rctx = (struct r600_context *)ctx; 498 499 r600_blitter_begin(ctx, R600_CLEAR_SURFACE | 500 (render_condition_enabled ? 0 : R600_DISABLE_RENDER_COND)); 501 util_blitter_clear_depth_stencil(rctx->blitter, dst, clear_flags, depth, stencil, 502 dstx, dsty, width, height); 503 r600_blitter_end(ctx); 504 } 505 506 static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst, unsigned dstx, 507 struct pipe_resource *src, const struct pipe_box *src_box) 508 { 509 struct r600_context *rctx = (struct r600_context*)ctx; 510 511 if (rctx->screen->b.has_cp_dma) { 512 r600_cp_dma_copy_buffer(rctx, dst, dstx, src, src_box->x, src_box->width); 513 } 514 else if (rctx->screen->b.has_streamout && 515 /* Require 4-byte alignment. */ 516 dstx % 4 == 0 && src_box->x % 4 == 0 && src_box->width % 4 == 0) { 517 518 r600_blitter_begin(ctx, R600_COPY_BUFFER); 519 util_blitter_copy_buffer(rctx->blitter, dst, dstx, src, src_box->x, src_box->width); 520 r600_blitter_end(ctx); 521 } else { 522 util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box); 523 } 524 } 525 526 /** 527 * Global buffers are not really resources, they are are actually offsets 528 * into a single global resource (r600_screen::global_pool). The means 529 * they don't have their own buf handle, so they cannot be passed 530 * to r600_copy_buffer() and must be handled separately. 531 */ 532 static void r600_copy_global_buffer(struct pipe_context *ctx, 533 struct pipe_resource *dst, unsigned 534 dstx, struct pipe_resource *src, 535 const struct pipe_box *src_box) 536 { 537 struct r600_context *rctx = (struct r600_context*)ctx; 538 struct compute_memory_pool *pool = rctx->screen->global_pool; 539 struct pipe_box new_src_box = *src_box; 540 541 if (src->bind & PIPE_BIND_GLOBAL) { 542 struct r600_resource_global *rsrc = 543 (struct r600_resource_global *)src; 544 struct compute_memory_item *item = rsrc->chunk; 545 546 if (is_item_in_pool(item)) { 547 new_src_box.x += 4 * item->start_in_dw; 548 src = (struct pipe_resource *)pool->bo; 549 } else { 550 if (item->real_buffer == NULL) { 551 item->real_buffer = 552 r600_compute_buffer_alloc_vram(pool->screen, 553 item->size_in_dw * 4); 554 } 555 src = (struct pipe_resource*)item->real_buffer; 556 } 557 } 558 if (dst->bind & PIPE_BIND_GLOBAL) { 559 struct r600_resource_global *rdst = 560 (struct r600_resource_global *)dst; 561 struct compute_memory_item *item = rdst->chunk; 562 563 if (is_item_in_pool(item)) { 564 dstx += 4 * item->start_in_dw; 565 dst = (struct pipe_resource *)pool->bo; 566 } else { 567 if (item->real_buffer == NULL) { 568 item->real_buffer = 569 r600_compute_buffer_alloc_vram(pool->screen, 570 item->size_in_dw * 4); 571 } 572 dst = (struct pipe_resource*)item->real_buffer; 573 } 574 } 575 576 r600_copy_buffer(ctx, dst, dstx, src, &new_src_box); 577 } 578 579 static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst, 580 uint64_t offset, uint64_t size, unsigned value, 581 enum r600_coherency coher) 582 { 583 struct r600_context *rctx = (struct r600_context*)ctx; 584 585 if (rctx->screen->b.has_cp_dma && 586 rctx->b.chip_class >= EVERGREEN && 587 offset % 4 == 0 && size % 4 == 0) { 588 evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value, coher); 589 } else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) { 590 union pipe_color_union clear_value; 591 clear_value.ui[0] = value; 592 593 r600_blitter_begin(ctx, R600_DISABLE_RENDER_COND); 594 util_blitter_clear_buffer(rctx->blitter, dst, offset, size, 595 1, &clear_value); 596 r600_blitter_end(ctx); 597 } else { 598 uint32_t *map = r600_buffer_map_sync_with_rings(&rctx->b, r600_resource(dst), 599 PIPE_TRANSFER_WRITE); 600 map += offset / 4; 601 size /= 4; 602 for (unsigned i = 0; i < size; i++) 603 *map++ = value; 604 } 605 } 606 607 void r600_resource_copy_region(struct pipe_context *ctx, 608 struct pipe_resource *dst, 609 unsigned dst_level, 610 unsigned dstx, unsigned dsty, unsigned dstz, 611 struct pipe_resource *src, 612 unsigned src_level, 613 const struct pipe_box *src_box) 614 { 615 struct r600_context *rctx = (struct r600_context *)ctx; 616 struct pipe_surface *dst_view, dst_templ; 617 struct pipe_sampler_view src_templ, *src_view; 618 unsigned dst_width, dst_height, src_width0, src_height0, src_widthFL, src_heightFL; 619 unsigned src_force_level = 0; 620 struct pipe_box sbox, dstbox; 621 622 /* Handle buffers first. */ 623 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) { 624 if ((src->bind & PIPE_BIND_GLOBAL) || 625 (dst->bind & PIPE_BIND_GLOBAL)) { 626 r600_copy_global_buffer(ctx, dst, dstx, src, src_box); 627 } else { 628 r600_copy_buffer(ctx, dst, dstx, src, src_box); 629 } 630 return; 631 } 632 633 assert(u_max_sample(dst) == u_max_sample(src)); 634 635 /* The driver doesn't decompress resources automatically while 636 * u_blitter is rendering. */ 637 if (!r600_decompress_subresource(ctx, src, src_level, 638 src_box->z, src_box->z + src_box->depth - 1)) { 639 return; /* error */ 640 } 641 642 dst_width = u_minify(dst->width0, dst_level); 643 dst_height = u_minify(dst->height0, dst_level); 644 src_width0 = src->width0; 645 src_height0 = src->height0; 646 src_widthFL = u_minify(src->width0, src_level); 647 src_heightFL = u_minify(src->height0, src_level); 648 649 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz); 650 util_blitter_default_src_texture(&src_templ, src, src_level); 651 652 if (util_format_is_compressed(src->format) || 653 util_format_is_compressed(dst->format)) { 654 unsigned blocksize = util_format_get_blocksize(src->format); 655 656 if (blocksize == 8) 657 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */ 658 else 659 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */ 660 dst_templ.format = src_templ.format; 661 662 dst_width = util_format_get_nblocksx(dst->format, dst_width); 663 dst_height = util_format_get_nblocksy(dst->format, dst_height); 664 src_width0 = util_format_get_nblocksx(src->format, src_width0); 665 src_height0 = util_format_get_nblocksy(src->format, src_height0); 666 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL); 667 src_heightFL = util_format_get_nblocksy(src->format, src_heightFL); 668 669 dstx = util_format_get_nblocksx(dst->format, dstx); 670 dsty = util_format_get_nblocksy(dst->format, dsty); 671 672 sbox.x = util_format_get_nblocksx(src->format, src_box->x); 673 sbox.y = util_format_get_nblocksy(src->format, src_box->y); 674 sbox.z = src_box->z; 675 sbox.width = util_format_get_nblocksx(src->format, src_box->width); 676 sbox.height = util_format_get_nblocksy(src->format, src_box->height); 677 sbox.depth = src_box->depth; 678 src_box = &sbox; 679 680 src_force_level = src_level; 681 } else if (!util_blitter_is_copy_supported(rctx->blitter, dst, src)) { 682 if (util_format_is_subsampled_422(src->format)) { 683 684 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT; 685 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT; 686 687 dst_width = util_format_get_nblocksx(dst->format, dst_width); 688 src_width0 = util_format_get_nblocksx(src->format, src_width0); 689 src_widthFL = util_format_get_nblocksx(src->format, src_widthFL); 690 691 dstx = util_format_get_nblocksx(dst->format, dstx); 692 693 sbox = *src_box; 694 sbox.x = util_format_get_nblocksx(src->format, src_box->x); 695 sbox.width = util_format_get_nblocksx(src->format, src_box->width); 696 src_box = &sbox; 697 } else { 698 unsigned blocksize = util_format_get_blocksize(src->format); 699 700 switch (blocksize) { 701 case 1: 702 dst_templ.format = PIPE_FORMAT_R8_UNORM; 703 src_templ.format = PIPE_FORMAT_R8_UNORM; 704 break; 705 case 2: 706 dst_templ.format = PIPE_FORMAT_R8G8_UNORM; 707 src_templ.format = PIPE_FORMAT_R8G8_UNORM; 708 break; 709 case 4: 710 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM; 711 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM; 712 break; 713 case 8: 714 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; 715 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; 716 break; 717 case 16: 718 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; 719 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; 720 break; 721 default: 722 fprintf(stderr, "Unhandled format %s with blocksize %u\n", 723 util_format_short_name(src->format), blocksize); 724 assert(0); 725 } 726 } 727 } 728 729 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ, dst_width, dst_height); 730 731 if (rctx->b.chip_class >= EVERGREEN) { 732 src_view = evergreen_create_sampler_view_custom(ctx, src, &src_templ, 733 src_width0, src_height0, 734 src_force_level); 735 } else { 736 src_view = r600_create_sampler_view_custom(ctx, src, &src_templ, 737 src_widthFL, src_heightFL); 738 } 739 740 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height), 741 abs(src_box->depth), &dstbox); 742 743 /* Copy. */ 744 r600_blitter_begin(ctx, R600_COPY_TEXTURE); 745 util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox, 746 src_view, src_box, src_width0, src_height0, 747 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL, 748 FALSE); 749 r600_blitter_end(ctx); 750 751 pipe_surface_reference(&dst_view, NULL); 752 pipe_sampler_view_reference(&src_view, NULL); 753 } 754 755 static bool do_hardware_msaa_resolve(struct pipe_context *ctx, 756 const struct pipe_blit_info *info) 757 { 758 struct r600_context *rctx = (struct r600_context*)ctx; 759 struct r600_texture *dst = (struct r600_texture*)info->dst.resource; 760 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level); 761 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level); 762 enum pipe_format format = info->src.format; 763 unsigned sample_mask = 764 rctx->b.chip_class == CAYMAN ? ~0 : 765 ((1ull << MAX2(1, info->src.resource->nr_samples)) - 1); 766 struct pipe_resource *tmp, templ; 767 struct pipe_blit_info blit; 768 769 /* Check basic requirements for hw resolve. */ 770 if (!(info->src.resource->nr_samples > 1 && 771 info->dst.resource->nr_samples <= 1 && 772 !util_format_is_pure_integer(format) && 773 !util_format_is_depth_or_stencil(format) && 774 util_max_layer(info->src.resource, 0) == 0)) 775 return false; 776 777 /* Check the remaining requirements for hw resolve. */ 778 if (util_max_layer(info->dst.resource, info->dst.level) == 0 && 779 util_is_format_compatible(util_format_description(info->src.format), 780 util_format_description(info->dst.format)) && 781 !info->scissor_enable && 782 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA && 783 dst_width == info->src.resource->width0 && 784 dst_height == info->src.resource->height0 && 785 info->dst.box.x == 0 && 786 info->dst.box.y == 0 && 787 info->dst.box.width == dst_width && 788 info->dst.box.height == dst_height && 789 info->dst.box.depth == 1 && 790 info->src.box.x == 0 && 791 info->src.box.y == 0 && 792 info->src.box.width == dst_width && 793 info->src.box.height == dst_height && 794 info->src.box.depth == 1 && 795 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D && 796 (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) { 797 r600_blitter_begin(ctx, R600_COLOR_RESOLVE | 798 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND)); 799 util_blitter_custom_resolve_color(rctx->blitter, 800 info->dst.resource, info->dst.level, 801 info->dst.box.z, 802 info->src.resource, info->src.box.z, 803 sample_mask, rctx->custom_blend_resolve, 804 format); 805 r600_blitter_end(ctx); 806 return true; 807 } 808 809 /* Shader-based resolve is VERY SLOW. Instead, resolve into 810 * a temporary texture and blit. 811 */ 812 memset(&templ, 0, sizeof(templ)); 813 templ.target = PIPE_TEXTURE_2D; 814 templ.format = info->src.resource->format; 815 templ.width0 = info->src.resource->width0; 816 templ.height0 = info->src.resource->height0; 817 templ.depth0 = 1; 818 templ.array_size = 1; 819 templ.usage = PIPE_USAGE_DEFAULT; 820 templ.flags = R600_RESOURCE_FLAG_FORCE_TILING; 821 822 tmp = ctx->screen->resource_create(ctx->screen, &templ); 823 if (!tmp) 824 return false; 825 826 /* resolve */ 827 r600_blitter_begin(ctx, R600_COLOR_RESOLVE | 828 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND)); 829 util_blitter_custom_resolve_color(rctx->blitter, tmp, 0, 0, 830 info->src.resource, info->src.box.z, 831 sample_mask, rctx->custom_blend_resolve, 832 format); 833 r600_blitter_end(ctx); 834 835 /* blit */ 836 blit = *info; 837 blit.src.resource = tmp; 838 blit.src.box.z = 0; 839 840 r600_blitter_begin(ctx, R600_BLIT | 841 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND)); 842 util_blitter_blit(rctx->blitter, &blit); 843 r600_blitter_end(ctx); 844 845 pipe_resource_reference(&tmp, NULL); 846 return true; 847 } 848 849 static void r600_blit(struct pipe_context *ctx, 850 const struct pipe_blit_info *info) 851 { 852 struct r600_context *rctx = (struct r600_context*)ctx; 853 struct r600_texture *rdst = (struct r600_texture *)info->dst.resource; 854 855 if (do_hardware_msaa_resolve(ctx, info)) { 856 return; 857 } 858 859 /* Using SDMA for copying to a linear texture in GTT is much faster. 860 * This improves DRI PRIME performance. 861 * 862 * resource_copy_region can't do this yet, because dma_copy calls it 863 * on failure (recursion). 864 */ 865 if (rdst->surface.level[info->dst.level].mode == 866 RADEON_SURF_MODE_LINEAR_ALIGNED && 867 rctx->b.dma_copy && 868 util_can_blit_via_copy_region(info, false)) { 869 rctx->b.dma_copy(ctx, info->dst.resource, info->dst.level, 870 info->dst.box.x, info->dst.box.y, 871 info->dst.box.z, 872 info->src.resource, info->src.level, 873 &info->src.box); 874 return; 875 } 876 877 assert(util_blitter_is_blit_supported(rctx->blitter, info)); 878 879 /* The driver doesn't decompress resources automatically while 880 * u_blitter is rendering. */ 881 if (!r600_decompress_subresource(ctx, info->src.resource, info->src.level, 882 info->src.box.z, 883 info->src.box.z + info->src.box.depth - 1)) { 884 return; /* error */ 885 } 886 887 if (rctx->screen->b.debug_flags & DBG_FORCE_DMA && 888 util_try_blit_via_copy_region(ctx, info)) 889 return; 890 891 r600_blitter_begin(ctx, R600_BLIT | 892 (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND)); 893 util_blitter_blit(rctx->blitter, info); 894 r600_blitter_end(ctx); 895 } 896 897 static void r600_flush_resource(struct pipe_context *ctx, 898 struct pipe_resource *res) 899 { 900 struct r600_texture *rtex = (struct r600_texture*)res; 901 902 assert(res->target != PIPE_BUFFER); 903 904 if (!rtex->is_depth && rtex->cmask.size) { 905 r600_blit_decompress_color(ctx, rtex, 0, res->last_level, 906 0, util_max_layer(res, 0)); 907 } 908 } 909 910 void r600_init_blit_functions(struct r600_context *rctx) 911 { 912 rctx->b.b.clear = r600_clear; 913 rctx->b.b.clear_render_target = r600_clear_render_target; 914 rctx->b.b.clear_depth_stencil = r600_clear_depth_stencil; 915 rctx->b.b.resource_copy_region = r600_resource_copy_region; 916 rctx->b.b.blit = r600_blit; 917 rctx->b.b.flush_resource = r600_flush_resource; 918 rctx->b.clear_buffer = r600_clear_buffer; 919 rctx->b.blit_decompress_depth = r600_blit_decompress_depth; 920 } 921
