1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This implements routines for translating functions from LLVM IR into 11 // Machine IR. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H 16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H 17 18 #include "llvm/ADT/APInt.h" 19 #include "llvm/ADT/DenseMap.h" 20 #include "llvm/ADT/IndexedMap.h" 21 #include "llvm/ADT/Optional.h" 22 #include "llvm/ADT/SmallPtrSet.h" 23 #include "llvm/ADT/SmallVector.h" 24 #include "llvm/CodeGen/ISDOpcodes.h" 25 #include "llvm/CodeGen/MachineBasicBlock.h" 26 #include "llvm/IR/InlineAsm.h" 27 #include "llvm/IR/Instructions.h" 28 #include "llvm/Target/TargetRegisterInfo.h" 29 #include <vector> 30 31 namespace llvm { 32 33 class AllocaInst; 34 class BasicBlock; 35 class BranchProbabilityInfo; 36 class Function; 37 class GlobalVariable; 38 class Instruction; 39 class MachineInstr; 40 class MachineBasicBlock; 41 class MachineFunction; 42 class MachineModuleInfo; 43 class MachineRegisterInfo; 44 class SelectionDAG; 45 class MVT; 46 class TargetLowering; 47 class Value; 48 49 //===--------------------------------------------------------------------===// 50 /// FunctionLoweringInfo - This contains information that is global to a 51 /// function that is used when lowering a region of the function. 52 /// 53 class FunctionLoweringInfo { 54 public: 55 const Function *Fn; 56 MachineFunction *MF; 57 const TargetLowering *TLI; 58 MachineRegisterInfo *RegInfo; 59 BranchProbabilityInfo *BPI; 60 /// CanLowerReturn - true iff the function's return value can be lowered to 61 /// registers. 62 bool CanLowerReturn; 63 64 /// True if part of the CSRs will be handled via explicit copies. 65 bool SplitCSR; 66 67 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg 68 /// allocated to hold a pointer to the hidden sret parameter. 69 unsigned DemoteRegister; 70 71 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry. 72 DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap; 73 74 /// A map from swifterror value in a basic block to the virtual register it is 75 /// currently represented by. 76 llvm::DenseMap<std::pair<const MachineBasicBlock *, const Value *>, unsigned> 77 SwiftErrorVRegDefMap; 78 79 /// A list of upward exposed vreg uses that need to be satisfied by either a 80 /// copy def or a phi node at the beginning of the basic block representing 81 /// the predecessor(s) swifterror value. 82 llvm::DenseMap<std::pair<const MachineBasicBlock *, const Value *>, unsigned> 83 SwiftErrorVRegUpwardsUse; 84 85 /// The swifterror argument of the current function. 86 const Value *SwiftErrorArg; 87 88 typedef SmallVector<const Value*, 1> SwiftErrorValues; 89 /// A function can only have a single swifterror argument. And if it does 90 /// have a swifterror argument, it must be the first entry in 91 /// SwiftErrorVals. 92 SwiftErrorValues SwiftErrorVals; 93 94 95 /// Get or create the swifterror value virtual register in 96 /// SwiftErrorVRegDefMap for this basic block. 97 unsigned getOrCreateSwiftErrorVReg(const MachineBasicBlock *, 98 const Value *); 99 100 /// Set the swifterror virtual register in the SwiftErrorVRegDefMap for this 101 /// basic block. 102 void setCurrentSwiftErrorVReg(const MachineBasicBlock *MBB, const Value *, 103 unsigned); 104 105 /// ValueMap - Since we emit code for the function a basic block at a time, 106 /// we must remember which virtual registers hold the values for 107 /// cross-basic-block values. 108 DenseMap<const Value *, unsigned> ValueMap; 109 110 /// Track virtual registers created for exception pointers. 111 DenseMap<const Value *, unsigned> CatchPadExceptionPointers; 112 113 /// Keep track of frame indices allocated for statepoints as they could be 114 /// used across basic block boundaries. This struct is more complex than a 115 /// simple map because the stateopint lowering code de-duplicates gc pointers 116 /// based on their SDValue (so %p and (bitcast %p to T) will get the same 117 /// slot), and we track that here. 118 119 struct StatepointSpillMap { 120 typedef DenseMap<const Value *, Optional<int>> SlotMapTy; 121 122 /// Maps uniqued llvm IR values to the slots they were spilled in. If a 123 /// value is mapped to None it means we visited the value but didn't spill 124 /// it (because it was a constant, for instance). 125 SlotMapTy SlotMap; 126 127 /// Maps llvm IR values to the values they were de-duplicated to. 128 DenseMap<const Value *, const Value *> DuplicateMap; 129 130 SlotMapTy::const_iterator find(const Value *V) const { 131 auto DuplIt = DuplicateMap.find(V); 132 if (DuplIt != DuplicateMap.end()) 133 V = DuplIt->second; 134 return SlotMap.find(V); 135 } 136 137 SlotMapTy::const_iterator end() const { return SlotMap.end(); } 138 }; 139 140 /// Maps gc.statepoint instructions to their corresponding StatepointSpillMap 141 /// instances. 142 DenseMap<const Instruction *, StatepointSpillMap> StatepointSpillMaps; 143 144 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in 145 /// the entry block. This allows the allocas to be efficiently referenced 146 /// anywhere in the function. 147 DenseMap<const AllocaInst*, int> StaticAllocaMap; 148 149 /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments. 150 DenseMap<const Argument*, int> ByValArgFrameIndexMap; 151 152 /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for 153 /// function arguments that are inserted after scheduling is completed. 154 SmallVector<MachineInstr*, 8> ArgDbgValues; 155 156 /// RegFixups - Registers which need to be replaced after isel is done. 157 DenseMap<unsigned, unsigned> RegFixups; 158 159 /// StatepointStackSlots - A list of temporary stack slots (frame indices) 160 /// used to spill values at a statepoint. We store them here to enable 161 /// reuse of the same stack slots across different statepoints in different 162 /// basic blocks. 163 SmallVector<unsigned, 50> StatepointStackSlots; 164 165 /// MBB - The current block. 166 MachineBasicBlock *MBB; 167 168 /// MBB - The current insert position inside the current block. 169 MachineBasicBlock::iterator InsertPt; 170 171 struct LiveOutInfo { 172 unsigned NumSignBits : 31; 173 unsigned IsValid : 1; 174 APInt KnownOne, KnownZero; 175 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0), 176 KnownZero(1, 0) {} 177 }; 178 179 /// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) 180 /// for a value. 181 DenseMap<const Value *, ISD::NodeType> PreferredExtendType; 182 183 /// VisitedBBs - The set of basic blocks visited thus far by instruction 184 /// selection. 185 SmallPtrSet<const BasicBlock*, 4> VisitedBBs; 186 187 /// PHINodesToUpdate - A list of phi instructions whose operand list will 188 /// be updated after processing the current basic block. 189 /// TODO: This isn't per-function state, it's per-basic-block state. But 190 /// there's no other convenient place for it to live right now. 191 std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate; 192 unsigned OrigNumPHINodesToUpdate; 193 194 /// If the current MBB is a landing pad, the exception pointer and exception 195 /// selector registers are copied into these virtual registers by 196 /// SelectionDAGISel::PrepareEHLandingPad(). 197 unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg; 198 199 /// set - Initialize this FunctionLoweringInfo with the given Function 200 /// and its associated MachineFunction. 201 /// 202 void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG); 203 204 /// clear - Clear out all the function-specific state. This returns this 205 /// FunctionLoweringInfo to an empty state, ready to be used for a 206 /// different function. 207 void clear(); 208 209 /// isExportedInst - Return true if the specified value is an instruction 210 /// exported from its block. 211 bool isExportedInst(const Value *V) { 212 return ValueMap.count(V); 213 } 214 215 unsigned CreateReg(MVT VT); 216 217 unsigned CreateRegs(Type *Ty); 218 219 unsigned InitializeRegForValue(const Value *V) { 220 // Tokens never live in vregs. 221 if (V->getType()->isTokenTy()) 222 return 0; 223 unsigned &R = ValueMap[V]; 224 assert(R == 0 && "Already initialized this value register!"); 225 return R = CreateRegs(V->getType()); 226 } 227 228 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the 229 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. 230 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) { 231 if (!LiveOutRegInfo.inBounds(Reg)) 232 return nullptr; 233 234 const LiveOutInfo *LOI = &LiveOutRegInfo[Reg]; 235 if (!LOI->IsValid) 236 return nullptr; 237 238 return LOI; 239 } 240 241 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the 242 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If 243 /// the register's LiveOutInfo is for a smaller bit width, it is extended to 244 /// the larger bit width by zero extension. The bit width must be no smaller 245 /// than the LiveOutInfo's existing bit width. 246 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth); 247 248 /// AddLiveOutRegInfo - Adds LiveOutInfo for a register. 249 void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits, 250 const APInt &KnownZero, const APInt &KnownOne) { 251 // Only install this information if it tells us something. 252 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0) 253 return; 254 255 LiveOutRegInfo.grow(Reg); 256 LiveOutInfo &LOI = LiveOutRegInfo[Reg]; 257 LOI.NumSignBits = NumSignBits; 258 LOI.KnownOne = KnownOne; 259 LOI.KnownZero = KnownZero; 260 } 261 262 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination 263 /// register based on the LiveOutInfo of its operands. 264 void ComputePHILiveOutRegInfo(const PHINode*); 265 266 /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be 267 /// called when a block is visited before all of its predecessors. 268 void InvalidatePHILiveOutRegInfo(const PHINode *PN) { 269 // PHIs with no uses have no ValueMap entry. 270 DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN); 271 if (It == ValueMap.end()) 272 return; 273 274 unsigned Reg = It->second; 275 if (Reg == 0) 276 return; 277 278 LiveOutRegInfo.grow(Reg); 279 LiveOutRegInfo[Reg].IsValid = false; 280 } 281 282 /// setArgumentFrameIndex - Record frame index for the byval 283 /// argument. 284 void setArgumentFrameIndex(const Argument *A, int FI); 285 286 /// getArgumentFrameIndex - Get frame index for the byval argument. 287 int getArgumentFrameIndex(const Argument *A); 288 289 unsigned getCatchPadExceptionPointerVReg(const Value *CPI, 290 const TargetRegisterClass *RC); 291 292 private: 293 void addSEHHandlersForLPads(ArrayRef<const LandingPadInst *> LPads); 294 295 /// LiveOutRegInfo - Information about live out vregs. 296 IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo; 297 }; 298 299 } // end namespace llvm 300 301 #endif 302
