1 /* NDS32-specific support for 32-bit ELF. 2 Copyright (C) 2012-2016 Free Software Foundation, Inc. 3 Contributed by Andes Technology Corporation. 4 5 This file is part of BFD, the Binary File Descriptor library. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 23 #include "sysdep.h" 24 #include "bfd.h" 25 #include "bfd_stdint.h" 26 #include "bfdlink.h" 27 #include "libbfd.h" 28 #include "elf-bfd.h" 29 #include "libiberty.h" 30 #include "bfd_stdint.h" 31 #include "elf/nds32.h" 32 #include "opcode/nds32.h" 33 #include "elf32-nds32.h" 34 #include "opcode/cgen.h" 35 #include "../opcodes/nds32-opc.h" 36 37 /* Relocation HOWTO functions. */ 38 static bfd_reloc_status_type nds32_elf_ignore_reloc 39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 40 static bfd_reloc_status_type nds32_elf_9_pcrel_reloc 41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 42 static bfd_reloc_status_type nds32_elf_hi20_reloc 43 (bfd *, arelent *, asymbol *, void *, 44 asection *, bfd *, char **); 45 static bfd_reloc_status_type nds32_elf_lo12_reloc 46 (bfd *, arelent *, asymbol *, void *, 47 asection *, bfd *, char **); 48 static bfd_reloc_status_type nds32_elf_generic_reloc 49 (bfd *, arelent *, asymbol *, void *, 50 asection *, bfd *, char **); 51 static bfd_reloc_status_type nds32_elf_sda15_reloc 52 (bfd *, arelent *, asymbol *, void *, 53 asection *, bfd *, char **); 54 55 /* Helper functions for HOWTO. */ 56 static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc 57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma, 58 asection *, bfd_vma, bfd_vma); 59 static void nds32_elf_relocate_hi20 60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma); 61 static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup 62 (enum elf_nds32_reloc_type); 63 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup 64 (bfd *, bfd_reloc_code_real_type); 65 66 /* Target hooks. */ 67 static void nds32_info_to_howto_rel 68 (bfd *, arelent *, Elf_Internal_Rela *dst); 69 static void nds32_info_to_howto 70 (bfd *, arelent *, Elf_Internal_Rela *dst); 71 static bfd_boolean nds32_elf_add_symbol_hook 72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **, 73 flagword *, asection **, bfd_vma *); 74 static bfd_boolean nds32_elf_relocate_section 75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, 76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **); 77 static bfd_boolean nds32_elf_object_p (bfd *); 78 static void nds32_elf_final_write_processing (bfd *, bfd_boolean); 79 static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword); 80 static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *); 81 static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *); 82 static bfd_boolean nds32_elf_gc_sweep_hook 83 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); 84 static bfd_boolean nds32_elf_check_relocs 85 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); 86 static asection *nds32_elf_gc_mark_hook 87 (asection *, struct bfd_link_info *, Elf_Internal_Rela *, 88 struct elf_link_hash_entry *, Elf_Internal_Sym *); 89 static bfd_boolean nds32_elf_adjust_dynamic_symbol 90 (struct bfd_link_info *, struct elf_link_hash_entry *); 91 static bfd_boolean nds32_elf_size_dynamic_sections 92 (bfd *, struct bfd_link_info *); 93 static bfd_boolean nds32_elf_create_dynamic_sections 94 (bfd *, struct bfd_link_info *); 95 static bfd_boolean nds32_elf_finish_dynamic_sections 96 (bfd *, struct bfd_link_info *info); 97 static bfd_boolean nds32_elf_finish_dynamic_symbol 98 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *, 99 Elf_Internal_Sym *); 100 static bfd_boolean nds32_elf_mkobject (bfd *); 101 102 /* Nds32 helper functions. */ 103 static bfd_reloc_status_type nds32_elf_final_sda_base 104 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean); 105 static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *); 106 static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *); 107 static Elf_Internal_Rela *find_relocs_at_address 108 (Elf_Internal_Rela *, Elf_Internal_Rela *, 109 Elf_Internal_Rela *, enum elf_nds32_reloc_type); 110 static bfd_vma calculate_memory_address 111 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *); 112 static int nds32_get_section_contents (bfd *, asection *, 113 bfd_byte **, bfd_boolean); 114 static bfd_boolean nds32_elf_ex9_build_hash_table 115 (bfd *, asection *, struct bfd_link_info *); 116 static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *); 117 static void nds32_elf_ex9_import_table (struct bfd_link_info *); 118 static void nds32_elf_ex9_finish (struct bfd_link_info *); 119 static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *); 120 static void nds32_elf_get_insn_with_reg 121 (Elf_Internal_Rela *, uint32_t, uint32_t *); 122 static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED, 123 Elf_Internal_Sym **); 124 static bfd_boolean nds32_elf_ex9_replace_instruction 125 (struct bfd_link_info *, bfd *, asection *); 126 static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *, 127 asection *); 128 static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *); 129 static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *); 130 static bfd_boolean nds32_elf_ifc_reloc (void); 131 static bfd_boolean nds32_relax_fp_as_gp 132 (struct bfd_link_info *link_info, bfd *abfd, asection *sec, 133 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend, 134 Elf_Internal_Sym *isymbuf); 135 static bfd_boolean nds32_fag_remove_unused_fpbase 136 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs, 137 Elf_Internal_Rela *irelend); 138 static bfd_byte * 139 nds32_elf_get_relocated_section_contents (bfd *abfd, 140 struct bfd_link_info *link_info, 141 struct bfd_link_order *link_order, 142 bfd_byte *data, 143 bfd_boolean relocatable, 144 asymbol **symbols); 145 146 enum 147 { 148 MACH_V1 = bfd_mach_n1h, 149 MACH_V2 = bfd_mach_n1h_v2, 150 MACH_V3 = bfd_mach_n1h_v3, 151 MACH_V3M = bfd_mach_n1h_v3m 152 }; 153 154 #define MIN(a, b) ((a) > (b) ? (b) : (a)) 155 #define MAX(a, b) ((a) > (b) ? (a) : (b)) 156 157 /* The name of the dynamic interpreter. This is put in the .interp 158 section. */ 159 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" 160 161 /* The nop opcode we use. */ 162 #define NDS32_NOP32 0x40000009 163 #define NDS32_NOP16 0x9200 164 165 /* The size in bytes of an entry in the procedure linkage table. */ 166 #define PLT_ENTRY_SIZE 24 167 #define PLT_HEADER_SIZE 24 168 169 /* The first entry in a procedure linkage table are reserved, 170 and the initial contents are unimportant (we zero them out). 171 Subsequent entries look like this. */ 172 #define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */ 173 #define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */ 174 #define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */ 175 #define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */ 176 #define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */ 177 178 /* $ta is change to $r15 (from $r25). */ 179 #define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */ 180 #define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */ 181 #define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */ 182 #define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */ 183 #define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */ 184 #define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */ 185 186 #define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */ 187 #define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */ 188 #define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */ 189 #define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */ 190 #define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */ 191 192 #define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */ 193 #define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */ 194 #define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */ 195 #define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */ 196 #define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */ 197 #define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */ 198 199 /* These are macros used to get the relocation accurate value. */ 200 #define ACCURATE_8BIT_S1 (0x100) 201 #define ACCURATE_U9BIT_S1 (0x400) 202 #define ACCURATE_12BIT_S1 (0x2000) 203 #define ACCURATE_14BIT_S1 (0x4000) 204 #define ACCURATE_19BIT (0x40000) 205 206 /* These are macros used to get the relocation conservative value. */ 207 #define CONSERVATIVE_8BIT_S1 (0x100 - 4) 208 #define CONSERVATIVE_14BIT_S1 (0x4000 - 4) 209 #define CONSERVATIVE_16BIT_S1 (0x10000 - 4) 210 #define CONSERVATIVE_24BIT_S1 (0x1000000 - 4) 211 /* These must be more conservative because the address may be in 212 different segment. */ 213 #define CONSERVATIVE_15BIT (0x4000 - 0x1000) 214 #define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000) 215 #define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000) 216 #define CONSERVATIVE_19BIT (0x40000 - 0x1000) 217 #define CONSERVATIVE_20BIT (0x80000 - 0x1000) 218 219 /* Size of small data/bss sections, used to calculate SDA_BASE. */ 220 static long got_size = 0; 221 static int is_SDA_BASE_set = 0; 222 static int is_ITB_BASE_set = 0; 223 224 /* Convert ELF-VER in eflags to string for debugging purpose. */ 225 static const char *const nds32_elfver_strtab[] = 226 { 227 "ELF-1.2", 228 "ELF-1.3", 229 "ELF-1.4", 230 }; 231 232 /* The nds32 linker needs to keep track of the number of relocs that it 233 decides to copy in check_relocs for each symbol. This is so that 234 it can discard PC relative relocs if it doesn't need them when 235 linking with -Bsymbolic. We store the information in a field 236 extending the regular ELF linker hash table. */ 237 238 /* This structure keeps track of the number of PC relative relocs we 239 have copied for a given symbol. */ 240 241 struct elf_nds32_pcrel_relocs_copied 242 { 243 /* Next section. */ 244 struct elf_nds32_pcrel_relocs_copied *next; 245 /* A section in dynobj. */ 246 asection *section; 247 /* Number of relocs copied in this section. */ 248 bfd_size_type count; 249 }; 250 251 /* The sh linker needs to keep track of the number of relocs that it 252 decides to copy as dynamic relocs in check_relocs for each symbol. 253 This is so that it can later discard them if they are found to be 254 unnecessary. We store the information in a field extending the 255 regular ELF linker hash table. */ 256 257 struct elf_nds32_dyn_relocs 258 { 259 struct elf_nds32_dyn_relocs *next; 260 261 /* The input section of the reloc. */ 262 asection *sec; 263 264 /* Total number of relocs copied for the input section. */ 265 bfd_size_type count; 266 267 /* Number of pc-relative relocs copied for the input section. */ 268 bfd_size_type pc_count; 269 }; 270 271 /* Nds32 ELF linker hash entry. */ 272 273 struct elf_nds32_link_hash_entry 274 { 275 struct elf_link_hash_entry root; 276 277 /* Track dynamic relocs copied for this symbol. */ 278 struct elf_nds32_dyn_relocs *dyn_relocs; 279 280 /* For checking relocation type. */ 281 #define GOT_UNKNOWN 0 282 #define GOT_NORMAL 1 283 #define GOT_TLS_IE 2 284 unsigned int tls_type; 285 }; 286 287 /* Get the nds32 ELF linker hash table from a link_info structure. */ 288 289 #define FP_BASE_NAME "_FP_BASE_" 290 static int check_start_export_sym = 0; 291 static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */ 292 293 /* The offset for executable tls relaxation. */ 294 #define TP_OFFSET 0x0 295 296 struct elf_nds32_obj_tdata 297 { 298 struct elf_obj_tdata root; 299 300 /* tls_type for each local got entry. */ 301 char *local_got_tls_type; 302 }; 303 304 #define elf_nds32_tdata(bfd) \ 305 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any) 306 307 #define elf32_nds32_local_got_tls_type(bfd) \ 308 (elf_nds32_tdata (bfd)->local_got_tls_type) 309 310 #define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent)) 311 312 static bfd_boolean 313 nds32_elf_mkobject (bfd *abfd) 314 { 315 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata), 316 NDS32_ELF_DATA); 317 } 318 319 /* Relocations used for relocation. */ 320 static reloc_howto_type nds32_elf_howto_table[] = 321 { 322 /* This reloc does nothing. */ 323 HOWTO (R_NDS32_NONE, /* type */ 324 0, /* rightshift */ 325 3, /* size (0 = byte, 1 = short, 2 = long) */ 326 0, /* bitsize */ 327 FALSE, /* pc_relative */ 328 0, /* bitpos */ 329 complain_overflow_dont, /* complain_on_overflow */ 330 bfd_elf_generic_reloc, /* special_function */ 331 "R_NDS32_NONE", /* name */ 332 FALSE, /* partial_inplace */ 333 0, /* src_mask */ 334 0, /* dst_mask */ 335 FALSE), /* pcrel_offset */ 336 337 /* A 16 bit absolute relocation. */ 338 HOWTO (R_NDS32_16, /* type */ 339 0, /* rightshift */ 340 1, /* size (0 = byte, 1 = short, 2 = long) */ 341 16, /* bitsize */ 342 FALSE, /* pc_relative */ 343 0, /* bitpos */ 344 complain_overflow_bitfield, /* complain_on_overflow */ 345 nds32_elf_generic_reloc, /* special_function */ 346 "R_NDS32_16", /* name */ 347 FALSE, /* partial_inplace */ 348 0xffff, /* src_mask */ 349 0xffff, /* dst_mask */ 350 FALSE), /* pcrel_offset */ 351 352 /* A 32 bit absolute relocation. */ 353 HOWTO (R_NDS32_32, /* type */ 354 0, /* rightshift */ 355 2, /* size (0 = byte, 1 = short, 2 = long) */ 356 32, /* bitsize */ 357 FALSE, /* pc_relative */ 358 0, /* bitpos */ 359 complain_overflow_bitfield, /* complain_on_overflow */ 360 nds32_elf_generic_reloc, /* special_function */ 361 "R_NDS32_32", /* name */ 362 FALSE, /* partial_inplace */ 363 0xffffffff, /* src_mask */ 364 0xffffffff, /* dst_mask */ 365 FALSE), /* pcrel_offset */ 366 367 /* A 20 bit address. */ 368 HOWTO (R_NDS32_20, /* type */ 369 0, /* rightshift */ 370 2, /* size (0 = byte, 1 = short, 2 = long) */ 371 20, /* bitsize */ 372 FALSE, /* pc_relative */ 373 0, /* bitpos */ 374 complain_overflow_unsigned, /* complain_on_overflow */ 375 nds32_elf_generic_reloc, /* special_function */ 376 "R_NDS32_20", /* name */ 377 FALSE, /* partial_inplace */ 378 0xfffff, /* src_mask */ 379 0xfffff, /* dst_mask */ 380 FALSE), /* pcrel_offset */ 381 382 /* An PC Relative 9-bit relocation, shifted by 2. 383 This reloc is complicated because relocations are relative to pc & -4. 384 i.e. branches in the right insn slot use the address of the left insn 385 slot for pc. */ 386 /* ??? It's not clear whether this should have partial_inplace set or not. 387 Branch relaxing in the assembler can store the addend in the insn, 388 and if bfd_install_relocation gets called the addend may get added 389 again. */ 390 HOWTO (R_NDS32_9_PCREL, /* type */ 391 1, /* rightshift */ 392 1, /* size (0 = byte, 1 = short, 2 = long) */ 393 8, /* bitsize */ 394 TRUE, /* pc_relative */ 395 0, /* bitpos */ 396 complain_overflow_signed, /* complain_on_overflow */ 397 nds32_elf_9_pcrel_reloc, /* special_function */ 398 "R_NDS32_9_PCREL", /* name */ 399 FALSE, /* partial_inplace */ 400 0xff, /* src_mask */ 401 0xff, /* dst_mask */ 402 TRUE), /* pcrel_offset */ 403 404 /* A relative 15 bit relocation, right shifted by 1. */ 405 HOWTO (R_NDS32_15_PCREL, /* type */ 406 1, /* rightshift */ 407 2, /* size (0 = byte, 1 = short, 2 = long) */ 408 14, /* bitsize */ 409 TRUE, /* pc_relative */ 410 0, /* bitpos */ 411 complain_overflow_signed, /* complain_on_overflow */ 412 bfd_elf_generic_reloc, /* special_function */ 413 "R_NDS32_15_PCREL", /* name */ 414 FALSE, /* partial_inplace */ 415 0x3fff, /* src_mask */ 416 0x3fff, /* dst_mask */ 417 TRUE), /* pcrel_offset */ 418 419 /* A relative 17 bit relocation, right shifted by 1. */ 420 HOWTO (R_NDS32_17_PCREL, /* type */ 421 1, /* rightshift */ 422 2, /* size (0 = byte, 1 = short, 2 = long) */ 423 16, /* bitsize */ 424 TRUE, /* pc_relative */ 425 0, /* bitpos */ 426 complain_overflow_signed, /* complain_on_overflow */ 427 bfd_elf_generic_reloc, /* special_function */ 428 "R_NDS32_17_PCREL", /* name */ 429 FALSE, /* partial_inplace */ 430 0xffff, /* src_mask */ 431 0xffff, /* dst_mask */ 432 TRUE), /* pcrel_offset */ 433 434 /* A relative 25 bit relocation, right shifted by 1. */ 435 /* ??? It's not clear whether this should have partial_inplace set or not. 436 Branch relaxing in the assembler can store the addend in the insn, 437 and if bfd_install_relocation gets called the addend may get added 438 again. */ 439 HOWTO (R_NDS32_25_PCREL, /* type */ 440 1, /* rightshift */ 441 2, /* size (0 = byte, 1 = short, 2 = long) */ 442 24, /* bitsize */ 443 TRUE, /* pc_relative */ 444 0, /* bitpos */ 445 complain_overflow_signed, /* complain_on_overflow */ 446 bfd_elf_generic_reloc, /* special_function */ 447 "R_NDS32_25_PCREL", /* name */ 448 FALSE, /* partial_inplace */ 449 0xffffff, /* src_mask */ 450 0xffffff, /* dst_mask */ 451 TRUE), /* pcrel_offset */ 452 453 /* High 20 bits of address when lower 12 is or'd in. */ 454 HOWTO (R_NDS32_HI20, /* type */ 455 12, /* rightshift */ 456 2, /* size (0 = byte, 1 = short, 2 = long) */ 457 20, /* bitsize */ 458 FALSE, /* pc_relative */ 459 0, /* bitpos */ 460 complain_overflow_dont,/* complain_on_overflow */ 461 nds32_elf_hi20_reloc, /* special_function */ 462 "R_NDS32_HI20", /* name */ 463 FALSE, /* partial_inplace */ 464 0x000fffff, /* src_mask */ 465 0x000fffff, /* dst_mask */ 466 FALSE), /* pcrel_offset */ 467 468 /* Lower 12 bits of address. */ 469 HOWTO (R_NDS32_LO12S3, /* type */ 470 3, /* rightshift */ 471 2, /* size (0 = byte, 1 = short, 2 = long) */ 472 9, /* bitsize */ 473 FALSE, /* pc_relative */ 474 0, /* bitpos */ 475 complain_overflow_dont,/* complain_on_overflow */ 476 nds32_elf_lo12_reloc, /* special_function */ 477 "R_NDS32_LO12S3", /* name */ 478 FALSE, /* partial_inplace */ 479 0x000001ff, /* src_mask */ 480 0x000001ff, /* dst_mask */ 481 FALSE), /* pcrel_offset */ 482 483 /* Lower 12 bits of address. */ 484 HOWTO (R_NDS32_LO12S2, /* type */ 485 2, /* rightshift */ 486 2, /* size (0 = byte, 1 = short, 2 = long) */ 487 10, /* bitsize */ 488 FALSE, /* pc_relative */ 489 0, /* bitpos */ 490 complain_overflow_dont,/* complain_on_overflow */ 491 nds32_elf_lo12_reloc, /* special_function */ 492 "R_NDS32_LO12S2", /* name */ 493 FALSE, /* partial_inplace */ 494 0x000003ff, /* src_mask */ 495 0x000003ff, /* dst_mask */ 496 FALSE), /* pcrel_offset */ 497 498 /* Lower 12 bits of address. */ 499 HOWTO (R_NDS32_LO12S1, /* type */ 500 1, /* rightshift */ 501 2, /* size (0 = byte, 1 = short, 2 = long) */ 502 11, /* bitsize */ 503 FALSE, /* pc_relative */ 504 0, /* bitpos */ 505 complain_overflow_dont,/* complain_on_overflow */ 506 nds32_elf_lo12_reloc, /* special_function */ 507 "R_NDS32_LO12S1", /* name */ 508 FALSE, /* partial_inplace */ 509 0x000007ff, /* src_mask */ 510 0x000007ff, /* dst_mask */ 511 FALSE), /* pcrel_offset */ 512 513 /* Lower 12 bits of address. */ 514 HOWTO (R_NDS32_LO12S0, /* type */ 515 0, /* rightshift */ 516 2, /* size (0 = byte, 1 = short, 2 = long) */ 517 12, /* bitsize */ 518 FALSE, /* pc_relative */ 519 0, /* bitpos */ 520 complain_overflow_dont,/* complain_on_overflow */ 521 nds32_elf_lo12_reloc, /* special_function */ 522 "R_NDS32_LO12S0", /* name */ 523 FALSE, /* partial_inplace */ 524 0x00000fff, /* src_mask */ 525 0x00000fff, /* dst_mask */ 526 FALSE), /* pcrel_offset */ 527 528 /* Small data area 15 bits offset. */ 529 HOWTO (R_NDS32_SDA15S3, /* type */ 530 3, /* rightshift */ 531 2, /* size (0 = byte, 1 = short, 2 = long) */ 532 15, /* bitsize */ 533 FALSE, /* pc_relative */ 534 0, /* bitpos */ 535 complain_overflow_signed, /* complain_on_overflow */ 536 nds32_elf_sda15_reloc, /* special_function */ 537 "R_NDS32_SDA15S3", /* name */ 538 FALSE, /* partial_inplace */ 539 0x00007fff, /* src_mask */ 540 0x00007fff, /* dst_mask */ 541 FALSE), /* pcrel_offset */ 542 543 /* Small data area 15 bits offset. */ 544 HOWTO (R_NDS32_SDA15S2, /* type */ 545 2, /* rightshift */ 546 2, /* size (0 = byte, 1 = short, 2 = long) */ 547 15, /* bitsize */ 548 FALSE, /* pc_relative */ 549 0, /* bitpos */ 550 complain_overflow_signed, /* complain_on_overflow */ 551 nds32_elf_sda15_reloc, /* special_function */ 552 "R_NDS32_SDA15S2", /* name */ 553 FALSE, /* partial_inplace */ 554 0x00007fff, /* src_mask */ 555 0x00007fff, /* dst_mask */ 556 FALSE), /* pcrel_offset */ 557 558 /* Small data area 15 bits offset. */ 559 HOWTO (R_NDS32_SDA15S1, /* type */ 560 1, /* rightshift */ 561 2, /* size (0 = byte, 1 = short, 2 = long) */ 562 15, /* bitsize */ 563 FALSE, /* pc_relative */ 564 0, /* bitpos */ 565 complain_overflow_signed, /* complain_on_overflow */ 566 nds32_elf_sda15_reloc, /* special_function */ 567 "R_NDS32_SDA15S1", /* name */ 568 FALSE, /* partial_inplace */ 569 0x00007fff, /* src_mask */ 570 0x00007fff, /* dst_mask */ 571 FALSE), /* pcrel_offset */ 572 573 /* Small data area 15 bits offset. */ 574 HOWTO (R_NDS32_SDA15S0, /* type */ 575 0, /* rightshift */ 576 2, /* size (0 = byte, 1 = short, 2 = long) */ 577 15, /* bitsize */ 578 FALSE, /* pc_relative */ 579 0, /* bitpos */ 580 complain_overflow_signed, /* complain_on_overflow */ 581 nds32_elf_sda15_reloc, /* special_function */ 582 "R_NDS32_SDA15S0", /* name */ 583 FALSE, /* partial_inplace */ 584 0x00007fff, /* src_mask */ 585 0x00007fff, /* dst_mask */ 586 FALSE), /* pcrel_offset */ 587 588 /* GNU extension to record C++ vtable hierarchy */ 589 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */ 590 0, /* rightshift */ 591 2, /* size (0 = byte, 1 = short, 2 = long) */ 592 0, /* bitsize */ 593 FALSE, /* pc_relative */ 594 0, /* bitpos */ 595 complain_overflow_dont,/* complain_on_overflow */ 596 NULL, /* special_function */ 597 "R_NDS32_GNU_VTINHERIT", /* name */ 598 FALSE, /* partial_inplace */ 599 0, /* src_mask */ 600 0, /* dst_mask */ 601 FALSE), /* pcrel_offset */ 602 603 /* GNU extension to record C++ vtable member usage */ 604 HOWTO (R_NDS32_GNU_VTENTRY, /* type */ 605 0, /* rightshift */ 606 2, /* size (0 = byte, 1 = short, 2 = long) */ 607 0, /* bitsize */ 608 FALSE, /* pc_relative */ 609 0, /* bitpos */ 610 complain_overflow_dont,/* complain_on_overflow */ 611 _bfd_elf_rel_vtable_reloc_fn, /* special_function */ 612 "R_NDS32_GNU_VTENTRY", /* name */ 613 FALSE, /* partial_inplace */ 614 0, /* src_mask */ 615 0, /* dst_mask */ 616 FALSE), /* pcrel_offset */ 617 618 /* A 16 bit absolute relocation. */ 619 HOWTO (R_NDS32_16_RELA, /* type */ 620 0, /* rightshift */ 621 1, /* size (0 = byte, 1 = short, 2 = long) */ 622 16, /* bitsize */ 623 FALSE, /* pc_relative */ 624 0, /* bitpos */ 625 complain_overflow_bitfield, /* complain_on_overflow */ 626 bfd_elf_generic_reloc, /* special_function */ 627 "R_NDS32_16_RELA", /* name */ 628 FALSE, /* partial_inplace */ 629 0xffff, /* src_mask */ 630 0xffff, /* dst_mask */ 631 FALSE), /* pcrel_offset */ 632 633 /* A 32 bit absolute relocation. */ 634 HOWTO (R_NDS32_32_RELA, /* type */ 635 0, /* rightshift */ 636 2, /* size (0 = byte, 1 = short, 2 = long) */ 637 32, /* bitsize */ 638 FALSE, /* pc_relative */ 639 0, /* bitpos */ 640 complain_overflow_bitfield, /* complain_on_overflow */ 641 bfd_elf_generic_reloc, /* special_function */ 642 "R_NDS32_32_RELA", /* name */ 643 FALSE, /* partial_inplace */ 644 0xffffffff, /* src_mask */ 645 0xffffffff, /* dst_mask */ 646 FALSE), /* pcrel_offset */ 647 648 /* A 20 bit address. */ 649 HOWTO (R_NDS32_20_RELA, /* type */ 650 0, /* rightshift */ 651 2, /* size (0 = byte, 1 = short, 2 = long) */ 652 20, /* bitsize */ 653 FALSE, /* pc_relative */ 654 0, /* bitpos */ 655 complain_overflow_signed, /* complain_on_overflow */ 656 bfd_elf_generic_reloc, /* special_function */ 657 "R_NDS32_20_RELA", /* name */ 658 FALSE, /* partial_inplace */ 659 0xfffff, /* src_mask */ 660 0xfffff, /* dst_mask */ 661 FALSE), /* pcrel_offset */ 662 663 HOWTO (R_NDS32_9_PCREL_RELA, /* type */ 664 1, /* rightshift */ 665 1, /* size (0 = byte, 1 = short, 2 = long) */ 666 8, /* bitsize */ 667 TRUE, /* pc_relative */ 668 0, /* bitpos */ 669 complain_overflow_signed, /* complain_on_overflow */ 670 bfd_elf_generic_reloc, /* special_function */ 671 "R_NDS32_9_PCREL_RELA",/* name */ 672 FALSE, /* partial_inplace */ 673 0xff, /* src_mask */ 674 0xff, /* dst_mask */ 675 TRUE), /* pcrel_offset */ 676 677 /* A relative 15 bit relocation, right shifted by 1. */ 678 HOWTO (R_NDS32_15_PCREL_RELA, /* type */ 679 1, /* rightshift */ 680 2, /* size (0 = byte, 1 = short, 2 = long) */ 681 14, /* bitsize */ 682 TRUE, /* pc_relative */ 683 0, /* bitpos */ 684 complain_overflow_signed, /* complain_on_overflow */ 685 bfd_elf_generic_reloc, /* special_function */ 686 "R_NDS32_15_PCREL_RELA", /* name */ 687 FALSE, /* partial_inplace */ 688 0x3fff, /* src_mask */ 689 0x3fff, /* dst_mask */ 690 TRUE), /* pcrel_offset */ 691 692 /* A relative 17 bit relocation, right shifted by 1. */ 693 HOWTO (R_NDS32_17_PCREL_RELA, /* type */ 694 1, /* rightshift */ 695 2, /* size (0 = byte, 1 = short, 2 = long) */ 696 16, /* bitsize */ 697 TRUE, /* pc_relative */ 698 0, /* bitpos */ 699 complain_overflow_signed, /* complain_on_overflow */ 700 bfd_elf_generic_reloc, /* special_function */ 701 "R_NDS32_17_PCREL_RELA", /* name */ 702 FALSE, /* partial_inplace */ 703 0xffff, /* src_mask */ 704 0xffff, /* dst_mask */ 705 TRUE), /* pcrel_offset */ 706 707 /* A relative 25 bit relocation, right shifted by 2. */ 708 HOWTO (R_NDS32_25_PCREL_RELA, /* type */ 709 1, /* rightshift */ 710 2, /* size (0 = byte, 1 = short, 2 = long) */ 711 24, /* bitsize */ 712 TRUE, /* pc_relative */ 713 0, /* bitpos */ 714 complain_overflow_signed, /* complain_on_overflow */ 715 bfd_elf_generic_reloc, /* special_function */ 716 "R_NDS32_25_PCREL_RELA", /* name */ 717 FALSE, /* partial_inplace */ 718 0xffffff, /* src_mask */ 719 0xffffff, /* dst_mask */ 720 TRUE), /* pcrel_offset */ 721 722 /* High 20 bits of address when lower 16 is or'd in. */ 723 HOWTO (R_NDS32_HI20_RELA, /* type */ 724 12, /* rightshift */ 725 2, /* size (0 = byte, 1 = short, 2 = long) */ 726 20, /* bitsize */ 727 FALSE, /* pc_relative */ 728 0, /* bitpos */ 729 complain_overflow_dont,/* complain_on_overflow */ 730 bfd_elf_generic_reloc, /* special_function */ 731 "R_NDS32_HI20_RELA", /* name */ 732 FALSE, /* partial_inplace */ 733 0x000fffff, /* src_mask */ 734 0x000fffff, /* dst_mask */ 735 FALSE), /* pcrel_offset */ 736 737 /* Lower 12 bits of address. */ 738 HOWTO (R_NDS32_LO12S3_RELA, /* type */ 739 3, /* rightshift */ 740 2, /* size (0 = byte, 1 = short, 2 = long) */ 741 9, /* bitsize */ 742 FALSE, /* pc_relative */ 743 0, /* bitpos */ 744 complain_overflow_dont,/* complain_on_overflow */ 745 bfd_elf_generic_reloc, /* special_function */ 746 "R_NDS32_LO12S3_RELA", /* name */ 747 FALSE, /* partial_inplace */ 748 0x000001ff, /* src_mask */ 749 0x000001ff, /* dst_mask */ 750 FALSE), /* pcrel_offset */ 751 752 /* Lower 12 bits of address. */ 753 HOWTO (R_NDS32_LO12S2_RELA, /* type */ 754 2, /* rightshift */ 755 2, /* size (0 = byte, 1 = short, 2 = long) */ 756 10, /* bitsize */ 757 FALSE, /* pc_relative */ 758 0, /* bitpos */ 759 complain_overflow_dont,/* complain_on_overflow */ 760 bfd_elf_generic_reloc, /* special_function */ 761 "R_NDS32_LO12S2_RELA", /* name */ 762 FALSE, /* partial_inplace */ 763 0x000003ff, /* src_mask */ 764 0x000003ff, /* dst_mask */ 765 FALSE), /* pcrel_offset */ 766 767 /* Lower 12 bits of address. */ 768 HOWTO (R_NDS32_LO12S1_RELA, /* type */ 769 1, /* rightshift */ 770 2, /* size (0 = byte, 1 = short, 2 = long) */ 771 11, /* bitsize */ 772 FALSE, /* pc_relative */ 773 0, /* bitpos */ 774 complain_overflow_dont,/* complain_on_overflow */ 775 bfd_elf_generic_reloc, /* special_function */ 776 "R_NDS32_LO12S1_RELA", /* name */ 777 FALSE, /* partial_inplace */ 778 0x000007ff, /* src_mask */ 779 0x000007ff, /* dst_mask */ 780 FALSE), /* pcrel_offset */ 781 782 /* Lower 12 bits of address. */ 783 HOWTO (R_NDS32_LO12S0_RELA, /* type */ 784 0, /* rightshift */ 785 2, /* size (0 = byte, 1 = short, 2 = long) */ 786 12, /* bitsize */ 787 FALSE, /* pc_relative */ 788 0, /* bitpos */ 789 complain_overflow_dont,/* complain_on_overflow */ 790 bfd_elf_generic_reloc, /* special_function */ 791 "R_NDS32_LO12S0_RELA", /* name */ 792 FALSE, /* partial_inplace */ 793 0x00000fff, /* src_mask */ 794 0x00000fff, /* dst_mask */ 795 FALSE), /* pcrel_offset */ 796 797 /* Small data area 15 bits offset. */ 798 HOWTO (R_NDS32_SDA15S3_RELA, /* type */ 799 3, /* rightshift */ 800 2, /* size (0 = byte, 1 = short, 2 = long) */ 801 15, /* bitsize */ 802 FALSE, /* pc_relative */ 803 0, /* bitpos */ 804 complain_overflow_signed, /* complain_on_overflow */ 805 bfd_elf_generic_reloc, /* special_function */ 806 "R_NDS32_SDA15S3_RELA",/* name */ 807 FALSE, /* partial_inplace */ 808 0x00007fff, /* src_mask */ 809 0x00007fff, /* dst_mask */ 810 FALSE), /* pcrel_offset */ 811 812 /* Small data area 15 bits offset. */ 813 HOWTO (R_NDS32_SDA15S2_RELA, /* type */ 814 2, /* rightshift */ 815 2, /* size (0 = byte, 1 = short, 2 = long) */ 816 15, /* bitsize */ 817 FALSE, /* pc_relative */ 818 0, /* bitpos */ 819 complain_overflow_signed, /* complain_on_overflow */ 820 bfd_elf_generic_reloc, /* special_function */ 821 "R_NDS32_SDA15S2_RELA",/* name */ 822 FALSE, /* partial_inplace */ 823 0x00007fff, /* src_mask */ 824 0x00007fff, /* dst_mask */ 825 FALSE), /* pcrel_offset */ 826 827 HOWTO (R_NDS32_SDA15S1_RELA, /* type */ 828 1, /* rightshift */ 829 2, /* size (0 = byte, 1 = short, 2 = long) */ 830 15, /* bitsize */ 831 FALSE, /* pc_relative */ 832 0, /* bitpos */ 833 complain_overflow_signed, /* complain_on_overflow */ 834 bfd_elf_generic_reloc, /* special_function */ 835 "R_NDS32_SDA15S1_RELA",/* name */ 836 FALSE, /* partial_inplace */ 837 0x00007fff, /* src_mask */ 838 0x00007fff, /* dst_mask */ 839 FALSE), /* pcrel_offset */ 840 841 HOWTO (R_NDS32_SDA15S0_RELA, /* type */ 842 0, /* rightshift */ 843 2, /* size (0 = byte, 1 = short, 2 = long) */ 844 15, /* bitsize */ 845 FALSE, /* pc_relative */ 846 0, /* bitpos */ 847 complain_overflow_signed, /* complain_on_overflow */ 848 bfd_elf_generic_reloc, /* special_function */ 849 "R_NDS32_SDA15S0_RELA",/* name */ 850 FALSE, /* partial_inplace */ 851 0x00007fff, /* src_mask */ 852 0x00007fff, /* dst_mask */ 853 FALSE), /* pcrel_offset */ 854 855 /* GNU extension to record C++ vtable hierarchy */ 856 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */ 857 0, /* rightshift */ 858 2, /* size (0 = byte, 1 = short, 2 = long) */ 859 0, /* bitsize */ 860 FALSE, /* pc_relative */ 861 0, /* bitpos */ 862 complain_overflow_dont,/* complain_on_overflow */ 863 NULL, /* special_function */ 864 "R_NDS32_RELA_GNU_VTINHERIT", /* name */ 865 FALSE, /* partial_inplace */ 866 0, /* src_mask */ 867 0, /* dst_mask */ 868 FALSE), /* pcrel_offset */ 869 870 /* GNU extension to record C++ vtable member usage */ 871 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */ 872 0, /* rightshift */ 873 2, /* size (0 = byte, 1 = short, 2 = long) */ 874 0, /* bitsize */ 875 FALSE, /* pc_relative */ 876 0, /* bitpos */ 877 complain_overflow_dont,/* complain_on_overflow */ 878 _bfd_elf_rel_vtable_reloc_fn, /* special_function */ 879 "R_NDS32_RELA_GNU_VTENTRY", /* name */ 880 FALSE, /* partial_inplace */ 881 0, /* src_mask */ 882 0, /* dst_mask */ 883 FALSE), /* pcrel_offset */ 884 885 /* Like R_NDS32_20, but referring to the GOT table entry for 886 the symbol. */ 887 HOWTO (R_NDS32_GOT20, /* type */ 888 0, /* rightshift */ 889 2, /* size (0 = byte, 1 = short, 2 = long) */ 890 20, /* bitsize */ 891 FALSE, /* pc_relative */ 892 0, /* bitpos */ 893 complain_overflow_signed, /* complain_on_overflow */ 894 bfd_elf_generic_reloc, /* special_function */ 895 "R_NDS32_GOT20", /* name */ 896 FALSE, /* partial_inplace */ 897 0xfffff, /* src_mask */ 898 0xfffff, /* dst_mask */ 899 FALSE), /* pcrel_offset */ 900 901 /* Like R_NDS32_PCREL, but referring to the procedure linkage table 902 entry for the symbol. */ 903 HOWTO (R_NDS32_25_PLTREL, /* type */ 904 1, /* rightshift */ 905 2, /* size (0 = byte, 1 = short, 2 = long) */ 906 24, /* bitsize */ 907 TRUE, /* pc_relative */ 908 0, /* bitpos */ 909 complain_overflow_signed, /* complain_on_overflow */ 910 bfd_elf_generic_reloc, /* special_function */ 911 "R_NDS32_25_PLTREL", /* name */ 912 FALSE, /* partial_inplace */ 913 0xffffff, /* src_mask */ 914 0xffffff, /* dst_mask */ 915 TRUE), /* pcrel_offset */ 916 917 /* This is used only by the dynamic linker. The symbol should exist 918 both in the object being run and in some shared library. The 919 dynamic linker copies the data addressed by the symbol from the 920 shared library into the object, because the object being 921 run has to have the data at some particular address. */ 922 HOWTO (R_NDS32_COPY, /* type */ 923 0, /* rightshift */ 924 2, /* size (0 = byte, 1 = short, 2 = long) */ 925 32, /* bitsize */ 926 FALSE, /* pc_relative */ 927 0, /* bitpos */ 928 complain_overflow_bitfield, /* complain_on_overflow */ 929 bfd_elf_generic_reloc, /* special_function */ 930 "R_NDS32_COPY", /* name */ 931 FALSE, /* partial_inplace */ 932 0xffffffff, /* src_mask */ 933 0xffffffff, /* dst_mask */ 934 FALSE), /* pcrel_offset */ 935 936 /* Like R_NDS32_20, but used when setting global offset table 937 entries. */ 938 HOWTO (R_NDS32_GLOB_DAT, /* type */ 939 0, /* rightshift */ 940 2, /* size (0 = byte, 1 = short, 2 = long) */ 941 32, /* bitsize */ 942 FALSE, /* pc_relative */ 943 0, /* bitpos */ 944 complain_overflow_bitfield, /* complain_on_overflow */ 945 bfd_elf_generic_reloc, /* special_function */ 946 "R_NDS32_GLOB_DAT", /* name */ 947 FALSE, /* partial_inplace */ 948 0xffffffff, /* src_mask */ 949 0xffffffff, /* dst_mask */ 950 FALSE), /* pcrel_offset */ 951 952 /* Marks a procedure linkage table entry for a symbol. */ 953 HOWTO (R_NDS32_JMP_SLOT, /* type */ 954 0, /* rightshift */ 955 2, /* size (0 = byte, 1 = short, 2 = long) */ 956 32, /* bitsize */ 957 FALSE, /* pc_relative */ 958 0, /* bitpos */ 959 complain_overflow_bitfield, /* complain_on_overflow */ 960 bfd_elf_generic_reloc, /* special_function */ 961 "R_NDS32_JMP_SLOT", /* name */ 962 FALSE, /* partial_inplace */ 963 0xffffffff, /* src_mask */ 964 0xffffffff, /* dst_mask */ 965 FALSE), /* pcrel_offset */ 966 967 /* Used only by the dynamic linker. When the object is run, this 968 longword is set to the load address of the object, plus the 969 addend. */ 970 HOWTO (R_NDS32_RELATIVE, /* type */ 971 0, /* rightshift */ 972 2, /* size (0 = byte, 1 = short, 2 = long) */ 973 32, /* bitsize */ 974 FALSE, /* pc_relative */ 975 0, /* bitpos */ 976 complain_overflow_bitfield, /* complain_on_overflow */ 977 bfd_elf_generic_reloc, /* special_function */ 978 "R_NDS32_RELATIVE", /* name */ 979 FALSE, /* partial_inplace */ 980 0xffffffff, /* src_mask */ 981 0xffffffff, /* dst_mask */ 982 FALSE), /* pcrel_offset */ 983 984 HOWTO (R_NDS32_GOTOFF, /* type */ 985 0, /* rightshift */ 986 2, /* size (0 = byte, 1 = short, 2 = long) */ 987 20, /* bitsize */ 988 FALSE, /* pc_relative */ 989 0, /* bitpos */ 990 complain_overflow_signed, /* complain_on_overflow */ 991 bfd_elf_generic_reloc, /* special_function */ 992 "R_NDS32_GOTOFF", /* name */ 993 FALSE, /* partial_inplace */ 994 0xfffff, /* src_mask */ 995 0xfffff, /* dst_mask */ 996 FALSE), /* pcrel_offset */ 997 998 /* An PC Relative 20-bit relocation used when setting PIC offset 999 table register. */ 1000 HOWTO (R_NDS32_GOTPC20, /* type */ 1001 0, /* rightshift */ 1002 2, /* size (0 = byte, 1 = short, 2 = long) */ 1003 20, /* bitsize */ 1004 TRUE, /* pc_relative */ 1005 0, /* bitpos */ 1006 complain_overflow_signed, /* complain_on_overflow */ 1007 bfd_elf_generic_reloc, /* special_function */ 1008 "R_NDS32_GOTPC20", /* name */ 1009 FALSE, /* partial_inplace */ 1010 0xfffff, /* src_mask */ 1011 0xfffff, /* dst_mask */ 1012 TRUE), /* pcrel_offset */ 1013 1014 /* Like R_NDS32_HI20, but referring to the GOT table entry for 1015 the symbol. */ 1016 HOWTO (R_NDS32_GOT_HI20, /* type */ 1017 12, /* rightshift */ 1018 2, /* size (0 = byte, 1 = short, 2 = long) */ 1019 20, /* bitsize */ 1020 FALSE, /* pc_relative */ 1021 0, /* bitpos */ 1022 complain_overflow_dont,/* complain_on_overflow */ 1023 bfd_elf_generic_reloc, /* special_function */ 1024 "R_NDS32_GOT_HI20", /* name */ 1025 FALSE, /* partial_inplace */ 1026 0x000fffff, /* src_mask */ 1027 0x000fffff, /* dst_mask */ 1028 FALSE), /* pcrel_offset */ 1029 HOWTO (R_NDS32_GOT_LO12, /* type */ 1030 0, /* rightshift */ 1031 2, /* size (0 = byte, 1 = short, 2 = long) */ 1032 12, /* bitsize */ 1033 FALSE, /* pc_relative */ 1034 0, /* bitpos */ 1035 complain_overflow_dont,/* complain_on_overflow */ 1036 bfd_elf_generic_reloc, /* special_function */ 1037 "R_NDS32_GOT_LO12", /* name */ 1038 FALSE, /* partial_inplace */ 1039 0x00000fff, /* src_mask */ 1040 0x00000fff, /* dst_mask */ 1041 FALSE), /* pcrel_offset */ 1042 1043 /* An PC Relative relocation used when setting PIC offset table register. 1044 Like R_NDS32_HI20, but referring to the GOT table entry for 1045 the symbol. */ 1046 HOWTO (R_NDS32_GOTPC_HI20, /* type */ 1047 12, /* rightshift */ 1048 2, /* size (0 = byte, 1 = short, 2 = long) */ 1049 20, /* bitsize */ 1050 FALSE, /* pc_relative */ 1051 0, /* bitpos */ 1052 complain_overflow_dont,/* complain_on_overflow */ 1053 bfd_elf_generic_reloc, /* special_function */ 1054 "R_NDS32_GOTPC_HI20", /* name */ 1055 FALSE, /* partial_inplace */ 1056 0x000fffff, /* src_mask */ 1057 0x000fffff, /* dst_mask */ 1058 TRUE), /* pcrel_offset */ 1059 HOWTO (R_NDS32_GOTPC_LO12, /* type */ 1060 0, /* rightshift */ 1061 2, /* size (0 = byte, 1 = short, 2 = long) */ 1062 12, /* bitsize */ 1063 FALSE, /* pc_relative */ 1064 0, /* bitpos */ 1065 complain_overflow_dont, /* complain_on_overflow */ 1066 bfd_elf_generic_reloc, /* special_function */ 1067 "R_NDS32_GOTPC_LO12", /* name */ 1068 FALSE, /* partial_inplace */ 1069 0x00000fff, /* src_mask */ 1070 0x00000fff, /* dst_mask */ 1071 TRUE), /* pcrel_offset */ 1072 1073 HOWTO (R_NDS32_GOTOFF_HI20, /* type */ 1074 12, /* rightshift */ 1075 2, /* size (0 = byte, 1 = short, 2 = long) */ 1076 20, /* bitsize */ 1077 FALSE, /* pc_relative */ 1078 0, /* bitpos */ 1079 complain_overflow_dont,/* complain_on_overflow */ 1080 bfd_elf_generic_reloc, /* special_function */ 1081 "R_NDS32_GOTOFF_HI20", /* name */ 1082 FALSE, /* partial_inplace */ 1083 0x000fffff, /* src_mask */ 1084 0x000fffff, /* dst_mask */ 1085 FALSE), /* pcrel_offset */ 1086 HOWTO (R_NDS32_GOTOFF_LO12, /* type */ 1087 0, /* rightshift */ 1088 2, /* size (0 = byte, 1 = short, 2 = long) */ 1089 12, /* bitsize */ 1090 FALSE, /* pc_relative */ 1091 0, /* bitpos */ 1092 complain_overflow_dont,/* complain_on_overflow */ 1093 bfd_elf_generic_reloc, /* special_function */ 1094 "R_NDS32_GOTOFF_LO12", /* name */ 1095 FALSE, /* partial_inplace */ 1096 0x00000fff, /* src_mask */ 1097 0x00000fff, /* dst_mask */ 1098 FALSE), /* pcrel_offset */ 1099 1100 /* Alignment hint for relaxable instruction. This is used with 1101 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2 1102 in order to make next label aligned on word boundary. */ 1103 HOWTO (R_NDS32_INSN16, /* type */ 1104 0, /* rightshift */ 1105 2, /* size (0 = byte, 1 = short, 2 = long) */ 1106 32, /* bitsize */ 1107 FALSE, /* pc_relative */ 1108 0, /* bitpos */ 1109 complain_overflow_dont,/* complain_on_overflow */ 1110 nds32_elf_ignore_reloc,/* special_function */ 1111 "R_NDS32_INSN16", /* name */ 1112 FALSE, /* partial_inplace */ 1113 0x00000fff, /* src_mask */ 1114 0x00000fff, /* dst_mask */ 1115 FALSE), /* pcrel_offset */ 1116 1117 /* Alignment hint for label. */ 1118 HOWTO (R_NDS32_LABEL, /* type */ 1119 0, /* rightshift */ 1120 2, /* size (0 = byte, 1 = short, 2 = long) */ 1121 32, /* bitsize */ 1122 FALSE, /* pc_relative */ 1123 0, /* bitpos */ 1124 complain_overflow_dont,/* complain_on_overflow */ 1125 nds32_elf_ignore_reloc,/* special_function */ 1126 "R_NDS32_LABEL", /* name */ 1127 FALSE, /* partial_inplace */ 1128 0xffffffff, /* src_mask */ 1129 0xffffffff, /* dst_mask */ 1130 FALSE), /* pcrel_offset */ 1131 1132 /* Relax hint for unconditional call sequence */ 1133 HOWTO (R_NDS32_LONGCALL1, /* type */ 1134 0, /* rightshift */ 1135 2, /* size (0 = byte, 1 = short, 2 = long) */ 1136 32, /* bitsize */ 1137 FALSE, /* pc_relative */ 1138 0, /* bitpos */ 1139 complain_overflow_dont,/* complain_on_overflow */ 1140 nds32_elf_ignore_reloc,/* special_function */ 1141 "R_NDS32_LONGCALL1", /* name */ 1142 FALSE, /* partial_inplace */ 1143 0xffffffff, /* src_mask */ 1144 0xffffffff, /* dst_mask */ 1145 FALSE), /* pcrel_offset */ 1146 1147 /* Relax hint for conditional call sequence. */ 1148 HOWTO (R_NDS32_LONGCALL2, /* type */ 1149 0, /* rightshift */ 1150 2, /* size (0 = byte, 1 = short, 2 = long) */ 1151 32, /* bitsize */ 1152 FALSE, /* pc_relative */ 1153 0, /* bitpos */ 1154 complain_overflow_dont,/* complain_on_overflow */ 1155 nds32_elf_ignore_reloc,/* special_function */ 1156 "R_NDS32_LONGCALL2", /* name */ 1157 FALSE, /* partial_inplace */ 1158 0xffffffff, /* src_mask */ 1159 0xffffffff, /* dst_mask */ 1160 FALSE), /* pcrel_offset */ 1161 1162 /* Relax hint for conditional call sequence. */ 1163 HOWTO (R_NDS32_LONGCALL3, /* type */ 1164 0, /* rightshift */ 1165 2, /* size (0 = byte, 1 = short, 2 = long) */ 1166 32, /* bitsize */ 1167 FALSE, /* pc_relative */ 1168 0, /* bitpos */ 1169 complain_overflow_dont,/* complain_on_overflow */ 1170 nds32_elf_ignore_reloc,/* special_function */ 1171 "R_NDS32_LONGCALL3", /* name */ 1172 FALSE, /* partial_inplace */ 1173 0xffffffff, /* src_mask */ 1174 0xffffffff, /* dst_mask */ 1175 FALSE), /* pcrel_offset */ 1176 1177 /* Relax hint for unconditional branch sequence. */ 1178 HOWTO (R_NDS32_LONGJUMP1, /* type */ 1179 0, /* rightshift */ 1180 2, /* size (0 = byte, 1 = short, 2 = long) */ 1181 32, /* bitsize */ 1182 FALSE, /* pc_relative */ 1183 0, /* bitpos */ 1184 complain_overflow_dont,/* complain_on_overflow */ 1185 nds32_elf_ignore_reloc,/* special_function */ 1186 "R_NDS32_LONGJUMP1", /* name */ 1187 FALSE, /* partial_inplace */ 1188 0xffffffff, /* src_mask */ 1189 0xffffffff, /* dst_mask */ 1190 FALSE), /* pcrel_offset */ 1191 1192 /* Relax hint for conditional branch sequence. */ 1193 HOWTO (R_NDS32_LONGJUMP2, /* type */ 1194 0, /* rightshift */ 1195 2, /* size (0 = byte, 1 = short, 2 = long) */ 1196 32, /* bitsize */ 1197 FALSE, /* pc_relative */ 1198 0, /* bitpos */ 1199 complain_overflow_dont,/* complain_on_overflow */ 1200 nds32_elf_ignore_reloc,/* special_function */ 1201 "R_NDS32_LONGJUMP2", /* name */ 1202 FALSE, /* partial_inplace */ 1203 0xffffffff, /* src_mask */ 1204 0xffffffff, /* dst_mask */ 1205 FALSE), /* pcrel_offset */ 1206 1207 /* Relax hint for conditional branch sequence. */ 1208 HOWTO (R_NDS32_LONGJUMP3, /* type */ 1209 0, /* rightshift */ 1210 2, /* size (0 = byte, 1 = short, 2 = long) */ 1211 32, /* bitsize */ 1212 FALSE, /* pc_relative */ 1213 0, /* bitpos */ 1214 complain_overflow_dont,/* complain_on_overflow */ 1215 nds32_elf_ignore_reloc,/* special_function */ 1216 "R_NDS32_LONGJUMP3", /* name */ 1217 FALSE, /* partial_inplace */ 1218 0xffffffff, /* src_mask */ 1219 0xffffffff, /* dst_mask */ 1220 FALSE), /* pcrel_offset */ 1221 1222 /* Relax hint for load/store sequence. */ 1223 HOWTO (R_NDS32_LOADSTORE, /* type */ 1224 0, /* rightshift */ 1225 2, /* size (0 = byte, 1 = short, 2 = long) */ 1226 32, /* bitsize */ 1227 FALSE, /* pc_relative */ 1228 0, /* bitpos */ 1229 complain_overflow_dont,/* complain_on_overflow */ 1230 nds32_elf_ignore_reloc,/* special_function */ 1231 "R_NDS32_LOADSTORE", /* name */ 1232 FALSE, /* partial_inplace */ 1233 0xffffffff, /* src_mask */ 1234 0xffffffff, /* dst_mask */ 1235 FALSE), /* pcrel_offset */ 1236 1237 /* Relax hint for load/store sequence. */ 1238 HOWTO (R_NDS32_9_FIXED_RELA, /* type */ 1239 0, /* rightshift */ 1240 1, /* size (0 = byte, 1 = short, 2 = long) */ 1241 16, /* bitsize */ 1242 FALSE, /* pc_relative */ 1243 0, /* bitpos */ 1244 complain_overflow_dont,/* complain_on_overflow */ 1245 nds32_elf_ignore_reloc,/* special_function */ 1246 "R_NDS32_9_FIXED_RELA",/* name */ 1247 FALSE, /* partial_inplace */ 1248 0x000000ff, /* src_mask */ 1249 0x000000ff, /* dst_mask */ 1250 FALSE), /* pcrel_offset */ 1251 1252 /* Relax hint for load/store sequence. */ 1253 HOWTO (R_NDS32_15_FIXED_RELA, /* type */ 1254 0, /* rightshift */ 1255 2, /* size (0 = byte, 1 = short, 2 = long) */ 1256 32, /* bitsize */ 1257 FALSE, /* pc_relative */ 1258 0, /* bitpos */ 1259 complain_overflow_dont,/* complain_on_overflow */ 1260 nds32_elf_ignore_reloc,/* special_function */ 1261 "R_NDS32_15_FIXED_RELA", /* name */ 1262 FALSE, /* partial_inplace */ 1263 0x00003fff, /* src_mask */ 1264 0x00003fff, /* dst_mask */ 1265 FALSE), /* pcrel_offset */ 1266 1267 /* Relax hint for load/store sequence. */ 1268 HOWTO (R_NDS32_17_FIXED_RELA, /* type */ 1269 0, /* rightshift */ 1270 2, /* size (0 = byte, 1 = short, 2 = long) */ 1271 32, /* bitsize */ 1272 FALSE, /* pc_relative */ 1273 0, /* bitpos */ 1274 complain_overflow_dont,/* complain_on_overflow */ 1275 nds32_elf_ignore_reloc,/* special_function */ 1276 "R_NDS32_17_FIXED_RELA", /* name */ 1277 FALSE, /* partial_inplace */ 1278 0x0000ffff, /* src_mask */ 1279 0x0000ffff, /* dst_mask */ 1280 FALSE), /* pcrel_offset */ 1281 1282 /* Relax hint for load/store sequence. */ 1283 HOWTO (R_NDS32_25_FIXED_RELA, /* type */ 1284 0, /* rightshift */ 1285 2, /* size (0 = byte, 1 = short, 2 = long) */ 1286 32, /* bitsize */ 1287 FALSE, /* pc_relative */ 1288 0, /* bitpos */ 1289 complain_overflow_dont,/* complain_on_overflow */ 1290 nds32_elf_ignore_reloc,/* special_function */ 1291 "R_NDS32_25_FIXED_RELA", /* name */ 1292 FALSE, /* partial_inplace */ 1293 0x00ffffff, /* src_mask */ 1294 0x00ffffff, /* dst_mask */ 1295 FALSE), /* pcrel_offset */ 1296 1297 /* High 20 bits of PLT symbol offset relative to PC. */ 1298 HOWTO (R_NDS32_PLTREL_HI20, /* type */ 1299 12, /* rightshift */ 1300 2, /* size (0 = byte, 1 = short, 2 = long) */ 1301 20, /* bitsize */ 1302 FALSE, /* pc_relative */ 1303 0, /* bitpos */ 1304 complain_overflow_dont,/* complain_on_overflow */ 1305 bfd_elf_generic_reloc, /* special_function */ 1306 "R_NDS32_PLTREL_HI20", /* name */ 1307 FALSE, /* partial_inplace */ 1308 0x000fffff, /* src_mask */ 1309 0x000fffff, /* dst_mask */ 1310 FALSE), /* pcrel_offset */ 1311 1312 /* Low 12 bits of PLT symbol offset relative to PC. */ 1313 HOWTO (R_NDS32_PLTREL_LO12, /* type */ 1314 0, /* rightshift */ 1315 2, /* size (0 = byte, 1 = short, 2 = long) */ 1316 12, /* bitsize */ 1317 FALSE, /* pc_relative */ 1318 0, /* bitpos */ 1319 complain_overflow_dont,/* complain_on_overflow */ 1320 bfd_elf_generic_reloc, /* special_function */ 1321 "R_NDS32_PLTREL_LO12", /* name */ 1322 FALSE, /* partial_inplace */ 1323 0x00000fff, /* src_mask */ 1324 0x00000fff, /* dst_mask */ 1325 FALSE), /* pcrel_offset */ 1326 1327 /* High 20 bits of PLT symbol offset relative to GOT (GP). */ 1328 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */ 1329 12, /* rightshift */ 1330 2, /* size (0 = byte, 1 = short, 2 = long) */ 1331 20, /* bitsize */ 1332 FALSE, /* pc_relative */ 1333 0, /* bitpos */ 1334 complain_overflow_dont,/* complain_on_overflow */ 1335 bfd_elf_generic_reloc, /* special_function */ 1336 "R_NDS32_PLT_GOTREL_HI20", /* name */ 1337 FALSE, /* partial_inplace */ 1338 0x000fffff, /* src_mask */ 1339 0x000fffff, /* dst_mask */ 1340 FALSE), /* pcrel_offset */ 1341 1342 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */ 1343 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */ 1344 0, /* rightshift */ 1345 2, /* size (0 = byte, 1 = short, 2 = long) */ 1346 12, /* bitsize */ 1347 FALSE, /* pc_relative */ 1348 0, /* bitpos */ 1349 complain_overflow_dont,/* complain_on_overflow */ 1350 bfd_elf_generic_reloc, /* special_function */ 1351 "R_NDS32_PLT_GOTREL_LO12", /* name */ 1352 FALSE, /* partial_inplace */ 1353 0x00000fff, /* src_mask */ 1354 0x00000fff, /* dst_mask */ 1355 FALSE), /* pcrel_offset */ 1356 1357 /* Small data area 12 bits offset. */ 1358 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */ 1359 2, /* rightshift */ 1360 2, /* size (0 = byte, 1 = short, 2 = long) */ 1361 12, /* bitsize */ 1362 FALSE, /* pc_relative */ 1363 0, /* bitpos */ 1364 complain_overflow_signed, /* complain_on_overflow */ 1365 bfd_elf_generic_reloc, /* special_function */ 1366 "R_NDS32_SDA12S2_DP_RELA", /* name */ 1367 FALSE, /* partial_inplace */ 1368 0x00000fff, /* src_mask */ 1369 0x00000fff, /* dst_mask */ 1370 FALSE), /* pcrel_offset */ 1371 1372 /* Small data area 12 bits offset. */ 1373 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */ 1374 2, /* rightshift */ 1375 2, /* size (0 = byte, 1 = short, 2 = long) */ 1376 12, /* bitsize */ 1377 FALSE, /* pc_relative */ 1378 0, /* bitpos */ 1379 complain_overflow_signed, /* complain_on_overflow */ 1380 bfd_elf_generic_reloc, /* special_function */ 1381 "R_NDS32_SDA12S2_SP_RELA", /* name */ 1382 FALSE, /* partial_inplace */ 1383 0x00000fff, /* src_mask */ 1384 0x00000fff, /* dst_mask */ 1385 FALSE), /* pcrel_offset */ 1386 /* Lower 12 bits of address. */ 1387 1388 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */ 1389 2, /* rightshift */ 1390 2, /* size (0 = byte, 1 = short, 2 = long) */ 1391 10, /* bitsize */ 1392 FALSE, /* pc_relative */ 1393 0, /* bitpos */ 1394 complain_overflow_dont,/* complain_on_overflow */ 1395 bfd_elf_generic_reloc, /* special_function */ 1396 "R_NDS32_LO12S2_DP_RELA", /* name */ 1397 FALSE, /* partial_inplace */ 1398 0x000003ff, /* src_mask */ 1399 0x000003ff, /* dst_mask */ 1400 FALSE), /* pcrel_offset */ 1401 1402 /* Lower 12 bits of address. */ 1403 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */ 1404 2, /* rightshift */ 1405 2, /* size (0 = byte, 1 = short, 2 = long) */ 1406 10, /* bitsize */ 1407 FALSE, /* pc_relative */ 1408 0, /* bitpos */ 1409 complain_overflow_dont,/* complain_on_overflow */ 1410 bfd_elf_generic_reloc, /* special_function */ 1411 "R_NDS32_LO12S2_SP_RELA", /* name */ 1412 FALSE, /* partial_inplace */ 1413 0x000003ff, /* src_mask */ 1414 0x000003ff, /* dst_mask */ 1415 FALSE), /* pcrel_offset */ 1416 /* Lower 12 bits of address. Special identity for or case. */ 1417 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */ 1418 0, /* rightshift */ 1419 2, /* size (0 = byte, 1 = short, 2 = long) */ 1420 12, /* bitsize */ 1421 FALSE, /* pc_relative */ 1422 0, /* bitpos */ 1423 complain_overflow_dont,/* complain_on_overflow */ 1424 bfd_elf_generic_reloc, /* special_function */ 1425 "R_NDS32_LO12S0_ORI_RELA", /* name */ 1426 FALSE, /* partial_inplace */ 1427 0x00000fff, /* src_mask */ 1428 0x00000fff, /* dst_mask */ 1429 FALSE), /* pcrel_offset */ 1430 /* Small data area 19 bits offset. */ 1431 HOWTO (R_NDS32_SDA16S3_RELA, /* type */ 1432 3, /* rightshift */ 1433 2, /* size (0 = byte, 1 = short, 2 = long) */ 1434 16, /* bitsize */ 1435 FALSE, /* pc_relative */ 1436 0, /* bitpos */ 1437 complain_overflow_signed, /* complain_on_overflow */ 1438 bfd_elf_generic_reloc, /* special_function */ 1439 "R_NDS32_SDA16S3_RELA",/* name */ 1440 FALSE, /* partial_inplace */ 1441 0x0000ffff, /* src_mask */ 1442 0x0000ffff, /* dst_mask */ 1443 FALSE), /* pcrel_offset */ 1444 1445 /* Small data area 15 bits offset. */ 1446 HOWTO (R_NDS32_SDA17S2_RELA, /* type */ 1447 2, /* rightshift */ 1448 2, /* size (0 = byte, 1 = short, 2 = long) */ 1449 17, /* bitsize */ 1450 FALSE, /* pc_relative */ 1451 0, /* bitpos */ 1452 complain_overflow_signed, /* complain_on_overflow */ 1453 bfd_elf_generic_reloc, /* special_function */ 1454 "R_NDS32_SDA17S2_RELA",/* name */ 1455 FALSE, /* partial_inplace */ 1456 0x0001ffff, /* src_mask */ 1457 0x0001ffff, /* dst_mask */ 1458 FALSE), /* pcrel_offset */ 1459 1460 HOWTO (R_NDS32_SDA18S1_RELA, /* type */ 1461 1, /* rightshift */ 1462 2, /* size (0 = byte, 1 = short, 2 = long) */ 1463 18, /* bitsize */ 1464 FALSE, /* pc_relative */ 1465 0, /* bitpos */ 1466 complain_overflow_signed, /* complain_on_overflow */ 1467 bfd_elf_generic_reloc, /* special_function */ 1468 "R_NDS32_SDA18S1_RELA",/* name */ 1469 FALSE, /* partial_inplace */ 1470 0x0003ffff, /* src_mask */ 1471 0x0003ffff, /* dst_mask */ 1472 FALSE), /* pcrel_offset */ 1473 1474 HOWTO (R_NDS32_SDA19S0_RELA, /* type */ 1475 0, /* rightshift */ 1476 2, /* size (0 = byte, 1 = short, 2 = long) */ 1477 19, /* bitsize */ 1478 FALSE, /* pc_relative */ 1479 0, /* bitpos */ 1480 complain_overflow_signed, /* complain_on_overflow */ 1481 bfd_elf_generic_reloc, /* special_function */ 1482 "R_NDS32_SDA19S0_RELA",/* name */ 1483 FALSE, /* partial_inplace */ 1484 0x0007ffff, /* src_mask */ 1485 0x0007ffff, /* dst_mask */ 1486 FALSE), /* pcrel_offset */ 1487 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */ 1488 0, /* rightshift */ 1489 0, /* size (0 = byte, 1 = short, 2 = long) */ 1490 8, /* bitsize */ 1491 FALSE, /* pc_relative */ 1492 0, /* bitpos */ 1493 complain_overflow_dont,/* complain_on_overflow */ 1494 nds32_elf_ignore_reloc,/* special_function */ 1495 "R_NDS32_DWARF2_OP1_RELA", /* name */ 1496 FALSE, /* partial_inplace */ 1497 0xff, /* src_mask */ 1498 0xff, /* dst_mask */ 1499 FALSE), /* pcrel_offset */ 1500 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */ 1501 0, /* rightshift */ 1502 1, /* size (0 = byte, 1 = short, 2 = long) */ 1503 16, /* bitsize */ 1504 FALSE, /* pc_relative */ 1505 0, /* bitpos */ 1506 complain_overflow_dont,/* complain_on_overflow */ 1507 nds32_elf_ignore_reloc,/* special_function */ 1508 "R_NDS32_DWARF2_OP2_RELA", /* name */ 1509 FALSE, /* partial_inplace */ 1510 0xffff, /* src_mask */ 1511 0xffff, /* dst_mask */ 1512 FALSE), /* pcrel_offset */ 1513 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */ 1514 0, /* rightshift */ 1515 2, /* size (0 = byte, 1 = short, 2 = long) */ 1516 32, /* bitsize */ 1517 FALSE, /* pc_relative */ 1518 0, /* bitpos */ 1519 complain_overflow_dont,/* complain_on_overflow */ 1520 nds32_elf_ignore_reloc,/* special_function */ 1521 "R_NDS32_DWARF2_LEB_RELA", /* name */ 1522 FALSE, /* partial_inplace */ 1523 0xffffffff, /* src_mask */ 1524 0xffffffff, /* dst_mask */ 1525 FALSE), /* pcrel_offset */ 1526 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */ 1527 0, /* rightshift */ 1528 1, /* size (0 = byte, 1 = short, 2 = long) */ 1529 16, /* bitsize */ 1530 FALSE, /* pc_relative */ 1531 0, /* bitpos */ 1532 complain_overflow_dont,/* complain_on_overflow */ 1533 nds32_elf_ignore_reloc,/* special_function */ 1534 "R_NDS32_UPDATE_TA_RELA", /* name */ 1535 FALSE, /* partial_inplace */ 1536 0xffff, /* src_mask */ 1537 0xffff, /* dst_mask */ 1538 FALSE), /* pcrel_offset */ 1539 /* Like R_NDS32_PCREL, but referring to the procedure linkage table 1540 entry for the symbol. */ 1541 HOWTO (R_NDS32_9_PLTREL, /* type */ 1542 1, /* rightshift */ 1543 1, /* size (0 = byte, 1 = short, 2 = long) */ 1544 8, /* bitsize */ 1545 TRUE, /* pc_relative */ 1546 0, /* bitpos */ 1547 complain_overflow_signed, /* complain_on_overflow */ 1548 bfd_elf_generic_reloc, /* special_function */ 1549 "R_NDS32_9_PLTREL", /* name */ 1550 FALSE, /* partial_inplace */ 1551 0xff, /* src_mask */ 1552 0xff, /* dst_mask */ 1553 TRUE), /* pcrel_offset */ 1554 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */ 1555 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */ 1556 0, /* rightshift */ 1557 2, /* size (0 = byte, 1 = short, 2 = long) */ 1558 20, /* bitsize */ 1559 FALSE, /* pc_relative */ 1560 0, /* bitpos */ 1561 complain_overflow_dont,/* complain_on_overflow */ 1562 bfd_elf_generic_reloc, /* special_function */ 1563 "R_NDS32_PLT_GOTREL_LO20", /* name */ 1564 FALSE, /* partial_inplace */ 1565 0x000fffff, /* src_mask */ 1566 0x000fffff, /* dst_mask */ 1567 FALSE), /* pcrel_offset */ 1568 /* low 15 bits of PLT symbol offset relative to GOT (GP) */ 1569 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */ 1570 0, /* rightshift */ 1571 2, /* size (0 = byte, 1 = short, 2 = long) */ 1572 15, /* bitsize */ 1573 FALSE, /* pc_relative */ 1574 0, /* bitpos */ 1575 complain_overflow_dont,/* complain_on_overflow */ 1576 bfd_elf_generic_reloc, /* special_function */ 1577 "R_NDS32_PLT_GOTREL_LO15", /* name */ 1578 FALSE, /* partial_inplace */ 1579 0x00007fff, /* src_mask */ 1580 0x00007fff, /* dst_mask */ 1581 FALSE), /* pcrel_offset */ 1582 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */ 1583 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */ 1584 0, /* rightshift */ 1585 2, /* size (0 = byte, 1 = short, 2 = long) */ 1586 19, /* bitsize */ 1587 FALSE, /* pc_relative */ 1588 0, /* bitpos */ 1589 complain_overflow_dont,/* complain_on_overflow */ 1590 bfd_elf_generic_reloc, /* special_function */ 1591 "R_NDS32_PLT_GOTREL_LO19", /* name */ 1592 FALSE, /* partial_inplace */ 1593 0x0007ffff, /* src_mask */ 1594 0x0007ffff, /* dst_mask */ 1595 FALSE), /* pcrel_offset */ 1596 HOWTO (R_NDS32_GOT_LO15, /* type */ 1597 0, /* rightshift */ 1598 2, /* size (0 = byte, 1 = short, 2 = long) */ 1599 15, /* bitsize */ 1600 FALSE, /* pc_relative */ 1601 0, /* bitpos */ 1602 complain_overflow_dont,/* complain_on_overflow */ 1603 bfd_elf_generic_reloc, /* special_function */ 1604 "R_NDS32_GOT_LO15", /* name */ 1605 FALSE, /* partial_inplace */ 1606 0x00007fff, /* src_mask */ 1607 0x00007fff, /* dst_mask */ 1608 FALSE), /* pcrel_offset */ 1609 HOWTO (R_NDS32_GOT_LO19, /* type */ 1610 0, /* rightshift */ 1611 2, /* size (0 = byte, 1 = short, 2 = long) */ 1612 19, /* bitsize */ 1613 FALSE, /* pc_relative */ 1614 0, /* bitpos */ 1615 complain_overflow_dont,/* complain_on_overflow */ 1616 bfd_elf_generic_reloc, /* special_function */ 1617 "R_NDS32_GOT_LO19", /* name */ 1618 FALSE, /* partial_inplace */ 1619 0x0007ffff, /* src_mask */ 1620 0x0007ffff, /* dst_mask */ 1621 FALSE), /* pcrel_offset */ 1622 HOWTO (R_NDS32_GOTOFF_LO15, /* type */ 1623 0, /* rightshift */ 1624 2, /* size (0 = byte, 1 = short, 2 = long) */ 1625 15, /* bitsize */ 1626 FALSE, /* pc_relative */ 1627 0, /* bitpos */ 1628 complain_overflow_dont,/* complain_on_overflow */ 1629 bfd_elf_generic_reloc, /* special_function */ 1630 "R_NDS32_GOTOFF_LO15", /* name */ 1631 FALSE, /* partial_inplace */ 1632 0x00007fff, /* src_mask */ 1633 0x00007fff, /* dst_mask */ 1634 FALSE), /* pcrel_offset */ 1635 HOWTO (R_NDS32_GOTOFF_LO19, /* type */ 1636 0, /* rightshift */ 1637 2, /* size (0 = byte, 1 = short, 2 = long) */ 1638 19, /* bitsize */ 1639 FALSE, /* pc_relative */ 1640 0, /* bitpos */ 1641 complain_overflow_dont,/* complain_on_overflow */ 1642 bfd_elf_generic_reloc, /* special_function */ 1643 "R_NDS32_GOTOFF_LO19", /* name */ 1644 FALSE, /* partial_inplace */ 1645 0x0007ffff, /* src_mask */ 1646 0x0007ffff, /* dst_mask */ 1647 FALSE), /* pcrel_offset */ 1648 /* GOT 15 bits offset. */ 1649 HOWTO (R_NDS32_GOT15S2_RELA, /* type */ 1650 2, /* rightshift */ 1651 2, /* size (0 = byte, 1 = short, 2 = long) */ 1652 15, /* bitsize */ 1653 FALSE, /* pc_relative */ 1654 0, /* bitpos */ 1655 complain_overflow_signed, /* complain_on_overflow */ 1656 bfd_elf_generic_reloc, /* special_function */ 1657 "R_NDS32_GOT15S2_RELA",/* name */ 1658 FALSE, /* partial_inplace */ 1659 0x00007fff, /* src_mask */ 1660 0x00007fff, /* dst_mask */ 1661 FALSE), /* pcrel_offset */ 1662 /* GOT 17 bits offset. */ 1663 HOWTO (R_NDS32_GOT17S2_RELA, /* type */ 1664 2, /* rightshift */ 1665 2, /* size (0 = byte, 1 = short, 2 = long) */ 1666 17, /* bitsize */ 1667 FALSE, /* pc_relative */ 1668 0, /* bitpos */ 1669 complain_overflow_signed, /* complain_on_overflow */ 1670 bfd_elf_generic_reloc, /* special_function */ 1671 "R_NDS32_GOT17S2_RELA",/* name */ 1672 FALSE, /* partial_inplace */ 1673 0x0001ffff, /* src_mask */ 1674 0x0001ffff, /* dst_mask */ 1675 FALSE), /* pcrel_offset */ 1676 /* A 5 bit address. */ 1677 HOWTO (R_NDS32_5_RELA, /* type */ 1678 0, /* rightshift */ 1679 1, /* size (0 = byte, 1 = short, 2 = long) */ 1680 5, /* bitsize */ 1681 FALSE, /* pc_relative */ 1682 0, /* bitpos */ 1683 complain_overflow_signed, /* complain_on_overflow */ 1684 bfd_elf_generic_reloc, /* special_function */ 1685 "R_NDS32_5_RELA", /* name */ 1686 FALSE, /* partial_inplace */ 1687 0x1f, /* src_mask */ 1688 0x1f, /* dst_mask */ 1689 FALSE), /* pcrel_offset */ 1690 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */ 1691 1, /* rightshift */ 1692 1, /* size (0 = byte, 1 = short, 2 = long) */ 1693 9, /* bitsize */ 1694 TRUE, /* pc_relative */ 1695 0, /* bitpos */ 1696 complain_overflow_unsigned, /* complain_on_overflow */ 1697 bfd_elf_generic_reloc, /* special_function */ 1698 "R_NDS32_10_UPCREL_RELA", /* name */ 1699 FALSE, /* partial_inplace */ 1700 0x1ff, /* src_mask */ 1701 0x1ff, /* dst_mask */ 1702 TRUE), /* pcrel_offset */ 1703 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */ 1704 2, /* rightshift */ 1705 1, /* size (0 = byte, 1 = short, 2 = long) */ 1706 7, /* bitsize */ 1707 FALSE, /* pc_relative */ 1708 0, /* bitpos */ 1709 complain_overflow_unsigned, /* complain_on_overflow */ 1710 bfd_elf_generic_reloc, /* special_function */ 1711 "R_NDS32_SDA_FP7U2_RELA", /* name */ 1712 FALSE, /* partial_inplace */ 1713 0x0000007f, /* src_mask */ 1714 0x0000007f, /* dst_mask */ 1715 FALSE), /* pcrel_offset */ 1716 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */ 1717 1, /* rightshift */ 1718 2, /* size (0 = byte, 1 = short, 2 = long) */ 1719 8, /* bitsize */ 1720 TRUE, /* pc_relative */ 1721 0, /* bitpos */ 1722 complain_overflow_signed, /* complain_on_overflow */ 1723 bfd_elf_generic_reloc, /* special_function */ 1724 "R_NDS32_WORD_9_PCREL_RELA", /* name */ 1725 FALSE, /* partial_inplace */ 1726 0xff, /* src_mask */ 1727 0xff, /* dst_mask */ 1728 TRUE), /* pcrel_offset */ 1729 HOWTO (R_NDS32_25_ABS_RELA, /* type */ 1730 1, /* rightshift */ 1731 2, /* size (0 = byte, 1 = short, 2 = long) */ 1732 24, /* bitsize */ 1733 FALSE, /* pc_relative */ 1734 0, /* bitpos */ 1735 complain_overflow_dont,/* complain_on_overflow */ 1736 bfd_elf_generic_reloc, /* special_function */ 1737 "R_NDS32_25_ABS_RELA", /* name */ 1738 FALSE, /* partial_inplace */ 1739 0xffffff, /* src_mask */ 1740 0xffffff, /* dst_mask */ 1741 FALSE), /* pcrel_offset */ 1742 1743 /* A relative 17 bit relocation for ifc, right shifted by 1. */ 1744 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */ 1745 1, /* rightshift */ 1746 2, /* size (0 = byte, 1 = short, 2 = long) */ 1747 16, /* bitsize */ 1748 TRUE, /* pc_relative */ 1749 0, /* bitpos */ 1750 complain_overflow_signed, /* complain_on_overflow */ 1751 bfd_elf_generic_reloc, /* special_function */ 1752 "R_NDS32_17IFC_PCREL_RELA", /* name */ 1753 FALSE, /* partial_inplace */ 1754 0xffff, /* src_mask */ 1755 0xffff, /* dst_mask */ 1756 TRUE), /* pcrel_offset */ 1757 1758 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */ 1759 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */ 1760 1, /* rightshift */ 1761 1, /* size (0 = byte, 1 = short, 2 = long) */ 1762 9, /* bitsize */ 1763 TRUE, /* pc_relative */ 1764 0, /* bitpos */ 1765 complain_overflow_unsigned, /* complain_on_overflow */ 1766 bfd_elf_generic_reloc, /* special_function */ 1767 "R_NDS32_10IFCU_PCREL_RELA", /* name */ 1768 FALSE, /* partial_inplace */ 1769 0x1ff, /* src_mask */ 1770 0x1ff, /* dst_mask */ 1771 TRUE), /* pcrel_offset */ 1772 1773 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */ 1774 HOWTO (R_NDS32_TLS_LE_HI20, /* type */ 1775 12, /* rightshift */ 1776 2, /* size (0 = byte, 1 = short, 2 = long) */ 1777 20, /* bitsize */ 1778 FALSE, /* pc_relative */ 1779 0, /* bitpos */ 1780 complain_overflow_dont, /* complain_on_overflow */ 1781 bfd_elf_generic_reloc, /* special_function */ 1782 "R_NDS32_TLS_LE_HI20", /* name */ 1783 FALSE, /* partial_inplace */ 1784 0x000fffff, /* src_mask */ 1785 0x000fffff, /* dst_mask */ 1786 FALSE), /* pcrel_offset */ 1787 HOWTO (R_NDS32_TLS_LE_LO12, /* type */ 1788 0, /* rightshift */ 1789 2, /* size (0 = byte, 1 = short, 2 = long) */ 1790 12, /* bitsize */ 1791 FALSE, /* pc_relative */ 1792 0, /* bitpos */ 1793 complain_overflow_dont, /* complain_on_overflow */ 1794 bfd_elf_generic_reloc, /* special_function */ 1795 "R_NDS32_TLS_LE_LO12", /* name */ 1796 FALSE, /* partial_inplace */ 1797 0x00000fff, /* src_mask */ 1798 0x00000fff, /* dst_mask */ 1799 FALSE), /* pcrel_offset */ 1800 1801 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */ 1802 HOWTO (R_NDS32_TLS_IE_HI20, /* type */ 1803 12, /* rightshift */ 1804 2, /* size (0 = byte, 1 = short, 2 = long) */ 1805 20, /* bitsize */ 1806 FALSE, /* pc_relative */ 1807 0, /* bitpos */ 1808 complain_overflow_dont, /* complain_on_overflow */ 1809 bfd_elf_generic_reloc, /* special_function */ 1810 "R_NDS32_TLS_IE_HI20", /* name */ 1811 FALSE, /* partial_inplace */ 1812 0x000fffff, /* src_mask */ 1813 0x000fffff, /* dst_mask */ 1814 FALSE), /* pcrel_offset */ 1815 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */ 1816 2, /* rightshift */ 1817 2, /* size (0 = byte, 1 = short, 2 = long) */ 1818 10, /* bitsize */ 1819 FALSE, /* pc_relative */ 1820 0, /* bitpos */ 1821 complain_overflow_dont, /* complain_on_overflow */ 1822 bfd_elf_generic_reloc, /* special_function */ 1823 "R_NDS32_TLS_IE_LO12S2", /* name */ 1824 FALSE, /* partial_inplace */ 1825 0x000003ff, /* src_mask */ 1826 0x000003ff, /* dst_mask */ 1827 FALSE), /* pcrel_offset */ 1828 /* Mark a TLS IE entry in GOT. */ 1829 HOWTO (R_NDS32_TLS_TPOFF, /* type */ 1830 0, /* rightshift */ 1831 2, /* size (0 = byte, 1 = short, 2 = long) */ 1832 32, /* bitsize */ 1833 FALSE, /* pc_relative */ 1834 0, /* bitpos */ 1835 complain_overflow_bitfield, /* complain_on_overflow */ 1836 bfd_elf_generic_reloc, /* special_function */ 1837 "R_NDS32_TLS_TPOFF", /* name */ 1838 FALSE, /* partial_inplace */ 1839 0xffffffff, /* src_mask */ 1840 0xffffffff, /* dst_mask */ 1841 FALSE), /* pcrel_offset */ 1842 /* A 20 bit address. */ 1843 HOWTO (R_NDS32_TLS_LE_20, /* type */ 1844 0, /* rightshift */ 1845 2, /* size (0 = byte, 1 = short, 2 = long) */ 1846 20, /* bitsize */ 1847 FALSE, /* pc_relative */ 1848 0, /* bitpos */ 1849 complain_overflow_signed, /* complain_on_overflow */ 1850 bfd_elf_generic_reloc, /* special_function */ 1851 "R_NDS32_TLS_LE_20", /* name */ 1852 FALSE, /* partial_inplace */ 1853 0xfffff, /* src_mask */ 1854 0xfffff, /* dst_mask */ 1855 FALSE), /* pcrel_offset */ 1856 HOWTO (R_NDS32_TLS_LE_15S0, /* type */ 1857 0, /* rightshift */ 1858 2, /* size (0 = byte, 1 = short, 2 = long) */ 1859 15, /* bitsize */ 1860 FALSE, /* pc_relative */ 1861 0, /* bitpos */ 1862 complain_overflow_signed, /* complain_on_overflow */ 1863 bfd_elf_generic_reloc, /* special_function */ 1864 "R_NDS32_TLS_LE_15S0", /* name */ 1865 FALSE, /* partial_inplace */ 1866 0x7fff, /* src_mask */ 1867 0x7fff, /* dst_mask */ 1868 FALSE), /* pcrel_offset */ 1869 HOWTO (R_NDS32_TLS_LE_15S1, /* type */ 1870 1, /* rightshift */ 1871 2, /* size (0 = byte, 1 = short, 2 = long) */ 1872 15, /* bitsize */ 1873 FALSE, /* pc_relative */ 1874 0, /* bitpos */ 1875 complain_overflow_signed, /* complain_on_overflow */ 1876 bfd_elf_generic_reloc, /* special_function */ 1877 "R_NDS32_TLS_LE_15S1", /* name */ 1878 FALSE, /* partial_inplace */ 1879 0x7fff, /* src_mask */ 1880 0x7fff, /* dst_mask */ 1881 FALSE), /* pcrel_offset */ 1882 HOWTO (R_NDS32_TLS_LE_15S2, /* type */ 1883 2, /* rightshift */ 1884 2, /* size (0 = byte, 1 = short, 2 = long) */ 1885 15, /* bitsize */ 1886 FALSE, /* pc_relative */ 1887 0, /* bitpos */ 1888 complain_overflow_signed, /* complain_on_overflow */ 1889 bfd_elf_generic_reloc, /* special_function */ 1890 "R_NDS32_TLS_LE_15S2", /* name */ 1891 FALSE, /* partial_inplace */ 1892 0x7fff, /* src_mask */ 1893 0x7fff, /* dst_mask */ 1894 FALSE), /* pcrel_offset */ 1895 1896 /* Relax hint for unconditional call sequence */ 1897 HOWTO (R_NDS32_LONGCALL4, /* type */ 1898 0, /* rightshift */ 1899 2, /* size (0 = byte, 1 = short, 2 = long) */ 1900 32, /* bitsize */ 1901 FALSE, /* pc_relative */ 1902 0, /* bitpos */ 1903 complain_overflow_dont, /* complain_on_overflow */ 1904 nds32_elf_ignore_reloc, /* special_function */ 1905 "R_NDS32_LONGCALL4", /* name */ 1906 FALSE, /* partial_inplace */ 1907 0xffffffff, /* src_mask */ 1908 0xffffffff, /* dst_mask */ 1909 FALSE), /* pcrel_offset */ 1910 1911 /* Relax hint for conditional call sequence. */ 1912 HOWTO (R_NDS32_LONGCALL5, /* type */ 1913 0, /* rightshift */ 1914 2, /* size (0 = byte, 1 = short, 2 = long) */ 1915 32, /* bitsize */ 1916 FALSE, /* pc_relative */ 1917 0, /* bitpos */ 1918 complain_overflow_dont, /* complain_on_overflow */ 1919 nds32_elf_ignore_reloc, /* special_function */ 1920 "R_NDS32_LONGCALL5", /* name */ 1921 FALSE, /* partial_inplace */ 1922 0xffffffff, /* src_mask */ 1923 0xffffffff, /* dst_mask */ 1924 FALSE), /* pcrel_offset */ 1925 1926 /* Relax hint for conditional call sequence. */ 1927 HOWTO (R_NDS32_LONGCALL6, /* type */ 1928 0, /* rightshift */ 1929 2, /* size (0 = byte, 1 = short, 2 = long) */ 1930 32, /* bitsize */ 1931 FALSE, /* pc_relative */ 1932 0, /* bitpos */ 1933 complain_overflow_dont, /* complain_on_overflow */ 1934 nds32_elf_ignore_reloc, /* special_function */ 1935 "R_NDS32_LONGCALL6", /* name */ 1936 FALSE, /* partial_inplace */ 1937 0xffffffff, /* src_mask */ 1938 0xffffffff, /* dst_mask */ 1939 FALSE), /* pcrel_offset */ 1940 1941 /* Relax hint for unconditional branch sequence. */ 1942 HOWTO (R_NDS32_LONGJUMP4, /* type */ 1943 0, /* rightshift */ 1944 2, /* size (0 = byte, 1 = short, 2 = long) */ 1945 32, /* bitsize */ 1946 FALSE, /* pc_relative */ 1947 0, /* bitpos */ 1948 complain_overflow_dont, /* complain_on_overflow */ 1949 nds32_elf_ignore_reloc, /* special_function */ 1950 "R_NDS32_LONGJUMP4", /* name */ 1951 FALSE, /* partial_inplace */ 1952 0xffffffff, /* src_mask */ 1953 0xffffffff, /* dst_mask */ 1954 FALSE), /* pcrel_offset */ 1955 1956 /* Relax hint for conditional branch sequence. */ 1957 HOWTO (R_NDS32_LONGJUMP5, /* type */ 1958 0, /* rightshift */ 1959 2, /* size (0 = byte, 1 = short, 2 = long) */ 1960 32, /* bitsize */ 1961 FALSE, /* pc_relative */ 1962 0, /* bitpos */ 1963 complain_overflow_dont, /* complain_on_overflow */ 1964 nds32_elf_ignore_reloc, /* special_function */ 1965 "R_NDS32_LONGJUMP5", /* name */ 1966 FALSE, /* partial_inplace */ 1967 0xffffffff, /* src_mask */ 1968 0xffffffff, /* dst_mask */ 1969 FALSE), /* pcrel_offset */ 1970 1971 /* Relax hint for conditional branch sequence. */ 1972 HOWTO (R_NDS32_LONGJUMP6, /* type */ 1973 0, /* rightshift */ 1974 2, /* size (0 = byte, 1 = short, 2 = long) */ 1975 32, /* bitsize */ 1976 FALSE, /* pc_relative */ 1977 0, /* bitpos */ 1978 complain_overflow_dont, /* complain_on_overflow */ 1979 nds32_elf_ignore_reloc, /* special_function */ 1980 "R_NDS32_LONGJUMP6", /* name */ 1981 FALSE, /* partial_inplace */ 1982 0xffffffff, /* src_mask */ 1983 0xffffffff, /* dst_mask */ 1984 FALSE), /* pcrel_offset */ 1985 1986 /* Relax hint for conditional branch sequence. */ 1987 HOWTO (R_NDS32_LONGJUMP7, /* type */ 1988 0, /* rightshift */ 1989 2, /* size (0 = byte, 1 = short, 2 = long) */ 1990 32, /* bitsize */ 1991 FALSE, /* pc_relative */ 1992 0, /* bitpos */ 1993 complain_overflow_dont, /* complain_on_overflow */ 1994 nds32_elf_ignore_reloc, /* special_function */ 1995 "R_NDS32_LONGJUMP7", /* name */ 1996 FALSE, /* partial_inplace */ 1997 0xffffffff, /* src_mask */ 1998 0xffffffff, /* dst_mask */ 1999 FALSE), /* pcrel_offset */ 2000 }; 2001 2002 /* Relocations used for relaxation. */ 2003 static reloc_howto_type nds32_elf_relax_howto_table[] = 2004 { 2005 HOWTO (R_NDS32_RELAX_ENTRY, /* type */ 2006 0, /* rightshift */ 2007 2, /* size (0 = byte, 1 = short, 2 = long) */ 2008 32, /* bitsize */ 2009 FALSE, /* pc_relative */ 2010 0, /* bitpos */ 2011 complain_overflow_dont,/* complain_on_overflow */ 2012 nds32_elf_ignore_reloc,/* special_function */ 2013 "R_NDS32_RELAX_ENTRY", /* name */ 2014 FALSE, /* partial_inplace */ 2015 0xffffffff, /* src_mask */ 2016 0xffffffff, /* dst_mask */ 2017 FALSE), /* pcrel_offset */ 2018 HOWTO (R_NDS32_GOT_SUFF, /* type */ 2019 0, /* rightshift */ 2020 2, /* size (0 = byte, 1 = short, 2 = long) */ 2021 32, /* bitsize */ 2022 FALSE, /* pc_relative */ 2023 0, /* bitpos */ 2024 complain_overflow_dont,/* complain_on_overflow */ 2025 nds32_elf_ignore_reloc,/* special_function */ 2026 "R_NDS32_GOT_SUFF", /* name */ 2027 FALSE, /* partial_inplace */ 2028 0xffffffff, /* src_mask */ 2029 0xffffffff, /* dst_mask */ 2030 FALSE), /* pcrel_offset */ 2031 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */ 2032 0, /* rightshift */ 2033 2, /* size (0 = byte, 1 = short, 2 = long) */ 2034 32, /* bitsize */ 2035 FALSE, /* pc_relative */ 2036 0, /* bitpos */ 2037 complain_overflow_bitfield, /* complain_on_overflow */ 2038 nds32_elf_ignore_reloc,/* special_function */ 2039 "R_NDS32_GOTOFF_SUFF", /* name */ 2040 FALSE, /* partial_inplace */ 2041 0xffffffff, /* src_mask */ 2042 0xffffffff, /* dst_mask */ 2043 FALSE), /* pcrel_offset */ 2044 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */ 2045 0, /* rightshift */ 2046 2, /* size (0 = byte, 1 = short, 2 = long) */ 2047 32, /* bitsize */ 2048 FALSE, /* pc_relative */ 2049 0, /* bitpos */ 2050 complain_overflow_dont,/* complain_on_overflow */ 2051 nds32_elf_ignore_reloc,/* special_function */ 2052 "R_NDS32_PLT_GOT_SUFF",/* name */ 2053 FALSE, /* partial_inplace */ 2054 0xffffffff, /* src_mask */ 2055 0xffffffff, /* dst_mask */ 2056 FALSE), /* pcrel_offset */ 2057 HOWTO (R_NDS32_MULCALL_SUFF, /* type */ 2058 0, /* rightshift */ 2059 2, /* size (0 = byte, 1 = short, 2 = long) */ 2060 32, /* bitsize */ 2061 FALSE, /* pc_relative */ 2062 0, /* bitpos */ 2063 complain_overflow_dont,/* complain_on_overflow */ 2064 nds32_elf_ignore_reloc,/* special_function */ 2065 "R_NDS32_MULCALL_SUFF",/* name */ 2066 FALSE, /* partial_inplace */ 2067 0xffffffff, /* src_mask */ 2068 0xffffffff, /* dst_mask */ 2069 FALSE), /* pcrel_offset */ 2070 HOWTO (R_NDS32_PTR, /* type */ 2071 0, /* rightshift */ 2072 2, /* size (0 = byte, 1 = short, 2 = long) */ 2073 32, /* bitsize */ 2074 FALSE, /* pc_relative */ 2075 0, /* bitpos */ 2076 complain_overflow_dont,/* complain_on_overflow */ 2077 nds32_elf_ignore_reloc,/* special_function */ 2078 "R_NDS32_PTR", /* name */ 2079 FALSE, /* partial_inplace */ 2080 0xffffffff, /* src_mask */ 2081 0xffffffff, /* dst_mask */ 2082 FALSE), /* pcrel_offset */ 2083 HOWTO (R_NDS32_PTR_COUNT, /* type */ 2084 0, /* rightshift */ 2085 2, /* size (0 = byte, 1 = short, 2 = long) */ 2086 32, /* bitsize */ 2087 FALSE, /* pc_relative */ 2088 0, /* bitpos */ 2089 complain_overflow_dont,/* complain_on_overflow */ 2090 nds32_elf_ignore_reloc,/* special_function */ 2091 "R_NDS32_PTR_COUNT", /* name */ 2092 FALSE, /* partial_inplace */ 2093 0xffffffff, /* src_mask */ 2094 0xffffffff, /* dst_mask */ 2095 FALSE), /* pcrel_offset */ 2096 HOWTO (R_NDS32_PTR_RESOLVED, /* type */ 2097 0, /* rightshift */ 2098 2, /* size (0 = byte, 1 = short, 2 = long) */ 2099 32, /* bitsize */ 2100 FALSE, /* pc_relative */ 2101 0, /* bitpos */ 2102 complain_overflow_dont,/* complain_on_overflow */ 2103 nds32_elf_ignore_reloc,/* special_function */ 2104 "R_NDS32_PTR_RESOLVED",/* name */ 2105 FALSE, /* partial_inplace */ 2106 0xffffffff, /* src_mask */ 2107 0xffffffff, /* dst_mask */ 2108 FALSE), /* pcrel_offset */ 2109 HOWTO (R_NDS32_PLTBLOCK, /* type */ 2110 0, /* rightshift */ 2111 2, /* size (0 = byte, 1 = short, 2 = long) */ 2112 32, /* bitsize */ 2113 FALSE, /* pc_relative */ 2114 0, /* bitpos */ 2115 complain_overflow_dont,/* complain_on_overflow */ 2116 nds32_elf_ignore_reloc,/* special_function */ 2117 "R_NDS32_PLTBLOCK", /* name */ 2118 FALSE, /* partial_inplace */ 2119 0xffffffff, /* src_mask */ 2120 0xffffffff, /* dst_mask */ 2121 FALSE), /* pcrel_offset */ 2122 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */ 2123 0, /* rightshift */ 2124 2, /* size (0 = byte, 1 = short, 2 = long) */ 2125 32, /* bitsize */ 2126 FALSE, /* pc_relative */ 2127 0, /* bitpos */ 2128 complain_overflow_dont,/* complain_on_overflow */ 2129 nds32_elf_ignore_reloc,/* special_function */ 2130 "R_NDS32_RELAX_REGION_BEGIN", /* name */ 2131 FALSE, /* partial_inplace */ 2132 0xffffffff, /* src_mask */ 2133 0xffffffff, /* dst_mask */ 2134 FALSE), /* pcrel_offset */ 2135 HOWTO (R_NDS32_RELAX_REGION_END, /* type */ 2136 0, /* rightshift */ 2137 2, /* size (0 = byte, 1 = short, 2 = long) */ 2138 32, /* bitsize */ 2139 FALSE, /* pc_relative */ 2140 0, /* bitpos */ 2141 complain_overflow_dont,/* complain_on_overflow */ 2142 nds32_elf_ignore_reloc,/* special_function */ 2143 "R_NDS32_RELAX_REGION_END", /* name */ 2144 FALSE, /* partial_inplace */ 2145 0xffffffff, /* src_mask */ 2146 0xffffffff, /* dst_mask */ 2147 FALSE), /* pcrel_offset */ 2148 HOWTO (R_NDS32_MINUEND, /* type */ 2149 0, /* rightshift */ 2150 2, /* size (0 = byte, 1 = short, 2 = long) */ 2151 32, /* bitsize */ 2152 FALSE, /* pc_relative */ 2153 0, /* bitpos */ 2154 complain_overflow_dont,/* complain_on_overflow */ 2155 nds32_elf_ignore_reloc,/* special_function */ 2156 "R_NDS32_MINUEND", /* name */ 2157 FALSE, /* partial_inplace */ 2158 0xffffffff, /* src_mask */ 2159 0xffffffff, /* dst_mask */ 2160 FALSE), /* pcrel_offset */ 2161 HOWTO (R_NDS32_SUBTRAHEND, /* type */ 2162 0, /* rightshift */ 2163 2, /* size (0 = byte, 1 = short, 2 = long) */ 2164 32, /* bitsize */ 2165 FALSE, /* pc_relative */ 2166 0, /* bitpos */ 2167 complain_overflow_dont,/* complain_on_overflow */ 2168 nds32_elf_ignore_reloc,/* special_function */ 2169 "R_NDS32_SUBTRAHEND", /* name */ 2170 FALSE, /* partial_inplace */ 2171 0xffffffff, /* src_mask */ 2172 0xffffffff, /* dst_mask */ 2173 FALSE), /* pcrel_offset */ 2174 HOWTO (R_NDS32_DIFF8, /* type */ 2175 0, /* rightshift */ 2176 0, /* size (0 = byte, 1 = short, 2 = long) */ 2177 8, /* bitsize */ 2178 FALSE, /* pc_relative */ 2179 0, /* bitpos */ 2180 complain_overflow_dont,/* complain_on_overflow */ 2181 nds32_elf_ignore_reloc,/* special_function */ 2182 "R_NDS32_DIFF8", /* name */ 2183 FALSE, /* partial_inplace */ 2184 0x000000ff, /* src_mask */ 2185 0x000000ff, /* dst_mask */ 2186 FALSE), /* pcrel_offset */ 2187 HOWTO (R_NDS32_DIFF16, /* type */ 2188 0, /* rightshift */ 2189 1, /* size (0 = byte, 1 = short, 2 = long) */ 2190 16, /* bitsize */ 2191 FALSE, /* pc_relative */ 2192 0, /* bitpos */ 2193 complain_overflow_dont,/* complain_on_overflow */ 2194 nds32_elf_ignore_reloc,/* special_function */ 2195 "R_NDS32_DIFF16", /* name */ 2196 FALSE, /* partial_inplace */ 2197 0x0000ffff, /* src_mask */ 2198 0x0000ffff, /* dst_mask */ 2199 FALSE), /* pcrel_offset */ 2200 HOWTO (R_NDS32_DIFF32, /* type */ 2201 0, /* rightshift */ 2202 2, /* size (0 = byte, 1 = short, 2 = long) */ 2203 32, /* bitsize */ 2204 FALSE, /* pc_relative */ 2205 0, /* bitpos */ 2206 complain_overflow_dont,/* complain_on_overflow */ 2207 nds32_elf_ignore_reloc,/* special_function */ 2208 "R_NDS32_DIFF32", /* name */ 2209 FALSE, /* partial_inplace */ 2210 0xffffffff, /* src_mask */ 2211 0xffffffff, /* dst_mask */ 2212 FALSE), /* pcrel_offset */ 2213 HOWTO (R_NDS32_DIFF_ULEB128, /* type */ 2214 0, /* rightshift */ 2215 0, /* size (0 = byte, 1 = short, 2 = long) */ 2216 0, /* bitsize */ 2217 FALSE, /* pc_relative */ 2218 0, /* bitpos */ 2219 complain_overflow_dont,/* complain_on_overflow */ 2220 nds32_elf_ignore_reloc,/* special_function */ 2221 "R_NDS32_DIFF_ULEB128",/* name */ 2222 FALSE, /* partial_inplace */ 2223 0xffffffff, /* src_mask */ 2224 0xffffffff, /* dst_mask */ 2225 FALSE), /* pcrel_offset */ 2226 HOWTO (R_NDS32_DATA, /* type */ 2227 0, /* rightshift */ 2228 2, /* size (0 = byte, 1 = short, 2 = long) */ 2229 32, /* bitsize */ 2230 FALSE, /* pc_relative */ 2231 0, /* bitpos */ 2232 complain_overflow_dont,/* complain_on_overflow */ 2233 nds32_elf_ignore_reloc,/* special_function */ 2234 "R_NDS32_DATA", /* name */ 2235 FALSE, /* partial_inplace */ 2236 0xffffffff, /* src_mask */ 2237 0xffffffff, /* dst_mask */ 2238 FALSE), /* pcrel_offset */ 2239 HOWTO (R_NDS32_TRAN, /* type */ 2240 0, /* rightshift */ 2241 2, /* size (0 = byte, 1 = short, 2 = long) */ 2242 32, /* bitsize */ 2243 FALSE, /* pc_relative */ 2244 0, /* bitpos */ 2245 complain_overflow_dont,/* complain_on_overflow */ 2246 nds32_elf_ignore_reloc,/* special_function */ 2247 "R_NDS32_TRAN", /* name */ 2248 FALSE, /* partial_inplace */ 2249 0xffffffff, /* src_mask */ 2250 0xffffffff, /* dst_mask */ 2251 FALSE), /* pcrel_offset */ 2252 HOWTO (R_NDS32_TLS_LE_ADD, /* type */ 2253 0, /* rightshift */ 2254 2, /* size (0 = byte, 1 = short, 2 = long) */ 2255 32, /* bitsize */ 2256 FALSE, /* pc_relative */ 2257 0, /* bitpos */ 2258 complain_overflow_dont, /* complain_on_overflow */ 2259 nds32_elf_ignore_reloc, /* special_function */ 2260 "R_NDS32_TLS_LE_ADD", /* name */ 2261 FALSE, /* partial_inplace */ 2262 0xffffffff, /* src_mask */ 2263 0xffffffff, /* dst_mask */ 2264 FALSE), /* pcrel_offset */ 2265 HOWTO (R_NDS32_TLS_LE_LS, /* type */ 2266 0, /* rightshift */ 2267 2, /* size (0 = byte, 1 = short, 2 = long) */ 2268 32, /* bitsize */ 2269 FALSE, /* pc_relative */ 2270 0, /* bitpos */ 2271 complain_overflow_dont, /* complain_on_overflow */ 2272 nds32_elf_ignore_reloc, /* special_function */ 2273 "R_NDS32_TLS_LE_LS", /* name */ 2274 FALSE, /* partial_inplace */ 2275 0xffffffff, /* src_mask */ 2276 0xffffffff, /* dst_mask */ 2277 FALSE), /* pcrel_offset */ 2278 HOWTO (R_NDS32_EMPTY, /* type */ 2279 0, /* rightshift */ 2280 2, /* size (0 = byte, 1 = short, 2 = long) */ 2281 32, /* bitsize */ 2282 FALSE, /* pc_relative */ 2283 0, /* bitpos */ 2284 complain_overflow_dont, /* complain_on_overflow */ 2285 nds32_elf_ignore_reloc, /* special_function */ 2286 "R_NDS32_EMPTY", /* name */ 2287 FALSE, /* partial_inplace */ 2288 0xffffffff, /* src_mask */ 2289 0xffffffff, /* dst_mask */ 2290 FALSE), /* pcrel_offset */ 2291 }; 2292 2293 2294 /* nds32_insertion_sort sorts an array with nmemb elements of size size. 2296 This prototype is the same as qsort (). */ 2297 2298 void 2299 nds32_insertion_sort (void *base, size_t nmemb, size_t size, 2300 int (*compar) (const void *lhs, const void *rhs)) 2301 { 2302 char *ptr = (char *) base; 2303 int i, j; 2304 char *tmp = xmalloc (size); 2305 2306 /* If i is less than j, i is inserted before j. 2307 2308 |---- j ----- i --------------| 2309 \ / \ / 2310 sorted unsorted 2311 */ 2312 2313 for (i = 1; i < (int) nmemb; i++) 2314 { 2315 for (j = (i - 1); j >= 0; j--) 2316 if (compar (ptr + i * size, ptr + j * size) >= 0) 2317 break; 2318 2319 j++; 2320 2321 if (i == j) 2322 continue; /* i is in order. */ 2323 2324 memcpy (tmp, ptr + i * size, size); 2325 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size); 2326 memcpy (ptr + j * size, tmp, size); 2327 } 2328 free (tmp); 2329 } 2330 2331 /* Sort relocation by r_offset. 2332 2333 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting 2334 algorithm. Relocations at the same r_offset must keep their order. 2335 For example, RELAX_ENTRY must be the very first relocation entry. 2336 2337 Currently, this function implements insertion-sort. 2338 2339 FIXME: If we already sort them in assembler, why bother sort them 2340 here again? */ 2341 2342 static int 2343 compar_reloc (const void *lhs, const void *rhs) 2344 { 2345 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs; 2346 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs; 2347 2348 if (l->r_offset > r->r_offset) 2349 return 1; 2350 else if (l->r_offset == r->r_offset) 2351 return 0; 2352 else 2353 return -1; 2354 } 2355 2356 /* Functions listed below are only used for old relocs. 2357 * nds32_elf_9_pcrel_reloc 2358 * nds32_elf_do_9_pcrel_reloc 2359 * nds32_elf_hi20_reloc 2360 * nds32_elf_relocate_hi20 2361 * nds32_elf_lo12_reloc 2362 * nds32_elf_sda15_reloc 2363 * nds32_elf_generic_reloc 2364 */ 2365 2366 /* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */ 2367 2368 static bfd_reloc_status_type 2369 nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol, 2370 void *data, asection *input_section, bfd *output_bfd, 2371 char **error_message ATTRIBUTE_UNUSED) 2372 { 2373 /* This part is from bfd_elf_generic_reloc. */ 2374 if (output_bfd != (bfd *) NULL 2375 && (symbol->flags & BSF_SECTION_SYM) == 0 2376 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0)) 2377 { 2378 reloc_entry->address += input_section->output_offset; 2379 return bfd_reloc_ok; 2380 } 2381 2382 if (output_bfd != NULL) 2383 { 2384 /* FIXME: See bfd_perform_relocation. Is this right? */ 2385 return bfd_reloc_continue; 2386 } 2387 2388 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto, 2389 input_section, 2390 data, reloc_entry->address, 2391 symbol->section, 2392 (symbol->value 2393 + symbol->section->output_section->vma 2394 + symbol->section->output_offset), 2395 reloc_entry->addend); 2396 } 2397 2398 /* Utility to actually perform an R_NDS32_9_PCREL reloc. */ 2399 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1) 2400 2401 static bfd_reloc_status_type 2402 nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto, 2403 asection *input_section, bfd_byte *data, 2404 bfd_vma offset, 2405 asection *symbol_section ATTRIBUTE_UNUSED, 2406 bfd_vma symbol_value, bfd_vma addend) 2407 { 2408 bfd_signed_vma relocation; 2409 unsigned short x; 2410 bfd_reloc_status_type status; 2411 2412 /* Sanity check the address (offset in section). */ 2413 if (offset > bfd_get_section_limit (abfd, input_section)) 2414 return bfd_reloc_outofrange; 2415 2416 relocation = symbol_value + addend; 2417 /* Make it pc relative. */ 2418 relocation -= (input_section->output_section->vma 2419 + input_section->output_offset); 2420 /* These jumps mask off the lower two bits of the current address 2421 before doing pcrel calculations. */ 2422 relocation -= (offset & -(bfd_vma) 2); 2423 2424 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1) 2425 status = bfd_reloc_overflow; 2426 else 2427 status = bfd_reloc_ok; 2428 2429 x = bfd_getb16 (data + offset); 2430 2431 relocation >>= howto->rightshift; 2432 relocation <<= howto->bitpos; 2433 x = (x & ~howto->dst_mask) 2434 | (((x & howto->src_mask) + relocation) & howto->dst_mask); 2435 2436 bfd_putb16 ((bfd_vma) x, data + offset); 2437 2438 return status; 2439 } 2440 2441 /* Handle the R_NDS32_HI20_[SU]LO relocs. 2442 HI20_SLO is for the add3 and load/store with displacement instructions. 2443 HI20 is for the or3 instruction. 2444 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to 2445 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then 2446 we must add one to the high 16 bytes (which will get subtracted off when 2447 the low 16 bits are added). 2448 These relocs have to be done in combination with an R_NDS32_LO12 reloc 2449 because there is a carry from the LO12 to the HI20. Here we just save 2450 the information we need; we do the actual relocation when we see the LO12. 2451 This code is copied from the elf32-mips.c. We also support an arbitrary 2452 number of HI20 relocs to be associated with a single LO12 reloc. The 2453 assembler sorts the relocs to ensure each HI20 immediately precedes its 2454 LO12. However if there are multiple copies, the assembler may not find 2455 the real LO12 so it picks the first one it finds. */ 2456 2457 struct nds32_hi20 2458 { 2459 struct nds32_hi20 *next; 2460 bfd_byte *addr; 2461 bfd_vma addend; 2462 }; 2463 2464 static struct nds32_hi20 *nds32_hi20_list; 2465 2466 static bfd_reloc_status_type 2467 nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry, 2468 asymbol *symbol, void *data, asection *input_section, 2469 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED) 2470 { 2471 bfd_reloc_status_type ret; 2472 bfd_vma relocation; 2473 struct nds32_hi20 *n; 2474 2475 /* This part is from bfd_elf_generic_reloc. 2476 If we're relocating, and this an external symbol, we don't want 2477 to change anything. */ 2478 if (output_bfd != (bfd *) NULL 2479 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0) 2480 { 2481 reloc_entry->address += input_section->output_offset; 2482 return bfd_reloc_ok; 2483 } 2484 2485 /* Sanity check the address (offset in section). */ 2486 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section)) 2487 return bfd_reloc_outofrange; 2488 2489 ret = bfd_reloc_ok; 2490 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL) 2491 ret = bfd_reloc_undefined; 2492 2493 if (bfd_is_com_section (symbol->section)) 2494 relocation = 0; 2495 else 2496 relocation = symbol->value; 2497 2498 relocation += symbol->section->output_section->vma; 2499 relocation += symbol->section->output_offset; 2500 relocation += reloc_entry->addend; 2501 2502 /* Save the information, and let LO12 do the actual relocation. */ 2503 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n); 2504 if (n == NULL) 2505 return bfd_reloc_outofrange; 2506 2507 n->addr = (bfd_byte *) data + reloc_entry->address; 2508 n->addend = relocation; 2509 n->next = nds32_hi20_list; 2510 nds32_hi20_list = n; 2511 2512 if (output_bfd != (bfd *) NULL) 2513 reloc_entry->address += input_section->output_offset; 2514 2515 return ret; 2516 } 2517 2518 /* Handle an NDS32 ELF HI20 reloc. */ 2519 2520 static void 2521 nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED, 2522 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi, 2523 Elf_Internal_Rela *rello, bfd_byte *contents, 2524 bfd_vma addend) 2525 { 2526 unsigned long insn; 2527 bfd_vma addlo; 2528 2529 insn = bfd_getb32 (contents + relhi->r_offset); 2530 2531 addlo = bfd_getb32 (contents + rello->r_offset); 2532 addlo &= 0xfff; 2533 2534 addend += ((insn & 0xfffff) << 20) + addlo; 2535 2536 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff); 2537 bfd_putb32 (insn, contents + relhi->r_offset); 2538 } 2539 2540 /* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit 2541 inplace relocation; this function exists in order to do the 2542 R_NDS32_HI20_[SU]LO relocation described above. */ 2543 2544 static bfd_reloc_status_type 2545 nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol, 2546 void *data, asection *input_section, bfd *output_bfd, 2547 char **error_message) 2548 { 2549 /* This part is from bfd_elf_generic_reloc. 2550 If we're relocating, and this an external symbol, we don't want 2551 to change anything. */ 2552 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0 2553 && reloc_entry->addend == 0) 2554 { 2555 reloc_entry->address += input_section->output_offset; 2556 return bfd_reloc_ok; 2557 } 2558 2559 if (nds32_hi20_list != NULL) 2560 { 2561 struct nds32_hi20 *l; 2562 2563 l = nds32_hi20_list; 2564 while (l != NULL) 2565 { 2566 unsigned long insn; 2567 unsigned long val; 2568 unsigned long vallo; 2569 struct nds32_hi20 *next; 2570 2571 /* Do the HI20 relocation. Note that we actually don't need 2572 to know anything about the LO12 itself, except where to 2573 find the low 12 bits of the addend needed by the LO12. */ 2574 insn = bfd_getb32 (l->addr); 2575 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address); 2576 vallo &= 0xfff; 2577 switch (reloc_entry->howto->type) 2578 { 2579 case R_NDS32_LO12S3: 2580 vallo <<= 3; 2581 break; 2582 2583 case R_NDS32_LO12S2: 2584 vallo <<= 2; 2585 break; 2586 2587 case R_NDS32_LO12S1: 2588 vallo <<= 1; 2589 break; 2590 2591 case R_NDS32_LO12S0: 2592 vallo <<= 0; 2593 break; 2594 } 2595 2596 val = ((insn & 0xfffff) << 12) + vallo; 2597 val += l->addend; 2598 2599 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff); 2600 bfd_putb32 ((bfd_vma) insn, l->addr); 2601 2602 next = l->next; 2603 free (l); 2604 l = next; 2605 } 2606 2607 nds32_hi20_list = NULL; 2608 } 2609 2610 /* Now do the LO12 reloc in the usual way. 2611 ??? It would be nice to call bfd_elf_generic_reloc here, 2612 but we have partial_inplace set. bfd_elf_generic_reloc will 2613 pass the handling back to bfd_install_relocation which will install 2614 a section relative addend which is wrong. */ 2615 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data, 2616 input_section, output_bfd, error_message); 2617 } 2618 2619 /* Do generic partial_inplace relocation. 2620 This is a local replacement for bfd_elf_generic_reloc. */ 2621 2622 static bfd_reloc_status_type 2623 nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry, 2624 asymbol *symbol, void *data, asection *input_section, 2625 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED) 2626 { 2627 bfd_reloc_status_type ret; 2628 bfd_vma relocation; 2629 bfd_byte *inplace_address; 2630 2631 /* This part is from bfd_elf_generic_reloc. 2632 If we're relocating, and this an external symbol, we don't want 2633 to change anything. */ 2634 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0 2635 && reloc_entry->addend == 0) 2636 { 2637 reloc_entry->address += input_section->output_offset; 2638 return bfd_reloc_ok; 2639 } 2640 2641 /* Now do the reloc in the usual way. 2642 ??? It would be nice to call bfd_elf_generic_reloc here, 2643 but we have partial_inplace set. bfd_elf_generic_reloc will 2644 pass the handling back to bfd_install_relocation which will install 2645 a section relative addend which is wrong. */ 2646 2647 /* Sanity check the address (offset in section). */ 2648 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section)) 2649 return bfd_reloc_outofrange; 2650 2651 ret = bfd_reloc_ok; 2652 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL) 2653 ret = bfd_reloc_undefined; 2654 2655 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL) 2656 relocation = 0; 2657 else 2658 relocation = symbol->value; 2659 2660 /* Only do this for a final link. */ 2661 if (output_bfd == (bfd *) NULL) 2662 { 2663 relocation += symbol->section->output_section->vma; 2664 relocation += symbol->section->output_offset; 2665 } 2666 2667 relocation += reloc_entry->addend; 2668 switch (reloc_entry->howto->type) 2669 { 2670 case R_NDS32_LO12S3: 2671 relocation >>= 3; 2672 break; 2673 2674 case R_NDS32_LO12S2: 2675 relocation >>= 2; 2676 break; 2677 2678 case R_NDS32_LO12S1: 2679 relocation >>= 1; 2680 break; 2681 2682 case R_NDS32_LO12S0: 2683 default: 2684 relocation >>= 0; 2685 break; 2686 } 2687 2688 inplace_address = (bfd_byte *) data + reloc_entry->address; 2689 2690 #define DOIT(x) \ 2691 x = ((x & ~reloc_entry->howto->dst_mask) | \ 2692 (((x & reloc_entry->howto->src_mask) + relocation) & \ 2693 reloc_entry->howto->dst_mask)) 2694 2695 switch (reloc_entry->howto->size) 2696 { 2697 case 1: 2698 { 2699 short x = bfd_getb16 (inplace_address); 2700 2701 DOIT (x); 2702 bfd_putb16 ((bfd_vma) x, inplace_address); 2703 } 2704 break; 2705 case 2: 2706 { 2707 unsigned long x = bfd_getb32 (inplace_address); 2708 2709 DOIT (x); 2710 bfd_putb32 ((bfd_vma) x, inplace_address); 2711 } 2712 break; 2713 default: 2714 BFD_ASSERT (0); 2715 } 2716 2717 if (output_bfd != (bfd *) NULL) 2718 reloc_entry->address += input_section->output_offset; 2719 2720 return ret; 2721 } 2722 2723 /* Handle the R_NDS32_SDA15 reloc. 2724 This reloc is used to compute the address of objects in the small data area 2725 and to perform loads and stores from that area. 2726 The lower 15 bits are sign extended and added to the register specified 2727 in the instruction, which is assumed to point to _SDA_BASE_. 2728 2729 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on 2730 the access size, this must be taken care of. */ 2731 2732 static bfd_reloc_status_type 2733 nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry, 2734 asymbol *symbol, void *data ATTRIBUTE_UNUSED, 2735 asection *input_section, bfd *output_bfd, 2736 char **error_message ATTRIBUTE_UNUSED) 2737 { 2738 /* This part is from bfd_elf_generic_reloc. */ 2739 if (output_bfd != (bfd *) NULL 2740 && (symbol->flags & BSF_SECTION_SYM) == 0 2741 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0)) 2742 { 2743 reloc_entry->address += input_section->output_offset; 2744 return bfd_reloc_ok; 2745 } 2746 2747 if (output_bfd != NULL) 2748 { 2749 /* FIXME: See bfd_perform_relocation. Is this right? */ 2750 return bfd_reloc_continue; 2751 } 2752 2753 /* FIXME: not sure what to do here yet. But then again, the linker 2754 may never call us. */ 2755 abort (); 2756 } 2757 2758 /* nds32_elf_ignore_reloc is the special function for 2759 relocation types which don't need to be relocated 2760 like relaxation relocation types. 2761 This function simply return bfd_reloc_ok when it is 2762 invoked. */ 2763 2764 static bfd_reloc_status_type 2765 nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry, 2766 asymbol *symbol ATTRIBUTE_UNUSED, 2767 void *data ATTRIBUTE_UNUSED, asection *input_section, 2768 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED) 2769 { 2770 if (output_bfd != NULL) 2771 reloc_entry->address += input_section->output_offset; 2772 2773 return bfd_reloc_ok; 2774 } 2775 2776 2778 /* Map BFD reloc types to NDS32 ELF reloc types. */ 2779 2780 struct nds32_reloc_map_entry 2781 { 2782 bfd_reloc_code_real_type bfd_reloc_val; 2783 unsigned char elf_reloc_val; 2784 }; 2785 2786 static const struct nds32_reloc_map_entry nds32_reloc_map[] = 2787 { 2788 {BFD_RELOC_NONE, R_NDS32_NONE}, 2789 {BFD_RELOC_16, R_NDS32_16_RELA}, 2790 {BFD_RELOC_32, R_NDS32_32_RELA}, 2791 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA}, 2792 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA}, 2793 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA}, 2794 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA}, 2795 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA}, 2796 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA}, 2797 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA}, 2798 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA}, 2799 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA}, 2800 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA}, 2801 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA}, 2802 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA}, 2803 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA}, 2804 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA}, 2805 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA}, 2806 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA}, 2807 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA}, 2808 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA}, 2809 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT}, 2810 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY}, 2811 2812 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20}, 2813 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL}, 2814 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL}, 2815 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY}, 2816 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT}, 2817 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT}, 2818 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE}, 2819 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF}, 2820 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20}, 2821 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20}, 2822 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12}, 2823 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15}, 2824 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19}, 2825 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20}, 2826 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12}, 2827 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20}, 2828 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12}, 2829 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15}, 2830 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19}, 2831 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16}, 2832 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL}, 2833 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1}, 2834 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2}, 2835 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3}, 2836 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4}, 2837 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5}, 2838 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6}, 2839 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1}, 2840 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2}, 2841 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3}, 2842 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4}, 2843 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5}, 2844 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6}, 2845 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7}, 2846 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE}, 2847 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA}, 2848 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA}, 2849 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA}, 2850 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA}, 2851 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20}, 2852 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12}, 2853 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20}, 2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12}, 2855 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15}, 2856 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19}, 2857 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20}, 2858 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA}, 2859 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA}, 2860 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA}, 2861 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA}, 2862 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA}, 2863 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA}, 2864 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA}, 2865 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA}, 2866 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA}, 2867 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA}, 2868 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA}, 2869 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA}, 2870 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA}, 2871 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF}, 2872 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF}, 2873 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA}, 2874 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA}, 2875 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR}, 2876 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT}, 2877 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF}, 2878 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED}, 2879 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY}, 2880 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF}, 2881 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK}, 2882 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN}, 2883 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END}, 2884 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND}, 2885 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND}, 2886 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY}, 2887 2888 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8}, 2889 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16}, 2890 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32}, 2891 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128}, 2892 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA}, 2893 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA}, 2894 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN}, 2895 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA}, 2896 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA}, 2897 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20}, 2898 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12}, 2899 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD}, 2900 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS}, 2901 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20}, 2902 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2}, 2903 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF}, 2904 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20}, 2905 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0}, 2906 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1}, 2907 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2}, 2908 }; 2909 2910 /* Patch tag. */ 2911 2912 static reloc_howto_type * 2913 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, 2914 const char *r_name) 2915 { 2916 unsigned int i; 2917 2918 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++) 2919 if (nds32_elf_howto_table[i].name != NULL 2920 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0) 2921 return &nds32_elf_howto_table[i]; 2922 2923 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++) 2924 if (nds32_elf_relax_howto_table[i].name != NULL 2925 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0) 2926 return &nds32_elf_relax_howto_table[i]; 2927 2928 return NULL; 2929 } 2930 2931 static reloc_howto_type * 2932 bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code) 2933 { 2934 if (code < R_NDS32_RELAX_ENTRY) 2935 { 2936 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table)); 2937 return &nds32_elf_howto_table[code]; 2938 } 2939 else 2940 { 2941 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY) 2942 < ARRAY_SIZE (nds32_elf_relax_howto_table)); 2943 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY]; 2944 } 2945 } 2946 2947 static reloc_howto_type * 2948 bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, 2949 bfd_reloc_code_real_type code) 2950 { 2951 unsigned int i; 2952 2953 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++) 2954 { 2955 if (nds32_reloc_map[i].bfd_reloc_val == code) 2956 return bfd_elf32_bfd_reloc_type_table_lookup 2957 (nds32_reloc_map[i].elf_reloc_val); 2958 } 2959 2960 return NULL; 2961 } 2962 2963 /* Set the howto pointer for an NDS32 ELF reloc. */ 2964 2965 static void 2966 nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr, 2967 Elf_Internal_Rela *dst) 2968 { 2969 enum elf_nds32_reloc_type r_type; 2970 2971 r_type = ELF32_R_TYPE (dst->r_info); 2972 if (r_type > R_NDS32_GNU_VTENTRY) 2973 { 2974 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type); 2975 r_type = 0; 2976 } 2977 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type); 2978 } 2979 2980 static void 2981 nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr, 2982 Elf_Internal_Rela *dst) 2983 { 2984 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE) 2985 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY) 2986 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max))); 2987 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info)); 2988 } 2989 2990 /* Support for core dump NOTE sections. 2991 Reference to include/linux/elfcore.h in Linux. */ 2992 2993 static bfd_boolean 2994 nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) 2995 { 2996 int offset; 2997 size_t size; 2998 2999 switch (note->descsz) 3000 { 3001 case 0x114: 3002 /* Linux/NDS32 32-bit, ABI1 */ 3003 3004 /* pr_cursig */ 3005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); 3006 3007 /* pr_pid */ 3008 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24); 3009 3010 /* pr_reg */ 3011 offset = 72; 3012 size = 200; 3013 break; 3014 3015 case 0xfc: 3016 /* Linux/NDS32 32-bit */ 3017 3018 /* pr_cursig */ 3019 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); 3020 3021 /* pr_pid */ 3022 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24); 3023 3024 /* pr_reg */ 3025 offset = 72; 3026 size = 176; 3027 break; 3028 3029 default: 3030 return FALSE; 3031 } 3032 3033 /* Make a ".reg" section. */ 3034 return _bfd_elfcore_make_pseudosection (abfd, ".reg", 3035 size, note->descpos + offset); 3036 } 3037 3038 static bfd_boolean 3039 nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) 3040 { 3041 switch (note->descsz) 3042 { 3043 case 124: 3044 /* Linux/NDS32 */ 3045 3046 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */ 3047 elf_tdata (abfd)->core->program = 3048 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); 3049 elf_tdata (abfd)->core->command = 3050 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); 3051 3052 default: 3053 return FALSE; 3054 } 3055 3056 /* Note that for some reason, a spurious space is tacked 3057 onto the end of the args in some (at least one anyway) 3058 implementations, so strip it off if it exists. */ 3059 { 3060 char *command = elf_tdata (abfd)->core->command; 3061 int n = strlen (command); 3062 3063 if (0 < n && command[n - 1] == ' ') 3064 command[n - 1] = '\0'; 3065 } 3066 3067 return TRUE; 3068 } 3069 3070 /* Hook called by the linker routine which adds symbols from an object 3071 file. We must handle the special NDS32 section numbers here. 3072 We also keep watching for whether we need to create the sdata special 3073 linker sections. */ 3074 3075 static bfd_boolean 3076 nds32_elf_add_symbol_hook (bfd *abfd, 3077 struct bfd_link_info *info ATTRIBUTE_UNUSED, 3078 Elf_Internal_Sym *sym, 3079 const char **namep ATTRIBUTE_UNUSED, 3080 flagword *flagsp ATTRIBUTE_UNUSED, 3081 asection **secp, bfd_vma *valp) 3082 { 3083 switch (sym->st_shndx) 3084 { 3085 case SHN_COMMON: 3086 /* Common symbols less than the GP size are automatically 3087 treated as SHN_MIPS_SCOMMON symbols. */ 3088 if (sym->st_size > elf_gp_size (abfd) 3089 || ELF_ST_TYPE (sym->st_info) == STT_TLS) 3090 break; 3091 3092 /* st_value is the alignemnt constraint. 3093 That might be its actual size if it is an array or structure. */ 3094 switch (sym->st_value) 3095 { 3096 case 1: 3097 *secp = bfd_make_section_old_way (abfd, ".scommon_b"); 3098 break; 3099 case 2: 3100 *secp = bfd_make_section_old_way (abfd, ".scommon_h"); 3101 break; 3102 case 4: 3103 *secp = bfd_make_section_old_way (abfd, ".scommon_w"); 3104 break; 3105 case 8: 3106 *secp = bfd_make_section_old_way (abfd, ".scommon_d"); 3107 break; 3108 default: 3109 return TRUE; 3110 } 3111 3112 (*secp)->flags |= SEC_IS_COMMON; 3113 *valp = sym->st_size; 3114 break; 3115 } 3116 3117 return TRUE; 3118 } 3119 3120 3121 /* This function can figure out the best location for a base register to access 3122 data relative to this base register 3123 INPUT: 3124 sda_d0: size of first DOUBLE WORD data section 3125 sda_w0: size of first WORD data section 3126 sda_h0: size of first HALF WORD data section 3127 sda_b : size of BYTE data section 3128 sda_hi: size of second HALF WORD data section 3129 sda_w1: size of second WORD data section 3130 sda_d1: size of second DOUBLE WORD data section 3131 OUTPUT: 3132 offset (always positive) from the beginning of sda_d0 if OK 3133 a negative error value if fail 3134 NOTE: 3135 these 7 sections have to be located back to back if exist 3136 a pass in 0 value for non-existing section */ 3137 3138 /* Due to the interpretation of simm15 field of load/store depending on 3139 data accessing size, the organization of base register relative data shall 3140 like the following figure 3141 ------------------------------------------- 3142 | DOUBLE WORD sized data (range +/- 128K) 3143 ------------------------------------------- 3144 | WORD sized data (range +/- 64K) 3145 ------------------------------------------- 3146 | HALF WORD sized data (range +/- 32K) 3147 ------------------------------------------- 3148 | BYTE sized data (range +/- 16K) 3149 ------------------------------------------- 3150 | HALF WORD sized data (range +/- 32K) 3151 ------------------------------------------- 3152 | WORD sized data (range +/- 64K) 3153 ------------------------------------------- 3154 | DOUBLE WORD sized data (range +/- 128K) 3155 ------------------------------------------- 3156 Its base register shall be set to access these data freely. */ 3157 3158 /* We have to figure out the SDA_BASE value, so that we can adjust the 3159 symbol value correctly. We look up the symbol _SDA_BASE_ in the output 3160 BFD. If we can't find it, we're stuck. We cache it in the ELF 3161 target data. We don't need to adjust the symbol value for an 3162 external symbol if we are producing relocatable output. */ 3163 3164 static asection *sda_rela_sec = NULL; 3165 3166 #define SDA_SECTION_NUM 10 3167 3168 static bfd_reloc_status_type 3169 nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info, 3170 bfd_vma *psb, bfd_boolean add_symbol) 3171 { 3172 int relax_fp_as_gp; 3173 struct elf_nds32_link_hash_table *table; 3174 struct bfd_link_hash_entry *h, *h2; 3175 long unsigned int total = 0; 3176 3177 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE); 3178 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak)) 3179 { 3180 asection *first = NULL, *final = NULL, *temp; 3181 bfd_vma sda_base; 3182 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being 3183 4 byte-aligned. Therefore, it has to set the first section ".data" 3184 4 byte-aligned. */ 3185 static const char sec_name[SDA_SECTION_NUM][10] = 3186 { 3187 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b", 3188 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d" 3189 }; 3190 size_t i = 0; 3191 3192 if (output_bfd->sections == NULL) 3193 { 3194 *psb = elf_gp (output_bfd); 3195 return bfd_reloc_ok; 3196 } 3197 3198 /* Get the first and final section. */ 3199 while (i < sizeof (sec_name) / sizeof (sec_name [0])) 3200 { 3201 temp = bfd_get_section_by_name (output_bfd, sec_name[i]); 3202 if (temp && !first && (temp->size != 0 || temp->rawsize != 0)) 3203 first = temp; 3204 if (temp && (temp->size != 0 || temp->rawsize != 0)) 3205 final = temp; 3206 3207 /* Summarize the sections in order to check if joining .bss. */ 3208 if (temp && temp->size != 0) 3209 total += temp->size; 3210 else if (temp && temp->rawsize != 0) 3211 total += temp->rawsize; 3212 3213 i++; 3214 } 3215 3216 /* Check .bss size. */ 3217 temp = bfd_get_section_by_name (output_bfd, ".bss"); 3218 if (temp) 3219 { 3220 if (temp->size != 0) 3221 total += temp->size; 3222 else if (temp->rawsize != 0) 3223 total += temp->rawsize; 3224 3225 if (total < 0x80000) 3226 { 3227 if (!first && (temp->size != 0 || temp->rawsize != 0)) 3228 first = temp; 3229 if ((temp->size != 0 || temp->rawsize != 0)) 3230 final = temp; 3231 } 3232 } 3233 3234 if (first && final) 3235 { 3236 /* The middle of data region. */ 3237 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2; 3238 3239 /* Find the section sda_base located. */ 3240 i = 0; 3241 while (i < sizeof (sec_name) / sizeof (sec_name [0])) 3242 { 3243 final = bfd_get_section_by_name (output_bfd, sec_name[i]); 3244 if (final && (final->size != 0 || final->rawsize != 0) 3245 && sda_base >= final->vma) 3246 { 3247 first = final; 3248 i++; 3249 } 3250 else 3251 break; 3252 } 3253 } 3254 else 3255 { 3256 /* There is not any data section in output bfd, and set _SDA_BASE_ in 3257 first output section. */ 3258 first = output_bfd->sections; 3259 while (first && first->size == 0 && first->rawsize == 0) 3260 first = first->next; 3261 if (!first) 3262 { 3263 *psb = elf_gp (output_bfd); 3264 return bfd_reloc_ok; 3265 } 3266 sda_base = first->vma + first->rawsize; 3267 } 3268 3269 sda_base -= first->vma; 3270 sda_base = sda_base & (~7); 3271 3272 if (!_bfd_generic_link_add_one_symbol 3273 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first, 3274 (bfd_vma) sda_base, (const char *) NULL, FALSE, 3275 get_elf_backend_data (output_bfd)->collect, &h)) 3276 return FALSE; 3277 3278 sda_rela_sec = first; 3279 3280 table = nds32_elf_hash_table (info); 3281 relax_fp_as_gp = table->relax_fp_as_gp; 3282 if (relax_fp_as_gp) 3283 { 3284 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME, 3285 FALSE, FALSE, FALSE); 3286 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol. 3287 And set FP equal to SDA_BASE to do relaxation for 3288 la $fp, _FP_BASE_. */ 3289 if (!_bfd_generic_link_add_one_symbol 3290 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK, 3291 first, (bfd_vma) sda_base, (const char *) NULL, 3292 FALSE, get_elf_backend_data (output_bfd)->collect, &h2)) 3293 return FALSE; 3294 } 3295 } 3296 3297 if (add_symbol == TRUE) 3298 { 3299 if (h) 3300 { 3301 /* Now set gp. */ 3302 elf_gp (output_bfd) = (h->u.def.value 3303 + h->u.def.section->output_section->vma 3304 + h->u.def.section->output_offset); 3305 } 3306 else 3307 { 3308 (*_bfd_error_handler) (_("error: Can't find symbol: _SDA_BASE_.")); 3309 return bfd_reloc_dangerous; 3310 } 3311 } 3312 3313 *psb = h->u.def.value + h->u.def.section->output_section->vma 3314 + h->u.def.section->output_offset; 3315 return bfd_reloc_ok; 3316 } 3317 3318 3320 /* Return size of a PLT entry. */ 3321 #define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE 3322 3323 3324 /* Create an entry in an nds32 ELF linker hash table. */ 3325 3326 static struct bfd_hash_entry * 3327 nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry, 3328 struct bfd_hash_table *table, 3329 const char *string) 3330 { 3331 struct elf_nds32_link_hash_entry *ret; 3332 3333 ret = (struct elf_nds32_link_hash_entry *) entry; 3334 3335 /* Allocate the structure if it has not already been allocated by a 3336 subclass. */ 3337 if (ret == NULL) 3338 ret = (struct elf_nds32_link_hash_entry *) 3339 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry)); 3340 3341 if (ret == NULL) 3342 return (struct bfd_hash_entry *) ret; 3343 3344 /* Call the allocation method of the superclass. */ 3345 ret = (struct elf_nds32_link_hash_entry *) 3346 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string); 3347 3348 if (ret != NULL) 3349 { 3350 struct elf_nds32_link_hash_entry *eh; 3351 3352 eh = (struct elf_nds32_link_hash_entry *) ret; 3353 eh->dyn_relocs = NULL; 3354 eh->tls_type = GOT_UNKNOWN; 3355 } 3356 3357 return (struct bfd_hash_entry *) ret; 3358 } 3359 3360 /* Create an nds32 ELF linker hash table. */ 3361 3362 static struct bfd_link_hash_table * 3363 nds32_elf_link_hash_table_create (bfd *abfd) 3364 { 3365 struct elf_nds32_link_hash_table *ret; 3366 3367 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table); 3368 3369 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt); 3370 if (ret == NULL) 3371 return NULL; 3372 3373 /* patch tag. */ 3374 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd, 3375 nds32_elf_link_hash_newfunc, 3376 sizeof (struct elf_nds32_link_hash_entry), 3377 NDS32_ELF_DATA)) 3378 { 3379 free (ret); 3380 return NULL; 3381 } 3382 3383 ret->sgot = NULL; 3384 ret->sgotplt = NULL; 3385 ret->srelgot = NULL; 3386 ret->splt = NULL; 3387 ret->srelplt = NULL; 3388 ret->sdynbss = NULL; 3389 ret->srelbss = NULL; 3390 ret->sym_ld_script = NULL; 3391 ret->ex9_export_file = NULL; 3392 ret->ex9_import_file = NULL; 3393 3394 return &ret->root.root; 3395 } 3396 3397 /* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up 3398 shortcuts to them in our hash table. */ 3399 3400 static bfd_boolean 3401 create_got_section (bfd *dynobj, struct bfd_link_info *info) 3402 { 3403 struct elf_nds32_link_hash_table *htab; 3404 3405 if (!_bfd_elf_create_got_section (dynobj, info)) 3406 return FALSE; 3407 3408 htab = nds32_elf_hash_table (info); 3409 htab->sgot = bfd_get_section_by_name (dynobj, ".got"); 3410 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt"); 3411 if (!htab->sgot || !htab->sgotplt) 3412 abort (); 3413 3414 /* _bfd_elf_create_got_section will create it for us. */ 3415 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got"); 3416 if (htab->srelgot == NULL 3417 || !bfd_set_section_flags (dynobj, htab->srelgot, 3418 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS 3419 | SEC_IN_MEMORY | SEC_LINKER_CREATED 3420 | SEC_READONLY)) 3421 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2)) 3422 return FALSE; 3423 3424 return TRUE; 3425 } 3426 3427 /* Create dynamic sections when linking against a dynamic object. */ 3428 3429 static bfd_boolean 3430 nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) 3431 { 3432 struct elf_nds32_link_hash_table *htab; 3433 flagword flags, pltflags; 3434 register asection *s; 3435 const struct elf_backend_data *bed; 3436 int ptralign = 2; /* 32-bit */ 3437 3438 bed = get_elf_backend_data (abfd); 3439 3440 htab = nds32_elf_hash_table (info); 3441 3442 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and 3443 .rel[a].bss sections. */ 3444 3445 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY 3446 | SEC_LINKER_CREATED); 3447 3448 pltflags = flags; 3449 pltflags |= SEC_CODE; 3450 if (bed->plt_not_loaded) 3451 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS); 3452 if (bed->plt_readonly) 3453 pltflags |= SEC_READONLY; 3454 3455 s = bfd_make_section (abfd, ".plt"); 3456 htab->splt = s; 3457 if (s == NULL 3458 || !bfd_set_section_flags (abfd, s, pltflags) 3459 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment)) 3460 return FALSE; 3461 3462 if (bed->want_plt_sym) 3463 { 3464 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the 3465 .plt section. */ 3466 struct bfd_link_hash_entry *bh = NULL; 3467 struct elf_link_hash_entry *h; 3468 3469 if (!(_bfd_generic_link_add_one_symbol 3470 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s, 3471 (bfd_vma) 0, (const char *) NULL, FALSE, 3472 get_elf_backend_data (abfd)->collect, &bh))) 3473 return FALSE; 3474 3475 h = (struct elf_link_hash_entry *) bh; 3476 h->def_regular = 1; 3477 h->type = STT_OBJECT; 3478 3479 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h)) 3480 return FALSE; 3481 } 3482 3483 s = bfd_make_section (abfd, 3484 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt"); 3485 htab->srelplt = s; 3486 if (s == NULL 3487 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY) 3488 || !bfd_set_section_alignment (abfd, s, ptralign)) 3489 return FALSE; 3490 3491 if (htab->sgot == NULL && !create_got_section (abfd, info)) 3492 return FALSE; 3493 3494 { 3495 const char *secname; 3496 char *relname; 3497 flagword secflags; 3498 asection *sec; 3499 3500 for (sec = abfd->sections; sec; sec = sec->next) 3501 { 3502 secflags = bfd_get_section_flags (abfd, sec); 3503 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED)) 3504 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS)) 3505 continue; 3506 secname = bfd_get_section_name (abfd, sec); 3507 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6); 3508 strcpy (relname, ".rela"); 3509 strcat (relname, secname); 3510 if (bfd_get_section_by_name (abfd, secname)) 3511 continue; 3512 s = bfd_make_section (abfd, relname); 3513 if (s == NULL 3514 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY) 3515 || !bfd_set_section_alignment (abfd, s, ptralign)) 3516 return FALSE; 3517 } 3518 } 3519 3520 if (bed->want_dynbss) 3521 { 3522 /* The .dynbss section is a place to put symbols which are defined 3523 by dynamic objects, are referenced by regular objects, and are 3524 not functions. We must allocate space for them in the process 3525 image and use a R_*_COPY reloc to tell the dynamic linker to 3526 initialize them at run time. The linker script puts the .dynbss 3527 section into the .bss section of the final image. */ 3528 s = bfd_make_section (abfd, ".dynbss"); 3529 htab->sdynbss = s; 3530 if (s == NULL 3531 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED)) 3532 return FALSE; 3533 /* The .rel[a].bss section holds copy relocs. This section is not 3534 normally needed. We need to create it here, though, so that the 3535 linker will map it to an output section. We can't just create it 3536 only if we need it, because we will not know whether we need it 3537 until we have seen all the input files, and the first time the 3538 main linker code calls BFD after examining all the input files 3539 (size_dynamic_sections) the input sections have already been 3540 mapped to the output sections. If the section turns out not to 3541 be needed, we can discard it later. We will never need this 3542 section when generating a shared object, since they do not use 3543 copy relocs. */ 3544 if (!bfd_link_pic (info)) 3545 { 3546 s = bfd_make_section (abfd, (bed->default_use_rela_p 3547 ? ".rela.bss" : ".rel.bss")); 3548 htab->srelbss = s; 3549 if (s == NULL 3550 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY) 3551 || !bfd_set_section_alignment (abfd, s, ptralign)) 3552 return FALSE; 3553 } 3554 } 3555 3556 return TRUE; 3557 } 3558 3559 /* Copy the extra info we tack onto an elf_link_hash_entry. */ 3560 static void 3561 nds32_elf_copy_indirect_symbol (struct bfd_link_info *info, 3562 struct elf_link_hash_entry *dir, 3563 struct elf_link_hash_entry *ind) 3564 { 3565 struct elf_nds32_link_hash_entry *edir, *eind; 3566 3567 edir = (struct elf_nds32_link_hash_entry *) dir; 3568 eind = (struct elf_nds32_link_hash_entry *) ind; 3569 3570 if (eind->dyn_relocs != NULL) 3571 { 3572 if (edir->dyn_relocs != NULL) 3573 { 3574 struct elf_nds32_dyn_relocs **pp; 3575 struct elf_nds32_dyn_relocs *p; 3576 3577 if (ind->root.type == bfd_link_hash_indirect) 3578 abort (); 3579 3580 /* Add reloc counts against the weak sym to the strong sym 3581 list. Merge any entries against the same section. */ 3582 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;) 3583 { 3584 struct elf_nds32_dyn_relocs *q; 3585 3586 for (q = edir->dyn_relocs; q != NULL; q = q->next) 3587 if (q->sec == p->sec) 3588 { 3589 q->pc_count += p->pc_count; 3590 q->count += p->count; 3591 *pp = p->next; 3592 break; 3593 } 3594 if (q == NULL) 3595 pp = &p->next; 3596 } 3597 *pp = edir->dyn_relocs; 3598 } 3599 3600 edir->dyn_relocs = eind->dyn_relocs; 3601 eind->dyn_relocs = NULL; 3602 } 3603 3604 _bfd_elf_link_hash_copy_indirect (info, dir, ind); 3605 } 3606 3607 3609 /* Adjust a symbol defined by a dynamic object and referenced by a 3610 regular object. The current definition is in some section of the 3611 dynamic object, but we're not including those sections. We have to 3612 change the definition to something the rest of the link can 3613 understand. */ 3614 3615 static bfd_boolean 3616 nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info, 3617 struct elf_link_hash_entry *h) 3618 { 3619 struct elf_nds32_link_hash_table *htab; 3620 struct elf_nds32_link_hash_entry *eh; 3621 struct elf_nds32_dyn_relocs *p; 3622 bfd *dynobj; 3623 asection *s; 3624 unsigned int power_of_two; 3625 3626 dynobj = elf_hash_table (info)->dynobj; 3627 3628 /* Make sure we know what is going on here. */ 3629 BFD_ASSERT (dynobj != NULL 3630 && (h->needs_plt 3631 || h->u.weakdef != NULL 3632 || (h->def_dynamic && h->ref_regular && !h->def_regular))); 3633 3634 3635 /* If this is a function, put it in the procedure linkage table. We 3636 will fill in the contents of the procedure linkage table later, 3637 when we know the address of the .got section. */ 3638 if (h->type == STT_FUNC || h->needs_plt) 3639 { 3640 if (!bfd_link_pic (info) 3641 && !h->def_dynamic 3642 && !h->ref_dynamic 3643 && h->root.type != bfd_link_hash_undefweak 3644 && h->root.type != bfd_link_hash_undefined) 3645 { 3646 /* This case can occur if we saw a PLT reloc in an input 3647 file, but the symbol was never referred to by a dynamic 3648 object. In such a case, we don't actually need to build 3649 a procedure linkage table, and we can just do a PCREL 3650 reloc instead. */ 3651 h->plt.offset = (bfd_vma) - 1; 3652 h->needs_plt = 0; 3653 } 3654 3655 return TRUE; 3656 } 3657 else 3658 h->plt.offset = (bfd_vma) - 1; 3659 3660 /* If this is a weak symbol, and there is a real definition, the 3661 processor independent code will have arranged for us to see the 3662 real definition first, and we can just use the same value. */ 3663 if (h->u.weakdef != NULL) 3664 { 3665 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined 3666 || h->u.weakdef->root.type == bfd_link_hash_defweak); 3667 h->root.u.def.section = h->u.weakdef->root.u.def.section; 3668 h->root.u.def.value = h->u.weakdef->root.u.def.value; 3669 return TRUE; 3670 } 3671 3672 /* This is a reference to a symbol defined by a dynamic object which 3673 is not a function. */ 3674 3675 /* If we are creating a shared library, we must presume that the 3676 only references to the symbol are via the global offset table. 3677 For such cases we need not do anything here; the relocations will 3678 be handled correctly by relocate_section. */ 3679 if (bfd_link_pic (info)) 3680 return TRUE; 3681 3682 /* If there are no references to this symbol that do not use the 3683 GOT, we don't need to generate a copy reloc. */ 3684 if (!h->non_got_ref) 3685 return TRUE; 3686 3687 /* If -z nocopyreloc was given, we won't generate them either. */ 3688 if (info->nocopyreloc) 3689 { 3690 h->non_got_ref = 0; 3691 return TRUE; 3692 } 3693 3694 eh = (struct elf_nds32_link_hash_entry *) h; 3695 for (p = eh->dyn_relocs; p != NULL; p = p->next) 3696 { 3697 s = p->sec->output_section; 3698 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0) 3699 break; 3700 } 3701 3702 /* If we didn't find any dynamic relocs in sections which needs the 3703 copy reloc, then we'll be keeping the dynamic relocs and avoiding 3704 the copy reloc. */ 3705 if (p == NULL) 3706 { 3707 h->non_got_ref = 0; 3708 return TRUE; 3709 } 3710 3711 /* We must allocate the symbol in our .dynbss section, which will 3712 become part of the .bss section of the executable. There will be 3713 an entry for this symbol in the .dynsym section. The dynamic 3714 object will contain position independent code, so all references 3715 from the dynamic object to this symbol will go through the global 3716 offset table. The dynamic linker will use the .dynsym entry to 3717 determine the address it must put in the global offset table, so 3718 both the dynamic object and the regular object will refer to the 3719 same memory location for the variable. */ 3720 3721 htab = nds32_elf_hash_table (info); 3722 s = htab->sdynbss; 3723 BFD_ASSERT (s != NULL); 3724 3725 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker 3726 to copy the initial value out of the dynamic object and into the 3727 runtime process image. We need to remember the offset into the 3728 .rela.bss section we are going to use. */ 3729 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) 3730 { 3731 asection *srel; 3732 3733 srel = htab->srelbss; 3734 BFD_ASSERT (srel != NULL); 3735 srel->size += sizeof (Elf32_External_Rela); 3736 h->needs_copy = 1; 3737 } 3738 3739 /* We need to figure out the alignment required for this symbol. I 3740 have no idea how ELF linkers handle this. */ 3741 power_of_two = bfd_log2 (h->size); 3742 if (power_of_two > 3) 3743 power_of_two = 3; 3744 3745 /* Apply the required alignment. */ 3746 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two)); 3747 if (power_of_two > bfd_get_section_alignment (dynobj, s)) 3748 { 3749 if (!bfd_set_section_alignment (dynobj, s, power_of_two)) 3750 return FALSE; 3751 } 3752 3753 /* Define the symbol as being at this point in the section. */ 3754 h->root.u.def.section = s; 3755 h->root.u.def.value = s->size; 3756 3757 /* Increment the section size to make room for the symbol. */ 3758 s->size += h->size; 3759 3760 return TRUE; 3761 } 3762 3763 /* Allocate space in .plt, .got and associated reloc sections for 3764 dynamic relocs. */ 3765 3766 static bfd_boolean 3767 allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) 3768 { 3769 struct bfd_link_info *info; 3770 struct elf_nds32_link_hash_table *htab; 3771 struct elf_nds32_link_hash_entry *eh; 3772 struct elf_nds32_dyn_relocs *p; 3773 3774 if (h->root.type == bfd_link_hash_indirect) 3775 return TRUE; 3776 3777 if (h->root.type == bfd_link_hash_warning) 3778 /* When warning symbols are created, they **replace** the "real" 3779 entry in the hash table, thus we never get to see the real 3780 symbol in a hash traversal. So look at it now. */ 3781 h = (struct elf_link_hash_entry *) h->root.u.i.link; 3782 3783 info = (struct bfd_link_info *) inf; 3784 htab = nds32_elf_hash_table (info); 3785 3786 eh = (struct elf_nds32_link_hash_entry *) h; 3787 3788 if (htab->root.dynamic_sections_created && h->plt.refcount > 0) 3789 { 3790 /* Make sure this symbol is output as a dynamic symbol. 3791 Undefined weak syms won't yet be marked as dynamic. */ 3792 if (h->dynindx == -1 && !h->forced_local) 3793 { 3794 if (!bfd_elf_link_record_dynamic_symbol (info, h)) 3795 return FALSE; 3796 } 3797 3798 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h)) 3799 { 3800 asection *s = htab->splt; 3801 3802 /* If this is the first .plt entry, make room for the special 3803 first entry. */ 3804 if (s->size == 0) 3805 s->size += PLT_ENTRY_SIZE; 3806 3807 h->plt.offset = s->size; 3808 3809 /* If this symbol is not defined in a regular file, and we are 3810 not generating a shared library, then set the symbol to this 3811 location in the .plt. This is required to make function 3812 pointers compare as equal between the normal executable and 3813 the shared library. */ 3814 if (!bfd_link_pic (info) && !h->def_regular) 3815 { 3816 h->root.u.def.section = s; 3817 h->root.u.def.value = h->plt.offset; 3818 } 3819 3820 /* Make room for this entry. */ 3821 s->size += PLT_ENTRY_SIZE; 3822 3823 /* We also need to make an entry in the .got.plt section, which 3824 will be placed in the .got section by the linker script. */ 3825 htab->sgotplt->size += 4; 3826 3827 /* We also need to make an entry in the .rel.plt section. */ 3828 htab->srelplt->size += sizeof (Elf32_External_Rela); 3829 } 3830 else 3831 { 3832 h->plt.offset = (bfd_vma) - 1; 3833 h->needs_plt = 0; 3834 } 3835 } 3836 else 3837 { 3838 h->plt.offset = (bfd_vma) - 1; 3839 h->needs_plt = 0; 3840 } 3841 3842 if (h->got.refcount > 0) 3843 { 3844 asection *s; 3845 bfd_boolean dyn; 3846 int tls_type = elf32_nds32_hash_entry (h)->tls_type; 3847 3848 /* Make sure this symbol is output as a dynamic symbol. 3849 Undefined weak syms won't yet be marked as dynamic. */ 3850 if (h->dynindx == -1 && !h->forced_local) 3851 { 3852 if (!bfd_elf_link_record_dynamic_symbol (info, h)) 3853 return FALSE; 3854 } 3855 3856 s = htab->sgot; 3857 h->got.offset = s->size; 3858 3859 if (tls_type == GOT_UNKNOWN) 3860 abort (); 3861 else if (tls_type == GOT_NORMAL 3862 || tls_type == GOT_TLS_IE) 3863 /* Need a GOT slot. */ 3864 s->size += 4; 3865 3866 dyn = htab->root.dynamic_sections_created; 3867 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)) 3868 htab->srelgot->size += sizeof (Elf32_External_Rela); 3869 } 3870 else 3871 h->got.offset = (bfd_vma) - 1; 3872 3873 if (eh->dyn_relocs == NULL) 3874 return TRUE; 3875 3876 /* In the shared -Bsymbolic case, discard space allocated for 3877 dynamic pc-relative relocs against symbols which turn out to be 3878 defined in regular objects. For the normal shared case, discard 3879 space for pc-relative relocs that have become local due to symbol 3880 visibility changes. */ 3881 3882 if (bfd_link_pic (info)) 3883 { 3884 if (h->def_regular && (h->forced_local || info->symbolic)) 3885 { 3886 struct elf_nds32_dyn_relocs **pp; 3887 3888 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;) 3889 { 3890 p->count -= p->pc_count; 3891 p->pc_count = 0; 3892 if (p->count == 0) 3893 *pp = p->next; 3894 else 3895 pp = &p->next; 3896 } 3897 } 3898 } 3899 else 3900 { 3901 /* For the non-shared case, discard space for relocs against 3902 symbols which turn out to need copy relocs or are not dynamic. */ 3903 3904 if (!h->non_got_ref 3905 && ((h->def_dynamic 3906 && !h->def_regular) 3907 || (htab->root.dynamic_sections_created 3908 && (h->root.type == bfd_link_hash_undefweak 3909 || h->root.type == bfd_link_hash_undefined)))) 3910 { 3911 /* Make sure this symbol is output as a dynamic symbol. 3912 Undefined weak syms won't yet be marked as dynamic. */ 3913 if (h->dynindx == -1 && !h->forced_local) 3914 { 3915 if (!bfd_elf_link_record_dynamic_symbol (info, h)) 3916 return FALSE; 3917 } 3918 3919 /* If that succeeded, we know we'll be keeping all the 3920 relocs. */ 3921 if (h->dynindx != -1) 3922 goto keep; 3923 } 3924 3925 eh->dyn_relocs = NULL; 3926 3927 keep:; 3928 } 3929 3930 /* Finally, allocate space. */ 3931 for (p = eh->dyn_relocs; p != NULL; p = p->next) 3932 { 3933 asection *sreloc = elf_section_data (p->sec)->sreloc; 3934 sreloc->size += p->count * sizeof (Elf32_External_Rela); 3935 } 3936 3937 return TRUE; 3938 } 3939 3940 /* Find any dynamic relocs that apply to read-only sections. */ 3941 3942 static bfd_boolean 3943 readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf) 3944 { 3945 struct elf_nds32_link_hash_entry *eh; 3946 struct elf_nds32_dyn_relocs *p; 3947 3948 if (h->root.type == bfd_link_hash_warning) 3949 h = (struct elf_link_hash_entry *) h->root.u.i.link; 3950 3951 eh = (struct elf_nds32_link_hash_entry *) h; 3952 for (p = eh->dyn_relocs; p != NULL; p = p->next) 3953 { 3954 asection *s = p->sec->output_section; 3955 3956 if (s != NULL && (s->flags & SEC_READONLY) != 0) 3957 { 3958 struct bfd_link_info *info = (struct bfd_link_info *) inf; 3959 3960 info->flags |= DF_TEXTREL; 3961 3962 /* Not an error, just cut short the traversal. */ 3963 return FALSE; 3964 } 3965 } 3966 return TRUE; 3967 } 3968 3969 /* Set the sizes of the dynamic sections. */ 3970 3971 static bfd_boolean 3972 nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, 3973 struct bfd_link_info *info) 3974 { 3975 struct elf_nds32_link_hash_table *htab; 3976 bfd *dynobj; 3977 asection *s; 3978 bfd_boolean relocs; 3979 bfd *ibfd; 3980 3981 htab = nds32_elf_hash_table (info); 3982 dynobj = htab->root.dynobj; 3983 BFD_ASSERT (dynobj != NULL); 3984 3985 if (htab->root.dynamic_sections_created) 3986 { 3987 /* Set the contents of the .interp section to the interpreter. */ 3988 if (!bfd_link_pic (info) && !info->nointerp) 3989 { 3990 s = bfd_get_section_by_name (dynobj, ".interp"); 3991 BFD_ASSERT (s != NULL); 3992 s->size = sizeof ELF_DYNAMIC_INTERPRETER; 3993 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; 3994 } 3995 } 3996 3997 /* Set up .got offsets for local syms, and space for local dynamic 3998 relocs. */ 3999 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) 4000 { 4001 bfd_signed_vma *local_got; 4002 bfd_signed_vma *end_local_got; 4003 bfd_size_type locsymcount; 4004 Elf_Internal_Shdr *symtab_hdr; 4005 asection *srel; 4006 4007 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour) 4008 continue; 4009 4010 for (s = ibfd->sections; s != NULL; s = s->next) 4011 { 4012 struct elf_nds32_dyn_relocs *p; 4013 4014 for (p = ((struct elf_nds32_dyn_relocs *) 4015 elf_section_data (s)->local_dynrel); 4016 p != NULL; p = p->next) 4017 { 4018 if (!bfd_is_abs_section (p->sec) 4019 && bfd_is_abs_section (p->sec->output_section)) 4020 { 4021 /* Input section has been discarded, either because 4022 it is a copy of a linkonce section or due to 4023 linker script /DISCARD/, so we'll be discarding 4024 the relocs too. */ 4025 } 4026 else if (p->count != 0) 4027 { 4028 srel = elf_section_data (p->sec)->sreloc; 4029 srel->size += p->count * sizeof (Elf32_External_Rela); 4030 if ((p->sec->output_section->flags & SEC_READONLY) != 0) 4031 info->flags |= DF_TEXTREL; 4032 } 4033 } 4034 } 4035 4036 local_got = elf_local_got_refcounts (ibfd); 4037 if (!local_got) 4038 continue; 4039 4040 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; 4041 locsymcount = symtab_hdr->sh_info; 4042 end_local_got = local_got + locsymcount; 4043 s = htab->sgot; 4044 srel = htab->srelgot; 4045 for (; local_got < end_local_got; ++local_got) 4046 { 4047 if (*local_got > 0) 4048 { 4049 *local_got = s->size; 4050 s->size += 4; 4051 if (bfd_link_pic (info)) 4052 srel->size += sizeof (Elf32_External_Rela); 4053 } 4054 else 4055 *local_got = (bfd_vma) - 1; 4056 } 4057 } 4058 4059 /* Allocate global sym .plt and .got entries, and space for global 4060 sym dynamic relocs. */ 4061 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info); 4062 4063 /* We now have determined the sizes of the various dynamic sections. 4064 Allocate memory for them. */ 4065 relocs = FALSE; 4066 for (s = dynobj->sections; s != NULL; s = s->next) 4067 { 4068 if ((s->flags & SEC_LINKER_CREATED) == 0) 4069 continue; 4070 4071 if (s == htab->splt) 4072 { 4073 /* Strip this section if we don't need it; see the 4074 comment below. */ 4075 } 4076 else if (s == htab->sgot) 4077 { 4078 got_size += s->size; 4079 } 4080 else if (s == htab->sgotplt) 4081 { 4082 got_size += s->size; 4083 } 4084 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0) 4085 { 4086 if (s->size != 0 && s != htab->srelplt) 4087 relocs = TRUE; 4088 4089 /* We use the reloc_count field as a counter if we need 4090 to copy relocs into the output file. */ 4091 s->reloc_count = 0; 4092 } 4093 else 4094 { 4095 /* It's not one of our sections, so don't allocate space. */ 4096 continue; 4097 } 4098 4099 if (s->size == 0) 4100 { 4101 /* If we don't need this section, strip it from the 4102 output file. This is mostly to handle .rela.bss and 4103 .rela.plt. We must create both sections in 4104 create_dynamic_sections, because they must be created 4105 before the linker maps input sections to output 4106 sections. The linker does that before 4107 adjust_dynamic_symbol is called, and it is that 4108 function which decides whether anything needs to go 4109 into these sections. */ 4110 s->flags |= SEC_EXCLUDE; 4111 continue; 4112 } 4113 4114 /* Allocate memory for the section contents. We use bfd_zalloc 4115 here in case unused entries are not reclaimed before the 4116 section's contents are written out. This should not happen, 4117 but this way if it does, we get a R_NDS32_NONE reloc instead 4118 of garbage. */ 4119 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size); 4120 if (s->contents == NULL) 4121 return FALSE; 4122 } 4123 4124 4125 if (htab->root.dynamic_sections_created) 4126 { 4127 /* Add some entries to the .dynamic section. We fill in the 4128 values later, in nds32_elf_finish_dynamic_sections, but we 4129 must add the entries now so that we get the correct size for 4130 the .dynamic section. The DT_DEBUG entry is filled in by the 4131 dynamic linker and used by the debugger. */ 4132 #define add_dynamic_entry(TAG, VAL) \ 4133 _bfd_elf_add_dynamic_entry (info, TAG, VAL) 4134 4135 if (!bfd_link_pic (info)) 4136 { 4137 if (!add_dynamic_entry (DT_DEBUG, 0)) 4138 return FALSE; 4139 } 4140 4141 if (htab->splt->size != 0) 4142 { 4143 if (!add_dynamic_entry (DT_PLTGOT, 0) 4144 || !add_dynamic_entry (DT_PLTRELSZ, 0) 4145 || !add_dynamic_entry (DT_PLTREL, DT_RELA) 4146 || !add_dynamic_entry (DT_JMPREL, 0)) 4147 return FALSE; 4148 } 4149 4150 if (relocs) 4151 { 4152 if (!add_dynamic_entry (DT_RELA, 0) 4153 || !add_dynamic_entry (DT_RELASZ, 0) 4154 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela))) 4155 return FALSE; 4156 4157 /* If any dynamic relocs apply to a read-only section, 4158 then we need a DT_TEXTREL entry. */ 4159 if ((info->flags & DF_TEXTREL) == 0) 4160 elf_link_hash_traverse (&htab->root, readonly_dynrelocs, 4161 (void *) info); 4162 4163 if ((info->flags & DF_TEXTREL) != 0) 4164 { 4165 if (!add_dynamic_entry (DT_TEXTREL, 0)) 4166 return FALSE; 4167 } 4168 } 4169 } 4170 #undef add_dynamic_entry 4171 4172 return TRUE; 4173 } 4174 4175 static bfd_reloc_status_type 4176 nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd, 4177 bfd_vma relocation, bfd_byte *location) 4178 { 4179 int size; 4180 bfd_vma x = 0; 4181 bfd_reloc_status_type flag; 4182 unsigned int rightshift = howto->rightshift; 4183 unsigned int bitpos = howto->bitpos; 4184 4185 /* If the size is negative, negate RELOCATION. This isn't very 4186 general. */ 4187 if (howto->size < 0) 4188 relocation = -relocation; 4189 4190 /* Get the value we are going to relocate. */ 4191 size = bfd_get_reloc_size (howto); 4192 switch (size) 4193 { 4194 default: 4195 abort (); 4196 break; 4197 case 0: 4198 return bfd_reloc_ok; 4199 case 2: 4200 x = bfd_getb16 (location); 4201 break; 4202 case 4: 4203 x = bfd_getb32 (location); 4204 break; 4205 } 4206 4207 /* Check for overflow. FIXME: We may drop bits during the addition 4208 which we don't check for. We must either check at every single 4209 operation, which would be tedious, or we must do the computations 4210 in a type larger than bfd_vma, which would be inefficient. */ 4211 flag = bfd_reloc_ok; 4212 if (howto->complain_on_overflow != complain_overflow_dont) 4213 { 4214 bfd_vma addrmask, fieldmask, signmask, ss; 4215 bfd_vma a, b, sum; 4216 4217 /* Get the values to be added together. For signed and unsigned 4218 relocations, we assume that all values should be truncated to 4219 the size of an address. For bitfields, all the bits matter. 4220 See also bfd_check_overflow. */ 4221 fieldmask = N_ONES (howto->bitsize); 4222 signmask = ~fieldmask; 4223 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask; 4224 a = (relocation & addrmask) >> rightshift; 4225 b = (x & howto->src_mask & addrmask) >> bitpos; 4226 4227 switch (howto->complain_on_overflow) 4228 { 4229 case complain_overflow_signed: 4230 /* If any sign bits are set, all sign bits must be set. 4231 That is, A must be a valid negative address after 4232 shifting. */ 4233 signmask = ~(fieldmask >> 1); 4234 /* Fall through. */ 4235 4236 case complain_overflow_bitfield: 4237 /* Much like the signed check, but for a field one bit 4238 wider. We allow a bitfield to represent numbers in the 4239 range -2**n to 2**n-1, where n is the number of bits in the 4240 field. Note that when bfd_vma is 32 bits, a 32-bit reloc 4241 can't overflow, which is exactly what we want. */ 4242 ss = a & signmask; 4243 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask)) 4244 flag = bfd_reloc_overflow; 4245 4246 /* We only need this next bit of code if the sign bit of B 4247 is below the sign bit of A. This would only happen if 4248 SRC_MASK had fewer bits than BITSIZE. Note that if 4249 SRC_MASK has more bits than BITSIZE, we can get into 4250 trouble; we would need to verify that B is in range, as 4251 we do for A above. */ 4252 ss = ((~howto->src_mask) >> 1) & howto->src_mask; 4253 ss >>= bitpos; 4254 4255 /* Set all the bits above the sign bit. */ 4256 b = (b ^ ss) - ss; 4257 4258 /* Now we can do the addition. */ 4259 sum = a + b; 4260 4261 /* See if the result has the correct sign. Bits above the 4262 sign bit are junk now; ignore them. If the sum is 4263 positive, make sure we did not have all negative inputs; 4264 if the sum is negative, make sure we did not have all 4265 positive inputs. The test below looks only at the sign 4266 bits, and it really just 4267 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM) 4268 4269 We mask with addrmask here to explicitly allow an address 4270 wrap-around. The Linux kernel relies on it, and it is 4271 the only way to write assembler code which can run when 4272 loaded at a location 0x80000000 away from the location at 4273 which it is linked. */ 4274 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask) 4275 flag = bfd_reloc_overflow; 4276 4277 break; 4278 4279 case complain_overflow_unsigned: 4280 /* Checking for an unsigned overflow is relatively easy: 4281 trim the addresses and add, and trim the result as well. 4282 Overflow is normally indicated when the result does not 4283 fit in the field. However, we also need to consider the 4284 case when, e.g., fieldmask is 0x7fffffff or smaller, an 4285 input is 0x80000000, and bfd_vma is only 32 bits; then we 4286 will get sum == 0, but there is an overflow, since the 4287 inputs did not fit in the field. Instead of doing a 4288 separate test, we can check for this by or-ing in the 4289 operands when testing for the sum overflowing its final 4290 field. */ 4291 sum = (a + b) & addrmask; 4292 if ((a | b | sum) & signmask) 4293 flag = bfd_reloc_overflow; 4294 break; 4295 4296 default: 4297 abort (); 4298 } 4299 } 4300 4301 /* Put RELOCATION in the right bits. */ 4302 relocation >>= (bfd_vma) rightshift; 4303 relocation <<= (bfd_vma) bitpos; 4304 4305 /* Add RELOCATION to the right bits of X. */ 4306 /* FIXME : 090616 4307 Because the relaxation may generate duplicate relocation at one address, 4308 an addition to immediate in the instruction may cause the relocation added 4309 several times. 4310 This bug should be fixed in assembler, but a check is also needed here. */ 4311 if (howto->partial_inplace) 4312 x = ((x & ~howto->dst_mask) 4313 | (((x & howto->src_mask) + relocation) & howto->dst_mask)); 4314 else 4315 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask)); 4316 4317 4318 /* Put the relocated value back in the object file. */ 4319 switch (size) 4320 { 4321 default: 4322 case 0: 4323 case 1: 4324 case 8: 4325 abort (); 4326 break; 4327 case 2: 4328 bfd_putb16 (x, location); 4329 break; 4330 case 4: 4331 bfd_putb32 (x, location); 4332 break; 4333 } 4334 4335 return flag; 4336 } 4337 4338 static bfd_reloc_status_type 4339 nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd, 4340 asection *input_section, bfd_byte *contents, 4341 bfd_vma address, bfd_vma value, bfd_vma addend) 4342 { 4343 bfd_vma relocation; 4344 4345 /* Sanity check the address. */ 4346 if (address > bfd_get_section_limit (input_bfd, input_section)) 4347 return bfd_reloc_outofrange; 4348 4349 /* This function assumes that we are dealing with a basic relocation 4350 against a symbol. We want to compute the value of the symbol to 4351 relocate to. This is just VALUE, the value of the symbol, plus 4352 ADDEND, any addend associated with the reloc. */ 4353 relocation = value + addend; 4354 4355 /* If the relocation is PC relative, we want to set RELOCATION to 4356 the distance between the symbol (currently in RELOCATION) and the 4357 location we are relocating. Some targets (e.g., i386-aout) 4358 arrange for the contents of the section to be the negative of the 4359 offset of the location within the section; for such targets 4360 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF) 4361 simply leave the contents of the section as zero; for such 4362 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not 4363 need to subtract out the offset of the location within the 4364 section (which is just ADDRESS). */ 4365 if (howto->pc_relative) 4366 { 4367 relocation -= (input_section->output_section->vma 4368 + input_section->output_offset); 4369 if (howto->pcrel_offset) 4370 relocation -= address; 4371 } 4372 4373 return nds32_relocate_contents (howto, input_bfd, relocation, 4374 contents + address); 4375 } 4376 4377 static bfd_boolean 4378 nds32_elf_output_symbol_hook (struct bfd_link_info *info, 4379 const char *name, 4380 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED, 4381 asection *input_sec, 4382 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED) 4383 { 4384 const char *source; 4385 FILE *sym_ld_script = NULL; 4386 struct elf_nds32_link_hash_table *table; 4387 4388 table = nds32_elf_hash_table (info); 4389 sym_ld_script = table->sym_ld_script; 4390 if (!sym_ld_script) 4391 return TRUE; 4392 4393 if (!h || !name || *name == '\0') 4394 return TRUE; 4395 4396 if (input_sec->flags & SEC_EXCLUDE) 4397 return TRUE; 4398 4399 if (!check_start_export_sym) 4400 { 4401 fprintf (sym_ld_script, "SECTIONS\n{\n"); 4402 check_start_export_sym = 1; 4403 } 4404 4405 if (h->root.type == bfd_link_hash_defined 4406 || h->root.type == bfd_link_hash_defweak) 4407 { 4408 if (!h->root.u.def.section->output_section) 4409 return TRUE; 4410 4411 if (bfd_is_const_section (input_sec)) 4412 source = input_sec->name; 4413 else 4414 source = input_sec->owner->filename; 4415 4416 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n", 4417 h->root.root.string, 4418 (long) (h->root.u.def.value 4419 + h->root.u.def.section->output_section->vma 4420 + h->root.u.def.section->output_offset), source); 4421 } 4422 4423 return TRUE; 4424 } 4425 4426 /* Relocate an NDS32/D ELF section. 4427 There is some attempt to make this function usable for many architectures, 4428 both for RELA and REL type relocs, if only to serve as a learning tool. 4429 4430 The RELOCATE_SECTION function is called by the new ELF backend linker 4431 to handle the relocations for a section. 4432 4433 The relocs are always passed as Rela structures; if the section 4434 actually uses Rel structures, the r_addend field will always be 4435 zero. 4436 4437 This function is responsible for adjust the section contents as 4438 necessary, and (if using Rela relocs and generating a 4439 relocatable output file) adjusting the reloc addend as 4440 necessary. 4441 4442 This function does not have to worry about setting the reloc 4443 address or the reloc symbol index. 4444 4445 LOCAL_SYMS is a pointer to the swapped in local symbols. 4446 4447 LOCAL_SECTIONS is an array giving the section in the input file 4448 corresponding to the st_shndx field of each local symbol. 4449 4450 The global hash table entry for the global symbols can be found 4451 via elf_sym_hashes (input_bfd). 4452 4453 When generating relocatable output, this function must handle 4454 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 4455 going to be the section symbol corresponding to the output 4456 section, which means that the addend must be adjusted 4457 accordingly. */ 4458 4459 static bfd_vma 4460 dtpoff_base (struct bfd_link_info *info) 4461 { 4462 /* If tls_sec is NULL, we should have signalled an error already. */ 4463 if (elf_hash_table (info)->tls_sec == NULL) 4464 return 0; 4465 return elf_hash_table (info)->tls_sec->vma; 4466 } 4467 4468 static bfd_boolean 4469 nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED, 4470 struct bfd_link_info * info, 4471 bfd * input_bfd, 4472 asection * input_section, 4473 bfd_byte * contents, 4474 Elf_Internal_Rela * relocs, 4475 Elf_Internal_Sym * local_syms, 4476 asection ** local_sections) 4477 { 4478 Elf_Internal_Shdr *symtab_hdr; 4479 struct elf_link_hash_entry **sym_hashes; 4480 Elf_Internal_Rela *rel, *relend; 4481 bfd_boolean ret = TRUE; /* Assume success. */ 4482 int align = 0; 4483 bfd_reloc_status_type r; 4484 const char *errmsg = NULL; 4485 bfd_vma gp; 4486 struct elf_nds32_link_hash_table *htab; 4487 bfd *dynobj; 4488 bfd_vma *local_got_offsets; 4489 asection *sgot, *splt, *sreloc; 4490 bfd_vma high_address; 4491 struct elf_nds32_link_hash_table *table; 4492 int eliminate_gc_relocs; 4493 bfd_vma fpbase_addr; 4494 4495 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; 4496 sym_hashes = elf_sym_hashes (input_bfd); 4497 htab = nds32_elf_hash_table (info); 4498 high_address = bfd_get_section_limit (input_bfd, input_section); 4499 4500 dynobj = htab->root.dynobj; 4501 local_got_offsets = elf_local_got_offsets (input_bfd); 4502 4503 sgot = htab->sgot; 4504 splt = htab->splt; 4505 sreloc = NULL; 4506 4507 rel = relocs; 4508 relend = relocs + input_section->reloc_count; 4509 4510 table = nds32_elf_hash_table (info); 4511 eliminate_gc_relocs = table->eliminate_gc_relocs; 4512 /* By this time, we can adjust the value of _SDA_BASE_. */ 4513 if ((!bfd_link_relocatable (info))) 4514 { 4515 is_SDA_BASE_set = 1; 4516 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE); 4517 if (r != bfd_reloc_ok) 4518 return FALSE; 4519 } 4520 4521 if (is_ITB_BASE_set == 0) 4522 { 4523 /* Set the _ITB_BASE_. */ 4524 if (!nds32_elf_ex9_itb_base (info)) 4525 { 4526 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), 4527 output_bfd); 4528 bfd_set_error (bfd_error_bad_value); 4529 } 4530 } 4531 4532 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON) 4533 if (!nds32_elf_ifc_reloc ()) 4534 (*_bfd_error_handler) (_("error: IFC relocation error.")); 4535 4536 /* Relocation for .ex9.itable. */ 4537 if (table->target_optimize & NDS32_RELAX_EX9_ON 4538 || (table->ex9_import_file && table->update_ex9_table)) 4539 nds32_elf_ex9_reloc_jmp (info); 4540 4541 /* Use gp as fp to prevent truncated fit. Because in relaxation time 4542 the fp value is set as gp, and it has be reverted for instruction 4543 setting fp. */ 4544 fpbase_addr = elf_gp (output_bfd); 4545 4546 for (rel = relocs; rel < relend; rel++) 4547 { 4548 enum elf_nds32_reloc_type r_type; 4549 reloc_howto_type *howto = NULL; 4550 unsigned long r_symndx; 4551 struct elf_link_hash_entry *h = NULL; 4552 Elf_Internal_Sym *sym = NULL; 4553 asection *sec; 4554 bfd_vma relocation; 4555 4556 /* We can't modify r_addend here as elf_link_input_bfd has an assert to 4557 ensure it's zero (we use REL relocs, not RELA). Therefore this 4558 should be assigning zero to `addend', but for clarity we use 4559 `r_addend'. */ 4560 4561 bfd_vma addend = rel->r_addend; 4562 bfd_vma offset = rel->r_offset; 4563 4564 r_type = ELF32_R_TYPE (rel->r_info); 4565 if (r_type >= R_NDS32_max) 4566 { 4567 (*_bfd_error_handler) (_("%B: error: unknown relocation type %d."), 4568 input_bfd, r_type); 4569 bfd_set_error (bfd_error_bad_value); 4570 ret = FALSE; 4571 continue; 4572 } 4573 4574 if (r_type == R_NDS32_GNU_VTENTRY 4575 || r_type == R_NDS32_GNU_VTINHERIT 4576 || r_type == R_NDS32_NONE 4577 || r_type == R_NDS32_RELA_GNU_VTENTRY 4578 || r_type == R_NDS32_RELA_GNU_VTINHERIT 4579 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA) 4580 || r_type == R_NDS32_DATA 4581 || r_type == R_NDS32_TRAN 4582 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7)) 4583 continue; 4584 4585 /* If we enter the fp-as-gp region. Resolve the address 4586 of best fp-base. */ 4587 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN 4588 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG)) 4589 { 4590 int dist; 4591 4592 /* Distance to relocation of best fp-base is encoded in R_SYM. */ 4593 dist = rel->r_addend >> 16; 4594 fpbase_addr = calculate_memory_address (input_bfd, rel + dist, 4595 local_syms, symtab_hdr); 4596 } 4597 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END 4598 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG)) 4599 { 4600 fpbase_addr = elf_gp (output_bfd); 4601 } 4602 4603 if (((r_type >= R_NDS32_DWARF2_OP1_RELA 4604 && r_type <= R_NDS32_DWARF2_LEB_RELA) 4605 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info)) 4606 continue; 4607 4608 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type); 4609 r_symndx = ELF32_R_SYM (rel->r_info); 4610 4611 /* This is a final link. */ 4612 sym = NULL; 4613 sec = NULL; 4614 h = NULL; 4615 4616 if (r_symndx < symtab_hdr->sh_info) 4617 { 4618 /* Local symbol. */ 4619 sym = local_syms + r_symndx; 4620 sec = local_sections[r_symndx]; 4621 4622 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); 4623 addend = rel->r_addend; 4624 } 4625 else 4626 { 4627 /* External symbol. */ 4628 bfd_boolean warned, ignored, unresolved_reloc; 4629 int symndx = r_symndx - symtab_hdr->sh_info; 4630 4631 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 4632 r_symndx, symtab_hdr, sym_hashes, h, sec, 4633 relocation, unresolved_reloc, warned, 4634 ignored); 4635 4636 /* la $fp, _FP_BASE_ is per-function (region). 4637 Handle it specially. */ 4638 switch ((int) r_type) 4639 { 4640 case R_NDS32_SDA19S0_RELA: 4641 case R_NDS32_SDA15S0_RELA: 4642 case R_NDS32_20_RELA: 4643 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string, 4644 FP_BASE_NAME) == 0) 4645 { 4646 relocation = fpbase_addr; 4647 break; 4648 } 4649 } 4650 4651 } 4652 4653 if (bfd_link_relocatable (info)) 4654 { 4655 /* This is a relocatable link. We don't have to change 4656 anything, unless the reloc is against a section symbol, 4657 in which case we have to adjust according to where the 4658 section symbol winds up in the output section. */ 4659 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 4660 rel->r_addend += sec->output_offset + sym->st_value; 4661 4662 continue; 4663 } 4664 4665 /* Sanity check the address. */ 4666 if (offset > high_address) 4667 { 4668 r = bfd_reloc_outofrange; 4669 goto check_reloc; 4670 } 4671 4672 if ((r_type >= R_NDS32_DWARF2_OP1_RELA 4673 && r_type <= R_NDS32_DWARF2_LEB_RELA) 4674 || r_type >= R_NDS32_RELAX_ENTRY) 4675 continue; 4676 4677 switch ((int) r_type) 4678 { 4679 case R_NDS32_GOTOFF: 4680 /* Relocation is relative to the start of the global offset 4681 table (for ld24 rx, #uimm24), e.g. access at label+addend 4682 4683 ld24 rx. #label@GOTOFF + addend 4684 sub rx, r12. */ 4685 case R_NDS32_GOTOFF_HI20: 4686 case R_NDS32_GOTOFF_LO12: 4687 case R_NDS32_GOTOFF_LO15: 4688 case R_NDS32_GOTOFF_LO19: 4689 BFD_ASSERT (sgot != NULL); 4690 4691 relocation -= elf_gp (output_bfd); 4692 break; 4693 4694 case R_NDS32_9_PLTREL: 4695 case R_NDS32_25_PLTREL: 4696 /* Relocation is to the entry for this symbol in the 4697 procedure linkage table. */ 4698 4699 /* The native assembler will generate a 25_PLTREL reloc 4700 for a local symbol if you assemble a call from one 4701 section to another when using -K pic. */ 4702 if (h == NULL) 4703 break; 4704 4705 if (h->forced_local) 4706 break; 4707 4708 /* We didn't make a PLT entry for this symbol. This 4709 happens when statically linking PIC code, or when 4710 using -Bsymbolic. */ 4711 if (h->plt.offset == (bfd_vma) - 1) 4712 break; 4713 4714 relocation = (splt->output_section->vma 4715 + splt->output_offset + h->plt.offset); 4716 break; 4717 4718 case R_NDS32_PLT_GOTREL_HI20: 4719 case R_NDS32_PLT_GOTREL_LO12: 4720 case R_NDS32_PLT_GOTREL_LO15: 4721 case R_NDS32_PLT_GOTREL_LO19: 4722 case R_NDS32_PLT_GOTREL_LO20: 4723 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1) 4724 { 4725 /* We didn't make a PLT entry for this symbol. This 4726 happens when statically linking PIC code, or when 4727 using -Bsymbolic. */ 4728 relocation -= elf_gp (output_bfd); 4729 break; 4730 } 4731 4732 relocation = (splt->output_section->vma 4733 + splt->output_offset + h->plt.offset); 4734 4735 relocation -= elf_gp (output_bfd); 4736 break; 4737 4738 case R_NDS32_PLTREL_HI20: 4739 case R_NDS32_PLTREL_LO12: 4740 4741 /* Relocation is to the entry for this symbol in the 4742 procedure linkage table. */ 4743 4744 /* The native assembler will generate a 25_PLTREL reloc 4745 for a local symbol if you assemble a call from one 4746 section to another when using -K pic. */ 4747 if (h == NULL) 4748 break; 4749 4750 if (h->forced_local) 4751 break; 4752 4753 if (h->plt.offset == (bfd_vma) - 1) 4754 /* We didn't make a PLT entry for this symbol. This 4755 happens when statically linking PIC code, or when 4756 using -Bsymbolic. */ 4757 break; 4758 4759 if (splt == NULL) 4760 break; 4761 4762 relocation = (splt->output_section->vma 4763 + splt->output_offset 4764 + h->plt.offset + 4) 4765 - (input_section->output_section->vma 4766 + input_section->output_offset 4767 + rel->r_offset); 4768 4769 break; 4770 4771 case R_NDS32_GOTPC20: 4772 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation 4773 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */ 4774 relocation = elf_gp (output_bfd); 4775 break; 4776 4777 case R_NDS32_GOTPC_HI20: 4778 case R_NDS32_GOTPC_LO12: 4779 { 4780 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation 4781 bl .+4 4782 seth rx,#high(_GLOBAL_OFFSET_TABLE_) 4783 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4) 4784 or 4785 bl .+4 4786 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_) 4787 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4) 4788 */ 4789 relocation = elf_gp (output_bfd); 4790 relocation -= (input_section->output_section->vma 4791 + input_section->output_offset + rel->r_offset); 4792 break; 4793 } 4794 4795 case R_NDS32_GOT20: 4796 /* Fall through. */ 4797 case R_NDS32_GOT_HI20: 4798 case R_NDS32_GOT_LO12: 4799 case R_NDS32_GOT_LO15: 4800 case R_NDS32_GOT_LO19: 4801 /* Relocation is to the entry for this symbol in the global 4802 offset table. */ 4803 BFD_ASSERT (sgot != NULL); 4804 4805 if (h != NULL) 4806 { 4807 bfd_boolean dyn; 4808 bfd_vma off; 4809 4810 off = h->got.offset; 4811 BFD_ASSERT (off != (bfd_vma) - 1); 4812 dyn = htab->root.dynamic_sections_created; 4813 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 4814 bfd_link_pic (info), 4815 h) 4816 || (bfd_link_pic (info) 4817 && (info->symbolic 4818 || h->dynindx == -1 4819 || h->forced_local) && h->def_regular)) 4820 { 4821 /* This is actually a static link, or it is a 4822 -Bsymbolic link and the symbol is defined 4823 locally, or the symbol was forced to be local 4824 because of a version file. We must initialize 4825 this entry in the global offset table. Since the 4826 offset must always be a multiple of 4, we use the 4827 least significant bit to record whether we have 4828 initialized it already. 4829 4830 When doing a dynamic link, we create a .rela.got 4831 relocation entry to initialize the value. This 4832 is done in the finish_dynamic_symbol routine. */ 4833 if ((off & 1) != 0) 4834 off &= ~1; 4835 else 4836 { 4837 bfd_put_32 (output_bfd, relocation, sgot->contents + off); 4838 h->got.offset |= 1; 4839 } 4840 } 4841 relocation = sgot->output_section->vma + sgot->output_offset + off 4842 - elf_gp (output_bfd); 4843 } 4844 else 4845 { 4846 bfd_vma off; 4847 bfd_byte *loc; 4848 4849 BFD_ASSERT (local_got_offsets != NULL 4850 && local_got_offsets[r_symndx] != (bfd_vma) - 1); 4851 4852 off = local_got_offsets[r_symndx]; 4853 4854 /* The offset must always be a multiple of 4. We use 4855 the least significant bit to record whether we have 4856 already processed this entry. */ 4857 if ((off & 1) != 0) 4858 off &= ~1; 4859 else 4860 { 4861 bfd_put_32 (output_bfd, relocation, sgot->contents + off); 4862 4863 if (bfd_link_pic (info)) 4864 { 4865 asection *srelgot; 4866 Elf_Internal_Rela outrel; 4867 4868 /* We need to generate a R_NDS32_RELATIVE reloc 4869 for the dynamic linker. */ 4870 srelgot = bfd_get_section_by_name (dynobj, ".rela.got"); 4871 BFD_ASSERT (srelgot != NULL); 4872 4873 outrel.r_offset = (elf_gp (output_bfd) 4874 + sgot->output_offset + off); 4875 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE); 4876 outrel.r_addend = relocation; 4877 loc = srelgot->contents; 4878 loc += 4879 srelgot->reloc_count * sizeof (Elf32_External_Rela); 4880 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); 4881 ++srelgot->reloc_count; 4882 } 4883 local_got_offsets[r_symndx] |= 1; 4884 } 4885 relocation = sgot->output_section->vma + sgot->output_offset + off 4886 - elf_gp (output_bfd); 4887 } 4888 4889 break; 4890 4891 case R_NDS32_16_RELA: 4892 case R_NDS32_20_RELA: 4893 case R_NDS32_5_RELA: 4894 case R_NDS32_32_RELA: 4895 case R_NDS32_9_PCREL_RELA: 4896 case R_NDS32_WORD_9_PCREL_RELA: 4897 case R_NDS32_10_UPCREL_RELA: 4898 case R_NDS32_15_PCREL_RELA: 4899 case R_NDS32_17_PCREL_RELA: 4900 case R_NDS32_25_PCREL_RELA: 4901 case R_NDS32_HI20_RELA: 4902 case R_NDS32_LO12S3_RELA: 4903 case R_NDS32_LO12S2_RELA: 4904 case R_NDS32_LO12S2_DP_RELA: 4905 case R_NDS32_LO12S2_SP_RELA: 4906 case R_NDS32_LO12S1_RELA: 4907 case R_NDS32_LO12S0_RELA: 4908 case R_NDS32_LO12S0_ORI_RELA: 4909 if (bfd_link_pic (info) && r_symndx != 0 4910 && (input_section->flags & SEC_ALLOC) != 0 4911 && (eliminate_gc_relocs == 0 4912 || (sec && (sec->flags & SEC_EXCLUDE) == 0)) 4913 && ((r_type != R_NDS32_9_PCREL_RELA 4914 && r_type != R_NDS32_WORD_9_PCREL_RELA 4915 && r_type != R_NDS32_10_UPCREL_RELA 4916 && r_type != R_NDS32_15_PCREL_RELA 4917 && r_type != R_NDS32_17_PCREL_RELA 4918 && r_type != R_NDS32_25_PCREL_RELA 4919 && !(r_type == R_NDS32_32_RELA 4920 && strcmp (input_section->name, ".eh_frame") == 0)) 4921 || (h != NULL && h->dynindx != -1 4922 && (!info->symbolic || !h->def_regular)))) 4923 { 4924 Elf_Internal_Rela outrel; 4925 bfd_boolean skip, relocate; 4926 bfd_byte *loc; 4927 4928 /* When generating a shared object, these relocations 4929 are copied into the output file to be resolved at run 4930 time. */ 4931 4932 if (sreloc == NULL) 4933 { 4934 const char *name; 4935 4936 name = bfd_elf_string_from_elf_section 4937 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx, 4938 elf_section_data (input_section)->rela.hdr->sh_name); 4939 if (name == NULL) 4940 return FALSE; 4941 4942 BFD_ASSERT (strncmp (name, ".rela", 5) == 0 4943 && strcmp (bfd_get_section_name (input_bfd, 4944 input_section), 4945 name + 5) == 0); 4946 4947 sreloc = bfd_get_section_by_name (dynobj, name); 4948 BFD_ASSERT (sreloc != NULL); 4949 } 4950 4951 skip = FALSE; 4952 relocate = FALSE; 4953 4954 outrel.r_offset = _bfd_elf_section_offset (output_bfd, 4955 info, 4956 input_section, 4957 rel->r_offset); 4958 if (outrel.r_offset == (bfd_vma) - 1) 4959 skip = TRUE; 4960 else if (outrel.r_offset == (bfd_vma) - 2) 4961 skip = TRUE, relocate = TRUE; 4962 outrel.r_offset += (input_section->output_section->vma 4963 + input_section->output_offset); 4964 4965 if (skip) 4966 memset (&outrel, 0, sizeof outrel); 4967 else if (r_type == R_NDS32_17_PCREL_RELA 4968 || r_type == R_NDS32_15_PCREL_RELA 4969 || r_type == R_NDS32_25_PCREL_RELA) 4970 { 4971 BFD_ASSERT (h != NULL && h->dynindx != -1); 4972 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); 4973 outrel.r_addend = rel->r_addend; 4974 } 4975 else 4976 { 4977 /* h->dynindx may be -1 if this symbol was marked to 4978 become local. */ 4979 if (h == NULL 4980 || ((info->symbolic || h->dynindx == -1) 4981 && h->def_regular)) 4982 { 4983 relocate = TRUE; 4984 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE); 4985 outrel.r_addend = relocation + rel->r_addend; 4986 } 4987 else 4988 { 4989 BFD_ASSERT (h->dynindx != -1); 4990 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); 4991 outrel.r_addend = rel->r_addend; 4992 } 4993 } 4994 4995 loc = sreloc->contents; 4996 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela); 4997 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); 4998 ++sreloc->reloc_count; 4999 5000 /* If this reloc is against an external symbol, we do 5001 not want to fiddle with the addend. Otherwise, we 5002 need to include the symbol value so that it becomes 5003 an addend for the dynamic reloc. */ 5004 if (!relocate) 5005 continue; 5006 } 5007 break; 5008 5009 case R_NDS32_25_ABS_RELA: 5010 if (bfd_link_pic (info)) 5011 { 5012 (*_bfd_error_handler) 5013 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared " 5014 "mode."), bfd_get_filename (input_bfd)); 5015 return FALSE; 5016 } 5017 break; 5018 5019 case R_NDS32_9_PCREL: 5020 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section, 5021 contents, offset, 5022 sec, relocation, addend); 5023 goto check_reloc; 5024 5025 case R_NDS32_HI20: 5026 { 5027 Elf_Internal_Rela *lorel; 5028 5029 /* We allow an arbitrary number of HI20 relocs before the 5030 LO12 reloc. This permits gcc to emit the HI and LO relocs 5031 itself. */ 5032 for (lorel = rel + 1; 5033 (lorel < relend 5034 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++) 5035 continue; 5036 if (lorel < relend 5037 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3 5038 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2 5039 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1 5040 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0)) 5041 { 5042 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel, 5043 contents, relocation + addend); 5044 r = bfd_reloc_ok; 5045 } 5046 else 5047 r = _bfd_final_link_relocate (howto, input_bfd, input_section, 5048 contents, offset, relocation, 5049 addend); 5050 } 5051 5052 goto check_reloc; 5053 5054 case R_NDS32_GOT17S2_RELA: 5055 case R_NDS32_GOT15S2_RELA: 5056 { 5057 bfd_vma off; 5058 5059 BFD_ASSERT (sgot != NULL); 5060 5061 if (h != NULL) 5062 { 5063 bfd_boolean dyn; 5064 5065 off = h->got.offset; 5066 BFD_ASSERT (off != (bfd_vma) - 1); 5067 5068 dyn = htab->root.dynamic_sections_created; 5069 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL 5070 (dyn, bfd_link_pic (info), h) 5071 || (bfd_link_pic (info) 5072 && (info->symbolic 5073 || h->dynindx == -1 5074 || h->forced_local) 5075 && h->def_regular)) 5076 { 5077 /* This is actually a static link, or it is a 5078 -Bsymbolic link and the symbol is defined 5079 locally, or the symbol was forced to be local 5080 because of a version file. We must initialize 5081 this entry in the global offset table. Since the 5082 offset must always be a multiple of 4, we use the 5083 least significant bit to record whether we have 5084 initialized it already. 5085 5086 When doing a dynamic link, we create a .rela.got 5087 relocation entry to initialize the value. This 5088 is done in the finish_dynamic_symbol routine. */ 5089 if ((off & 1) != 0) 5090 off &= ~1; 5091 else 5092 { 5093 bfd_put_32 (output_bfd, relocation, 5094 sgot->contents + off); 5095 h->got.offset |= 1; 5096 } 5097 } 5098 } 5099 else 5100 { 5101 bfd_byte *loc; 5102 5103 BFD_ASSERT (local_got_offsets != NULL 5104 && local_got_offsets[r_symndx] != (bfd_vma) - 1); 5105 5106 off = local_got_offsets[r_symndx]; 5107 5108 /* The offset must always be a multiple of 4. We use 5109 the least significant bit to record whether we have 5110 already processed this entry. */ 5111 if ((off & 1) != 0) 5112 off &= ~1; 5113 else 5114 { 5115 bfd_put_32 (output_bfd, relocation, sgot->contents + off); 5116 5117 if (bfd_link_pic (info)) 5118 { 5119 asection *srelgot; 5120 Elf_Internal_Rela outrel; 5121 5122 /* We need to generate a R_NDS32_RELATIVE reloc 5123 for the dynamic linker. */ 5124 srelgot = bfd_get_section_by_name (dynobj, ".rela.got"); 5125 BFD_ASSERT (srelgot != NULL); 5126 5127 outrel.r_offset = (elf_gp (output_bfd) 5128 + sgot->output_offset + off); 5129 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE); 5130 outrel.r_addend = relocation; 5131 loc = srelgot->contents; 5132 loc += 5133 srelgot->reloc_count * sizeof (Elf32_External_Rela); 5134 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); 5135 ++srelgot->reloc_count; 5136 } 5137 local_got_offsets[r_symndx] |= 1; 5138 } 5139 } 5140 relocation = sgot->output_section->vma + sgot->output_offset + off 5141 - elf_gp (output_bfd); 5142 } 5143 if (relocation & align) 5144 { 5145 /* Incorrect alignment. */ 5146 (*_bfd_error_handler) 5147 (_("%B: warning: unaligned access to GOT entry."), input_bfd); 5148 ret = FALSE; 5149 r = bfd_reloc_dangerous; 5150 goto check_reloc; 5151 } 5152 break; 5153 5154 case R_NDS32_SDA16S3_RELA: 5155 case R_NDS32_SDA15S3_RELA: 5156 case R_NDS32_SDA15S3: 5157 align = 0x7; 5158 goto handle_sda; 5159 5160 case R_NDS32_SDA17S2_RELA: 5161 case R_NDS32_SDA15S2_RELA: 5162 case R_NDS32_SDA12S2_SP_RELA: 5163 case R_NDS32_SDA12S2_DP_RELA: 5164 case R_NDS32_SDA15S2: 5165 case R_NDS32_SDA_FP7U2_RELA: 5166 align = 0x3; 5167 goto handle_sda; 5168 5169 case R_NDS32_SDA18S1_RELA: 5170 case R_NDS32_SDA15S1_RELA: 5171 case R_NDS32_SDA15S1: 5172 align = 0x1; 5173 goto handle_sda; 5174 5175 case R_NDS32_SDA19S0_RELA: 5176 case R_NDS32_SDA15S0_RELA: 5177 case R_NDS32_SDA15S0: 5178 { 5179 align = 0x0; 5180 handle_sda: 5181 BFD_ASSERT (sec != NULL); 5182 5183 /* If the symbol is in the abs section, the out_bfd will be null. 5184 This happens when the relocation has a symbol@GOTOFF. */ 5185 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE); 5186 if (r != bfd_reloc_ok) 5187 { 5188 (*_bfd_error_handler) 5189 (_("%B: warning: relocate SDA_BASE failed."), input_bfd); 5190 ret = FALSE; 5191 goto check_reloc; 5192 } 5193 5194 /* At this point `relocation' contains the object's 5195 address. */ 5196 if (r_type == R_NDS32_SDA_FP7U2_RELA) 5197 { 5198 relocation -= fpbase_addr; 5199 } 5200 else 5201 relocation -= gp; 5202 /* Now it contains the offset from _SDA_BASE_. */ 5203 5204 /* Make sure alignment is correct. */ 5205 5206 if (relocation & align) 5207 { 5208 /* Incorrect alignment. */ 5209 (*_bfd_error_handler) 5210 (_("%B(%A): warning: unaligned small data access of type %d."), 5211 input_bfd, input_section, r_type); 5212 ret = FALSE; 5213 goto check_reloc; 5214 } 5215 } 5216 5217 break; 5218 case R_NDS32_17IFC_PCREL_RELA: 5219 case R_NDS32_10IFCU_PCREL_RELA: 5220 /* do nothing */ 5221 break; 5222 5223 case R_NDS32_TLS_LE_HI20: 5224 case R_NDS32_TLS_LE_LO12: 5225 case R_NDS32_TLS_LE_20: 5226 case R_NDS32_TLS_LE_15S0: 5227 case R_NDS32_TLS_LE_15S1: 5228 case R_NDS32_TLS_LE_15S2: 5229 if (elf_hash_table (info)->tls_sec != NULL) 5230 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET); 5231 break; 5232 case R_NDS32_TLS_IE_HI20: 5233 case R_NDS32_TLS_IE_LO12S2: 5234 { 5235 /* Relocation is to the entry for this symbol in the global 5236 offset table. */ 5237 unsigned int tls_type; 5238 asection *srelgot; 5239 Elf_Internal_Rela outrel; 5240 bfd_vma off; 5241 bfd_byte *loc; 5242 int indx = 0; 5243 5244 BFD_ASSERT (sgot != NULL); 5245 if (h != NULL) 5246 { 5247 bfd_boolean dyn; 5248 5249 off = h->got.offset; 5250 BFD_ASSERT (off != (bfd_vma) - 1); 5251 dyn = htab->root.dynamic_sections_created; 5252 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type; 5253 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h) 5254 && (!bfd_link_pic (info) 5255 || !SYMBOL_REFERENCES_LOCAL (info, h))) 5256 indx = h->dynindx; 5257 } 5258 else 5259 { 5260 /* Never happen currently. */ 5261 BFD_ASSERT (local_got_offsets != NULL 5262 && local_got_offsets[r_symndx] != (bfd_vma) - 1); 5263 5264 off = local_got_offsets[r_symndx]; 5265 5266 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx]; 5267 } 5268 relocation = sgot->output_section->vma + sgot->output_offset + off; 5269 5270 if (r_type == R_NDS32_TLS_IE_LO12S2) 5271 break; 5272 5273 /* The offset must always be a multiple of 4. We use 5274 the least significant bit to record whether we have 5275 already processed this entry. */ 5276 if ((off & 1) != 0) 5277 off &= ~1; 5278 else 5279 { 5280 bfd_boolean need_relocs = FALSE; 5281 srelgot = htab->srelgot; 5282 if ((bfd_link_pic (info) || indx != 0) 5283 && (h == NULL 5284 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT 5285 || h->root.type != bfd_link_hash_undefweak)) 5286 { 5287 need_relocs = TRUE; 5288 BFD_ASSERT (srelgot != NULL); 5289 } 5290 if (tls_type & GOT_TLS_IE) 5291 { 5292 if (need_relocs) 5293 { 5294 if (h->dynindx == 0) 5295 outrel.r_addend = relocation - dtpoff_base (info); 5296 else 5297 outrel.r_addend = 0; 5298 outrel.r_offset = (sgot->output_section->vma 5299 + sgot->output_offset 5300 + off); 5301 outrel.r_info = 5302 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF); 5303 5304 loc = srelgot->contents; 5305 loc += 5306 srelgot->reloc_count * sizeof (Elf32_External_Rela); 5307 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc); 5308 ++srelgot->reloc_count; 5309 } 5310 else 5311 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET, 5312 sgot->contents + off); 5313 } 5314 } 5315 } 5316 break; 5317 5318 /* DON'T fall through. */ 5319 5320 default: 5321 /* OLD_NDS32_RELOC. */ 5322 5323 r = _bfd_final_link_relocate (howto, input_bfd, input_section, 5324 contents, offset, relocation, addend); 5325 goto check_reloc; 5326 } 5327 5328 switch ((int) r_type) 5329 { 5330 case R_NDS32_20_RELA: 5331 case R_NDS32_5_RELA: 5332 case R_NDS32_9_PCREL_RELA: 5333 case R_NDS32_WORD_9_PCREL_RELA: 5334 case R_NDS32_10_UPCREL_RELA: 5335 case R_NDS32_15_PCREL_RELA: 5336 case R_NDS32_17_PCREL_RELA: 5337 case R_NDS32_25_PCREL_RELA: 5338 case R_NDS32_25_ABS_RELA: 5339 case R_NDS32_HI20_RELA: 5340 case R_NDS32_LO12S3_RELA: 5341 case R_NDS32_LO12S2_RELA: 5342 case R_NDS32_LO12S2_DP_RELA: 5343 case R_NDS32_LO12S2_SP_RELA: 5344 case R_NDS32_LO12S1_RELA: 5345 case R_NDS32_LO12S0_RELA: 5346 case R_NDS32_LO12S0_ORI_RELA: 5347 case R_NDS32_SDA16S3_RELA: 5348 case R_NDS32_SDA17S2_RELA: 5349 case R_NDS32_SDA18S1_RELA: 5350 case R_NDS32_SDA19S0_RELA: 5351 case R_NDS32_SDA15S3_RELA: 5352 case R_NDS32_SDA15S2_RELA: 5353 case R_NDS32_SDA12S2_DP_RELA: 5354 case R_NDS32_SDA12S2_SP_RELA: 5355 case R_NDS32_SDA15S1_RELA: 5356 case R_NDS32_SDA15S0_RELA: 5357 case R_NDS32_SDA_FP7U2_RELA: 5358 case R_NDS32_9_PLTREL: 5359 case R_NDS32_25_PLTREL: 5360 case R_NDS32_GOT20: 5361 case R_NDS32_GOT_HI20: 5362 case R_NDS32_GOT_LO12: 5363 case R_NDS32_GOT_LO15: 5364 case R_NDS32_GOT_LO19: 5365 case R_NDS32_GOT15S2_RELA: 5366 case R_NDS32_GOT17S2_RELA: 5367 case R_NDS32_GOTPC20: 5368 case R_NDS32_GOTPC_HI20: 5369 case R_NDS32_GOTPC_LO12: 5370 case R_NDS32_GOTOFF: 5371 case R_NDS32_GOTOFF_HI20: 5372 case R_NDS32_GOTOFF_LO12: 5373 case R_NDS32_GOTOFF_LO15: 5374 case R_NDS32_GOTOFF_LO19: 5375 case R_NDS32_PLTREL_HI20: 5376 case R_NDS32_PLTREL_LO12: 5377 case R_NDS32_PLT_GOTREL_HI20: 5378 case R_NDS32_PLT_GOTREL_LO12: 5379 case R_NDS32_PLT_GOTREL_LO15: 5380 case R_NDS32_PLT_GOTREL_LO19: 5381 case R_NDS32_PLT_GOTREL_LO20: 5382 case R_NDS32_17IFC_PCREL_RELA: 5383 case R_NDS32_10IFCU_PCREL_RELA: 5384 case R_NDS32_TLS_LE_HI20: 5385 case R_NDS32_TLS_LE_LO12: 5386 case R_NDS32_TLS_IE_HI20: 5387 case R_NDS32_TLS_IE_LO12S2: 5388 case R_NDS32_TLS_LE_20: 5389 case R_NDS32_TLS_LE_15S0: 5390 case R_NDS32_TLS_LE_15S1: 5391 case R_NDS32_TLS_LE_15S2: 5392 /* Instruction related relocs must handle endian properly. */ 5393 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */ 5394 r = nds32_elf_final_link_relocate (howto, input_bfd, 5395 input_section, contents, 5396 rel->r_offset, relocation, 5397 rel->r_addend); 5398 break; 5399 5400 default: 5401 /* All other relocs can use default handler. */ 5402 r = _bfd_final_link_relocate (howto, input_bfd, input_section, 5403 contents, rel->r_offset, 5404 relocation, rel->r_addend); 5405 break; 5406 } 5407 5408 check_reloc: 5409 5410 if (r != bfd_reloc_ok) 5411 { 5412 /* FIXME: This should be generic enough to go in a utility. */ 5413 const char *name; 5414 5415 if (h != NULL) 5416 name = h->root.root.string; 5417 else 5418 { 5419 name = bfd_elf_string_from_elf_section 5420 (input_bfd, symtab_hdr->sh_link, sym->st_name); 5421 if (name == NULL || *name == '\0') 5422 name = bfd_section_name (input_bfd, sec); 5423 } 5424 5425 if (errmsg != NULL) 5426 goto common_error; 5427 5428 switch (r) 5429 { 5430 case bfd_reloc_overflow: 5431 (*info->callbacks->reloc_overflow) 5432 (info, (h ? &h->root : NULL), name, howto->name, 5433 (bfd_vma) 0, input_bfd, input_section, offset); 5434 break; 5435 5436 case bfd_reloc_undefined: 5437 (*info->callbacks->undefined_symbol) 5438 (info, name, input_bfd, input_section, offset, TRUE); 5439 break; 5440 5441 case bfd_reloc_outofrange: 5442 errmsg = _("internal error: out of range error"); 5443 goto common_error; 5444 5445 case bfd_reloc_notsupported: 5446 errmsg = _("internal error: unsupported relocation error"); 5447 goto common_error; 5448 5449 case bfd_reloc_dangerous: 5450 errmsg = _("internal error: dangerous error"); 5451 goto common_error; 5452 5453 default: 5454 errmsg = _("internal error: unknown error"); 5455 /* Fall through. */ 5456 5457 common_error: 5458 (*info->callbacks->warning) (info, errmsg, name, input_bfd, 5459 input_section, offset); 5460 break; 5461 } 5462 } 5463 } 5464 5465 return ret; 5466 } 5467 5468 /* Finish up dynamic symbol handling. We set the contents of various 5469 dynamic sections here. */ 5470 5471 static bfd_boolean 5472 nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info, 5473 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym) 5474 { 5475 struct elf_nds32_link_hash_table *htab; 5476 bfd_byte *loc; 5477 5478 htab = nds32_elf_hash_table (info); 5479 5480 if (h->plt.offset != (bfd_vma) - 1) 5481 { 5482 asection *splt; 5483 asection *sgot; 5484 asection *srela; 5485 5486 bfd_vma plt_index; 5487 bfd_vma got_offset; 5488 bfd_vma local_plt_offset; 5489 Elf_Internal_Rela rela; 5490 5491 /* This symbol has an entry in the procedure linkage table. Set 5492 it up. */ 5493 5494 BFD_ASSERT (h->dynindx != -1); 5495 5496 splt = htab->splt; 5497 sgot = htab->sgotplt; 5498 srela = htab->srelplt; 5499 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL); 5500 5501 /* Get the index in the procedure linkage table which 5502 corresponds to this symbol. This is the index of this symbol 5503 in all the symbols for which we are making plt entries. The 5504 first entry in the procedure linkage table is reserved. */ 5505 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1; 5506 5507 /* Get the offset into the .got table of the entry that 5508 corresponds to this function. Each .got entry is 4 bytes. 5509 The first three are reserved. */ 5510 got_offset = (plt_index + 3) * 4; 5511 5512 /* Fill in the entry in the procedure linkage table. */ 5513 if (!bfd_link_pic (info)) 5514 { 5515 unsigned long insn; 5516 5517 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma 5518 + sgot->output_offset + got_offset) >> 12) 5519 & 0xfffff); 5520 bfd_putb32 (insn, splt->contents + h->plt.offset); 5521 5522 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma 5523 + sgot->output_offset + got_offset) & 0x0fff) 5524 >> 2); 5525 bfd_putb32 (insn, splt->contents + h->plt.offset + 4); 5526 5527 insn = PLT_ENTRY_WORD2; 5528 bfd_putb32 (insn, splt->contents + h->plt.offset + 8); 5529 5530 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff); 5531 bfd_putb32 (insn, splt->contents + h->plt.offset + 12); 5532 5533 insn = PLT_ENTRY_WORD4 5534 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff); 5535 bfd_putb32 (insn, splt->contents + h->plt.offset + 16); 5536 local_plt_offset = 12; 5537 } 5538 else 5539 { 5540 /* sda_base must be set at this time. */ 5541 unsigned long insn; 5542 long offset; 5543 5544 /* FIXME, sda_base is 65536, it will damage opcode. */ 5545 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */ 5546 offset = sgot->output_section->vma + sgot->output_offset + got_offset 5547 - elf_gp (output_bfd); 5548 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff); 5549 bfd_putb32 (insn, splt->contents + h->plt.offset); 5550 5551 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff); 5552 bfd_putb32 (insn, splt->contents + h->plt.offset + 4); 5553 5554 insn = PLT_PIC_ENTRY_WORD2; 5555 bfd_putb32 (insn, splt->contents + h->plt.offset + 8); 5556 5557 insn = PLT_PIC_ENTRY_WORD3; 5558 bfd_putb32 (insn, splt->contents + h->plt.offset + 12); 5559 5560 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff); 5561 bfd_putb32 (insn, splt->contents + h->plt.offset + 16); 5562 5563 insn = PLT_PIC_ENTRY_WORD5 5564 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff); 5565 bfd_putb32 (insn, splt->contents + h->plt.offset + 20); 5566 5567 local_plt_offset = 16; 5568 } 5569 5570 /* Fill in the entry in the global offset table, 5571 so it will fall through to the next instruction for the first time. */ 5572 bfd_put_32 (output_bfd, 5573 (splt->output_section->vma + splt->output_offset 5574 + h->plt.offset + local_plt_offset), 5575 sgot->contents + got_offset); 5576 5577 /* Fill in the entry in the .rela.plt section. */ 5578 rela.r_offset = (sgot->output_section->vma 5579 + sgot->output_offset + got_offset); 5580 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT); 5581 rela.r_addend = 0; 5582 loc = srela->contents; 5583 loc += plt_index * sizeof (Elf32_External_Rela); 5584 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc); 5585 5586 if (!h->def_regular) 5587 { 5588 /* Mark the symbol as undefined, rather than as defined in 5589 the .plt section. Leave the value alone. */ 5590 sym->st_shndx = SHN_UNDEF; 5591 if (!h->ref_regular_nonweak) 5592 sym->st_value = 0; 5593 } 5594 } 5595 5596 if (h->got.offset != (bfd_vma) - 1) 5597 { 5598 asection *sgot; 5599 asection *srela; 5600 Elf_Internal_Rela rela; 5601 5602 /* This symbol has an entry in the global offset table. 5603 Set it up. */ 5604 5605 sgot = htab->sgot; 5606 srela = htab->srelgot; 5607 BFD_ASSERT (sgot != NULL && srela != NULL); 5608 5609 rela.r_offset = (sgot->output_section->vma 5610 + sgot->output_offset + (h->got.offset & ~1)); 5611 5612 /* If this is a -Bsymbolic link, and the symbol is defined 5613 locally, we just want to emit a RELATIVE reloc. Likewise if 5614 the symbol was forced to be local because of a version file. 5615 The entry in the global offset table will already have been 5616 initialized in the relocate_section function. */ 5617 if (bfd_link_pic (info) 5618 && (info->symbolic 5619 || h->dynindx == -1 || h->forced_local) && h->def_regular) 5620 { 5621 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE); 5622 rela.r_addend = (h->root.u.def.value 5623 + h->root.u.def.section->output_section->vma 5624 + h->root.u.def.section->output_offset); 5625 } 5626 else 5627 { 5628 BFD_ASSERT ((h->got.offset & 1) == 0); 5629 bfd_put_32 (output_bfd, (bfd_vma) 0, 5630 sgot->contents + h->got.offset); 5631 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT); 5632 rela.r_addend = 0; 5633 } 5634 5635 loc = srela->contents; 5636 loc += srela->reloc_count * sizeof (Elf32_External_Rela); 5637 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc); 5638 ++srela->reloc_count; 5639 } 5640 5641 if (h->needs_copy) 5642 { 5643 asection *s; 5644 Elf_Internal_Rela rela; 5645 5646 /* This symbols needs a copy reloc. Set it up. */ 5647 5648 BFD_ASSERT (h->dynindx != -1 5649 && (h->root.type == bfd_link_hash_defined 5650 || h->root.type == bfd_link_hash_defweak)); 5651 5652 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss"); 5653 BFD_ASSERT (s != NULL); 5654 5655 rela.r_offset = (h->root.u.def.value 5656 + h->root.u.def.section->output_section->vma 5657 + h->root.u.def.section->output_offset); 5658 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY); 5659 rela.r_addend = 0; 5660 loc = s->contents; 5661 loc += s->reloc_count * sizeof (Elf32_External_Rela); 5662 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc); 5663 ++s->reloc_count; 5664 } 5665 5666 /* Mark some specially defined symbols as absolute. */ 5667 if (strcmp (h->root.root.string, "_DYNAMIC") == 0 5668 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) 5669 sym->st_shndx = SHN_ABS; 5670 5671 return TRUE; 5672 } 5673 5674 5675 /* Finish up the dynamic sections. */ 5676 5677 static bfd_boolean 5678 nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) 5679 { 5680 struct elf_nds32_link_hash_table *htab; 5681 bfd *dynobj; 5682 asection *sdyn; 5683 asection *sgot; 5684 5685 htab = nds32_elf_hash_table (info); 5686 dynobj = htab->root.dynobj; 5687 5688 sgot = htab->sgotplt; 5689 sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); 5690 5691 if (htab->root.dynamic_sections_created) 5692 { 5693 asection *splt; 5694 Elf32_External_Dyn *dyncon, *dynconend; 5695 5696 BFD_ASSERT (sgot != NULL && sdyn != NULL); 5697 5698 dyncon = (Elf32_External_Dyn *) sdyn->contents; 5699 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); 5700 5701 for (; dyncon < dynconend; dyncon++) 5702 { 5703 Elf_Internal_Dyn dyn; 5704 asection *s; 5705 5706 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); 5707 5708 switch (dyn.d_tag) 5709 { 5710 default: 5711 break; 5712 5713 case DT_PLTGOT: 5714 s = htab->sgotplt; 5715 goto get_vma; 5716 case DT_JMPREL: 5717 s = htab->srelplt; 5718 get_vma: 5719 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; 5720 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); 5721 break; 5722 5723 case DT_PLTRELSZ: 5724 s = htab->srelplt; 5725 dyn.d_un.d_val = s->size; 5726 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); 5727 break; 5728 5729 case DT_RELASZ: 5730 /* My reading of the SVR4 ABI indicates that the 5731 procedure linkage table relocs (DT_JMPREL) should be 5732 included in the overall relocs (DT_RELA). This is 5733 what Solaris does. However, UnixWare can not handle 5734 that case. Therefore, we override the DT_RELASZ entry 5735 here to make it not include the JMPREL relocs. Since 5736 the linker script arranges for .rela.plt to follow all 5737 other relocation sections, we don't have to worry 5738 about changing the DT_RELA entry. */ 5739 if (htab->srelplt != NULL) 5740 { 5741 s = htab->srelplt; 5742 dyn.d_un.d_val -= s->size; 5743 } 5744 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); 5745 break; 5746 } 5747 } 5748 5749 /* Fill in the first entry in the procedure linkage table. */ 5750 splt = htab->splt; 5751 if (splt && splt->size > 0) 5752 { 5753 if (bfd_link_pic (info)) 5754 { 5755 unsigned long insn; 5756 long offset; 5757 5758 /* FIXME, sda_base is 65536, it will damage opcode. */ 5759 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */ 5760 offset = sgot->output_section->vma + sgot->output_offset + 4 5761 - elf_gp (output_bfd); 5762 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff); 5763 bfd_putb32 (insn, splt->contents); 5764 5765 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */ 5766 /* here has a typo? */ 5767 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff); 5768 bfd_putb32 (insn, splt->contents + 4); 5769 5770 insn = PLT0_PIC_ENTRY_WORD2; 5771 bfd_putb32 (insn, splt->contents + 8); 5772 5773 insn = PLT0_PIC_ENTRY_WORD3; 5774 bfd_putb32 (insn, splt->contents + 12); 5775 5776 insn = PLT0_PIC_ENTRY_WORD4; 5777 bfd_putb32 (insn, splt->contents + 16); 5778 5779 insn = PLT0_PIC_ENTRY_WORD5; 5780 bfd_putb32 (insn, splt->contents + 20); 5781 } 5782 else 5783 { 5784 unsigned long insn; 5785 unsigned long addr; 5786 5787 /* addr = .got + 4 */ 5788 addr = sgot->output_section->vma + sgot->output_offset + 4; 5789 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff); 5790 bfd_putb32 (insn, splt->contents); 5791 5792 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff); 5793 bfd_putb32 (insn, splt->contents + 4); 5794 5795 insn = PLT0_ENTRY_WORD2; 5796 bfd_putb32 (insn, splt->contents + 8); 5797 5798 insn = PLT0_ENTRY_WORD3; 5799 bfd_putb32 (insn, splt->contents + 12); 5800 5801 insn = PLT0_ENTRY_WORD4; 5802 bfd_putb32 (insn, splt->contents + 16); 5803 } 5804 5805 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 5806 PLT_ENTRY_SIZE; 5807 } 5808 } 5809 5810 /* Fill in the first three entries in the global offset table. */ 5811 if (sgot && sgot->size > 0) 5812 { 5813 if (sdyn == NULL) 5814 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); 5815 else 5816 bfd_put_32 (output_bfd, 5817 sdyn->output_section->vma + sdyn->output_offset, 5818 sgot->contents); 5819 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); 5820 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); 5821 5822 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; 5823 } 5824 5825 return TRUE; 5826 } 5827 5828 5830 /* Set the right machine number. */ 5831 5832 static bfd_boolean 5833 nds32_elf_object_p (bfd *abfd) 5834 { 5835 static unsigned int cur_arch = 0; 5836 5837 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)) 5838 { 5839 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */ 5840 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH); 5841 } 5842 5843 switch (cur_arch) 5844 { 5845 default: 5846 case E_N1_ARCH: 5847 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1); 5848 break; 5849 case E_N1H_ARCH: 5850 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h); 5851 break; 5852 case E_NDS_ARCH_STAR_V2_0: 5853 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2); 5854 break; 5855 case E_NDS_ARCH_STAR_V3_0: 5856 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3); 5857 break; 5858 case E_NDS_ARCH_STAR_V3_M: 5859 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m); 5860 break; 5861 } 5862 5863 return TRUE; 5864 } 5865 5866 /* Store the machine number in the flags field. */ 5867 5868 static void 5869 nds32_elf_final_write_processing (bfd *abfd, 5870 bfd_boolean linker ATTRIBUTE_UNUSED) 5871 { 5872 unsigned long val; 5873 static unsigned int cur_mach = 0; 5874 5875 if (bfd_mach_n1 != bfd_get_mach (abfd)) 5876 { 5877 cur_mach = bfd_get_mach (abfd); 5878 } 5879 5880 switch (cur_mach) 5881 { 5882 case bfd_mach_n1: 5883 /* Only happen when object is empty, since the case is abandon. */ 5884 val = E_N1_ARCH; 5885 val |= E_NDS_ABI_AABI; 5886 val |= E_NDS32_ELF_VER_1_4; 5887 break; 5888 case bfd_mach_n1h: 5889 val = E_N1H_ARCH; 5890 break; 5891 case bfd_mach_n1h_v2: 5892 val = E_NDS_ARCH_STAR_V2_0; 5893 break; 5894 case bfd_mach_n1h_v3: 5895 val = E_NDS_ARCH_STAR_V3_0; 5896 break; 5897 case bfd_mach_n1h_v3m: 5898 val = E_NDS_ARCH_STAR_V3_M; 5899 break; 5900 default: 5901 val = 0; 5902 break; 5903 } 5904 5905 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH; 5906 elf_elfheader (abfd)->e_flags |= val; 5907 } 5908 5909 /* Function to keep NDS32 specific file flags. */ 5910 5911 static bfd_boolean 5912 nds32_elf_set_private_flags (bfd *abfd, flagword flags) 5913 { 5914 BFD_ASSERT (!elf_flags_init (abfd) 5915 || elf_elfheader (abfd)->e_flags == flags); 5916 5917 elf_elfheader (abfd)->e_flags = flags; 5918 elf_flags_init (abfd) = TRUE; 5919 return TRUE; 5920 } 5921 5922 static unsigned int 5923 convert_e_flags (unsigned int e_flags, unsigned int arch) 5924 { 5925 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9) 5926 { 5927 /* From 0.9 to 1.0. */ 5928 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0; 5929 5930 /* Invert E_NDS32_HAS_NO_MAC_INST. */ 5931 e_flags ^= E_NDS32_HAS_NO_MAC_INST; 5932 if (arch == E_NDS_ARCH_STAR_V1_0) 5933 { 5934 /* Done. */ 5935 return e_flags; 5936 } 5937 } 5938 5939 /* From 1.0 to 2.0. */ 5940 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0; 5941 5942 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */ 5943 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST; 5944 5945 /* Invert E_NDS32_HAS_NO_MAC_INST. */ 5946 e_flags ^= E_NDS32_HAS_NO_MAC_INST; 5947 return e_flags; 5948 } 5949 5950 static bfd_boolean 5951 nds32_check_vec_size (bfd *ibfd) 5952 { 5953 static unsigned int nds32_vec_size = 0; 5954 5955 asection *sec_t = NULL; 5956 bfd_byte *contents = NULL; 5957 5958 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags"); 5959 5960 if (sec_t && sec_t->size >= 4) 5961 { 5962 /* Get vec_size in file. */ 5963 unsigned int flag_t; 5964 5965 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE); 5966 flag_t = bfd_get_32 (ibfd, contents); 5967 5968 /* The value could only be 4 or 16. */ 5969 5970 if (!nds32_vec_size) 5971 /* Set if not set yet. */ 5972 nds32_vec_size = (flag_t & 0x3); 5973 else if (nds32_vec_size != (flag_t & 0x3)) 5974 { 5975 (*_bfd_error_handler) (_("%B: ISR vector size mismatch" 5976 " with previous modules, previous %u-byte, current %u-byte"), 5977 ibfd, 5978 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff, 5979 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff); 5980 return FALSE; 5981 } 5982 else 5983 /* Only keep the first vec_size section. */ 5984 sec_t->flags |= SEC_EXCLUDE; 5985 } 5986 5987 return TRUE; 5988 } 5989 5990 /* Merge backend specific data from an object file to the output 5991 object file when linking. */ 5992 5993 static bfd_boolean 5994 nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) 5995 { 5996 flagword out_flags; 5997 flagword in_flags; 5998 flagword out_16regs; 5999 flagword in_no_mac; 6000 flagword out_no_mac; 6001 flagword in_16regs; 6002 flagword out_version; 6003 flagword in_version; 6004 flagword out_fpu_config; 6005 flagword in_fpu_config; 6006 6007 /* TODO: Revise to use object-attributes instead. */ 6008 if (!nds32_check_vec_size (ibfd)) 6009 return FALSE; 6010 6011 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour 6012 || bfd_get_flavour (obfd) != bfd_target_elf_flavour) 6013 return TRUE; 6014 6015 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd)) 6016 { 6017 (*_bfd_error_handler) 6018 (_("%B: warning: Endian mismatch with previous modules."), ibfd); 6019 6020 bfd_set_error (bfd_error_bad_value); 6021 return FALSE; 6022 } 6023 6024 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION; 6025 if (in_version == E_NDS32_ELF_VER_1_2) 6026 { 6027 (*_bfd_error_handler) 6028 (_("%B: warning: Older version of object file encountered, " 6029 "Please recompile with current tool chain."), ibfd); 6030 } 6031 6032 /* We may need to merge V1 and V2 arch object files to V2. */ 6033 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH) 6034 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)) 6035 { 6036 /* Need to convert version. */ 6037 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH) 6038 == E_NDS_ARCH_STAR_RESERVED) 6039 { 6040 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags; 6041 } 6042 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9 6043 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH) 6044 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)) 6045 { 6046 elf_elfheader (obfd)->e_flags = 6047 convert_e_flags (elf_elfheader (obfd)->e_flags, 6048 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)); 6049 } 6050 else 6051 { 6052 elf_elfheader (ibfd)->e_flags = 6053 convert_e_flags (elf_elfheader (ibfd)->e_flags, 6054 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)); 6055 } 6056 } 6057 6058 /* Extract some flags. */ 6059 in_flags = elf_elfheader (ibfd)->e_flags 6060 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION 6061 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF)); 6062 6063 /* The following flags need special treatment. */ 6064 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS; 6065 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST; 6066 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF; 6067 6068 /* Extract some flags. */ 6069 out_flags = elf_elfheader (obfd)->e_flags 6070 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION 6071 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF)); 6072 6073 /* The following flags need special treatment. */ 6074 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS; 6075 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST; 6076 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF; 6077 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION; 6078 if (!elf_flags_init (obfd)) 6079 { 6080 /* If the input is the default architecture then do not 6081 bother setting the flags for the output architecture, 6082 instead allow future merges to do this. If no future 6083 merges ever set these flags then they will retain their 6084 unitialised values, which surprise surprise, correspond 6085 to the default values. */ 6086 if (bfd_get_arch_info (ibfd)->the_default) 6087 return TRUE; 6088 6089 elf_flags_init (obfd) = TRUE; 6090 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags; 6091 6092 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) 6093 && bfd_get_arch_info (obfd)->the_default) 6094 { 6095 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), 6096 bfd_get_mach (ibfd)); 6097 } 6098 6099 return TRUE; 6100 } 6101 6102 /* Check flag compatibility. */ 6103 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI)) 6104 { 6105 (*_bfd_error_handler) 6106 (_("%B: error: ABI mismatch with previous modules."), ibfd); 6107 6108 bfd_set_error (bfd_error_bad_value); 6109 return FALSE; 6110 } 6111 6112 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH)) 6113 { 6114 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH)) 6115 { 6116 (*_bfd_error_handler) 6117 (_("%B: error: Instruction set mismatch with previous modules."), ibfd); 6118 6119 bfd_set_error (bfd_error_bad_value); 6120 return FALSE; 6121 } 6122 } 6123 6124 /* When linking with V1.2 and V1.3 objects together the output is V1.2. 6125 and perf ext1 and DIV are mergerd to perf ext1. */ 6126 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2) 6127 { 6128 elf_elfheader (obfd)->e_flags = 6129 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST))) 6130 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST))) 6131 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST))) 6132 ? E_NDS32_HAS_EXT_INST : 0) 6133 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST))) 6134 ? E_NDS32_HAS_EXT_INST : 0) 6135 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac) 6136 | ((in_version > out_version) ? out_version : in_version); 6137 } 6138 else 6139 { 6140 if (in_version != out_version) 6141 (*_bfd_error_handler) (_("%B: warning: Incompatible elf-versions %s and %s."), 6142 ibfd, nds32_elfver_strtab[out_version], 6143 nds32_elfver_strtab[in_version]); 6144 6145 elf_elfheader (obfd)->e_flags = in_flags | out_flags 6146 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac) 6147 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config) 6148 | (in_version > out_version ? out_version : in_version); 6149 } 6150 6151 return TRUE; 6152 } 6153 6154 /* Display the flags field. */ 6155 6156 static bfd_boolean 6157 nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr) 6158 { 6159 FILE *file = (FILE *) ptr; 6160 6161 BFD_ASSERT (abfd != NULL && ptr != NULL); 6162 6163 _bfd_elf_print_private_bfd_data (abfd, ptr); 6164 6165 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags); 6166 6167 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH) 6168 { 6169 default: 6170 case E_N1_ARCH: 6171 fprintf (file, _(": n1 instructions")); 6172 break; 6173 case E_N1H_ARCH: 6174 fprintf (file, _(": n1h instructions")); 6175 break; 6176 } 6177 6178 fputc ('\n', file); 6179 6180 return TRUE; 6181 } 6182 6183 static unsigned int 6184 nds32_elf_action_discarded (asection *sec) 6185 { 6186 6187 if (strncmp 6188 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0) 6189 return 0; 6190 6191 return _bfd_elf_default_action_discarded (sec); 6192 } 6193 6194 static asection * 6195 nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info, 6196 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h, 6197 Elf_Internal_Sym *sym) 6198 { 6199 if (h != NULL) 6200 switch (ELF32_R_TYPE (rel->r_info)) 6201 { 6202 case R_NDS32_GNU_VTINHERIT: 6203 case R_NDS32_GNU_VTENTRY: 6204 case R_NDS32_RELA_GNU_VTINHERIT: 6205 case R_NDS32_RELA_GNU_VTENTRY: 6206 return NULL; 6207 } 6208 6209 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); 6210 } 6211 6212 static bfd_boolean 6213 nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec, 6214 const Elf_Internal_Rela *relocs) 6215 { 6216 /* Update the got entry reference counts for the section being removed. */ 6217 Elf_Internal_Shdr *symtab_hdr; 6218 struct elf_link_hash_entry **sym_hashes; 6219 bfd_signed_vma *local_got_refcounts; 6220 const Elf_Internal_Rela *rel, *relend; 6221 6222 elf_section_data (sec)->local_dynrel = NULL; 6223 6224 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 6225 sym_hashes = elf_sym_hashes (abfd); 6226 local_got_refcounts = elf_local_got_refcounts (abfd); 6227 6228 relend = relocs + sec->reloc_count; 6229 for (rel = relocs; rel < relend; rel++) 6230 { 6231 unsigned long r_symndx; 6232 struct elf_link_hash_entry *h = NULL; 6233 6234 r_symndx = ELF32_R_SYM (rel->r_info); 6235 if (r_symndx >= symtab_hdr->sh_info) 6236 { 6237 /* External symbol. */ 6238 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 6239 while (h->root.type == bfd_link_hash_indirect 6240 || h->root.type == bfd_link_hash_warning) 6241 h = (struct elf_link_hash_entry *) h->root.u.i.link; 6242 } 6243 6244 switch (ELF32_R_TYPE (rel->r_info)) 6245 { 6246 case R_NDS32_GOT_HI20: 6247 case R_NDS32_GOT_LO12: 6248 case R_NDS32_GOT_LO15: 6249 case R_NDS32_GOT_LO19: 6250 case R_NDS32_GOT17S2_RELA: 6251 case R_NDS32_GOT15S2_RELA: 6252 case R_NDS32_GOTOFF: 6253 case R_NDS32_GOTOFF_HI20: 6254 case R_NDS32_GOTOFF_LO12: 6255 case R_NDS32_GOTOFF_LO15: 6256 case R_NDS32_GOTOFF_LO19: 6257 case R_NDS32_GOT20: 6258 case R_NDS32_GOTPC_HI20: 6259 case R_NDS32_GOTPC_LO12: 6260 case R_NDS32_GOTPC20: 6261 if (h != NULL) 6262 { 6263 if (h->got.refcount > 0) 6264 h->got.refcount--; 6265 } 6266 else 6267 { 6268 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0) 6269 local_got_refcounts[r_symndx]--; 6270 } 6271 break; 6272 6273 case R_NDS32_16_RELA: 6274 case R_NDS32_20_RELA: 6275 case R_NDS32_5_RELA: 6276 case R_NDS32_32_RELA: 6277 case R_NDS32_HI20_RELA: 6278 case R_NDS32_LO12S3_RELA: 6279 case R_NDS32_LO12S2_RELA: 6280 case R_NDS32_LO12S2_DP_RELA: 6281 case R_NDS32_LO12S2_SP_RELA: 6282 case R_NDS32_LO12S1_RELA: 6283 case R_NDS32_LO12S0_RELA: 6284 case R_NDS32_LO12S0_ORI_RELA: 6285 case R_NDS32_SDA16S3_RELA: 6286 case R_NDS32_SDA17S2_RELA: 6287 case R_NDS32_SDA18S1_RELA: 6288 case R_NDS32_SDA19S0_RELA: 6289 case R_NDS32_SDA15S3_RELA: 6290 case R_NDS32_SDA15S2_RELA: 6291 case R_NDS32_SDA12S2_DP_RELA: 6292 case R_NDS32_SDA12S2_SP_RELA: 6293 case R_NDS32_SDA15S1_RELA: 6294 case R_NDS32_SDA15S0_RELA: 6295 case R_NDS32_SDA_FP7U2_RELA: 6296 case R_NDS32_15_PCREL_RELA: 6297 case R_NDS32_17_PCREL_RELA: 6298 case R_NDS32_25_PCREL_RELA: 6299 if (h != NULL) 6300 { 6301 struct elf_nds32_link_hash_entry *eh; 6302 struct elf_nds32_dyn_relocs **pp; 6303 struct elf_nds32_dyn_relocs *p; 6304 6305 if (!bfd_link_pic (info) && h->plt.refcount > 0) 6306 h->plt.refcount -= 1; 6307 6308 eh = (struct elf_nds32_link_hash_entry *) h; 6309 6310 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next) 6311 if (p->sec == sec) 6312 { 6313 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA 6314 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA 6315 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA) 6316 p->pc_count -= 1; 6317 p->count -= 1; 6318 if (p->count == 0) 6319 *pp = p->next; 6320 break; 6321 } 6322 } 6323 break; 6324 6325 case R_NDS32_9_PLTREL: 6326 case R_NDS32_25_PLTREL: 6327 if (h != NULL) 6328 { 6329 if (h->plt.refcount > 0) 6330 h->plt.refcount--; 6331 } 6332 break; 6333 6334 default: 6335 break; 6336 } 6337 } 6338 6339 return TRUE; 6340 } 6341 6342 /* Look through the relocs for a section during the first phase. 6343 Since we don't do .gots or .plts, we just need to consider the 6344 virtual table relocs for gc. */ 6345 6346 static bfd_boolean 6347 nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, 6348 asection *sec, const Elf_Internal_Rela *relocs) 6349 { 6350 Elf_Internal_Shdr *symtab_hdr; 6351 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end; 6352 const Elf_Internal_Rela *rel; 6353 const Elf_Internal_Rela *rel_end; 6354 struct elf_nds32_link_hash_table *htab; 6355 bfd *dynobj; 6356 asection *sreloc = NULL; 6357 6358 if (bfd_link_relocatable (info)) 6359 return TRUE; 6360 6361 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 6362 sym_hashes = elf_sym_hashes (abfd); 6363 sym_hashes_end = 6364 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym); 6365 if (!elf_bad_symtab (abfd)) 6366 sym_hashes_end -= symtab_hdr->sh_info; 6367 6368 htab = nds32_elf_hash_table (info); 6369 dynobj = htab->root.dynobj; 6370 6371 rel_end = relocs + sec->reloc_count; 6372 for (rel = relocs; rel < rel_end; rel++) 6373 { 6374 enum elf_nds32_reloc_type r_type; 6375 struct elf_link_hash_entry *h; 6376 unsigned long r_symndx; 6377 int tls_type, old_tls_type; 6378 6379 r_symndx = ELF32_R_SYM (rel->r_info); 6380 r_type = ELF32_R_TYPE (rel->r_info); 6381 if (r_symndx < symtab_hdr->sh_info) 6382 h = NULL; 6383 else 6384 { 6385 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 6386 while (h->root.type == bfd_link_hash_indirect 6387 || h->root.type == bfd_link_hash_warning) 6388 h = (struct elf_link_hash_entry *) h->root.u.i.link; 6389 } 6390 6391 /* Some relocs require a global offset table. We create 6392 got section here, since these relocation need got section 6393 and it is not created yet. */ 6394 if (htab->sgot == NULL) 6395 { 6396 switch (r_type) 6397 { 6398 case R_NDS32_GOT_HI20: 6399 case R_NDS32_GOT_LO12: 6400 case R_NDS32_GOT_LO15: 6401 case R_NDS32_GOT_LO19: 6402 case R_NDS32_GOT17S2_RELA: 6403 case R_NDS32_GOT15S2_RELA: 6404 case R_NDS32_GOTOFF: 6405 case R_NDS32_GOTOFF_HI20: 6406 case R_NDS32_GOTOFF_LO12: 6407 case R_NDS32_GOTOFF_LO15: 6408 case R_NDS32_GOTOFF_LO19: 6409 case R_NDS32_GOTPC20: 6410 case R_NDS32_GOTPC_HI20: 6411 case R_NDS32_GOTPC_LO12: 6412 case R_NDS32_GOT20: 6413 case R_NDS32_TLS_IE_HI20: 6414 case R_NDS32_TLS_IE_LO12S2: 6415 if (dynobj == NULL) 6416 htab->root.dynobj = dynobj = abfd; 6417 if (!create_got_section (dynobj, info)) 6418 return FALSE; 6419 break; 6420 6421 default: 6422 break; 6423 } 6424 } 6425 6426 switch ((int) r_type) 6427 { 6428 case R_NDS32_GOT_HI20: 6429 case R_NDS32_GOT_LO12: 6430 case R_NDS32_GOT_LO15: 6431 case R_NDS32_GOT_LO19: 6432 case R_NDS32_GOT20: 6433 case R_NDS32_TLS_IE_HI20: 6434 case R_NDS32_TLS_IE_LO12S2: 6435 switch (r_type) 6436 { 6437 case R_NDS32_TLS_IE_HI20: 6438 case R_NDS32_TLS_IE_LO12S2: 6439 tls_type = GOT_TLS_IE; 6440 break; 6441 default: 6442 tls_type = GOT_NORMAL; 6443 break; 6444 } 6445 if (h != NULL) 6446 { 6447 old_tls_type = elf32_nds32_hash_entry (h)->tls_type; 6448 h->got.refcount += 1; 6449 } 6450 else 6451 { 6452 bfd_signed_vma *local_got_refcounts; 6453 6454 /* This is a global offset table entry for a local 6455 symbol. */ 6456 local_got_refcounts = elf_local_got_refcounts (abfd); 6457 if (local_got_refcounts == NULL) 6458 { 6459 bfd_size_type size; 6460 6461 size = symtab_hdr->sh_info; 6462 size *= sizeof (bfd_signed_vma); 6463 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size); 6464 if (local_got_refcounts == NULL) 6465 return FALSE; 6466 elf_local_got_refcounts (abfd) = local_got_refcounts; 6467 } 6468 local_got_refcounts[r_symndx] += 1; 6469 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx]; 6470 } 6471 6472 /* We will already have issued an error message if there 6473 is a TLS/non-TLS mismatch, based on the symbol 6474 type. So just combine any TLS types needed. */ 6475 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL 6476 && tls_type != GOT_NORMAL) 6477 tls_type |= old_tls_type; 6478 6479 if (old_tls_type != tls_type) 6480 { 6481 if (h != NULL) 6482 elf32_nds32_hash_entry (h)->tls_type = tls_type; 6483 else 6484 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type; 6485 } 6486 break; 6487 case R_NDS32_9_PLTREL: 6488 case R_NDS32_25_PLTREL: 6489 case R_NDS32_PLTREL_HI20: 6490 case R_NDS32_PLTREL_LO12: 6491 case R_NDS32_PLT_GOTREL_HI20: 6492 case R_NDS32_PLT_GOTREL_LO12: 6493 case R_NDS32_PLT_GOTREL_LO15: 6494 case R_NDS32_PLT_GOTREL_LO19: 6495 case R_NDS32_PLT_GOTREL_LO20: 6496 6497 /* This symbol requires a procedure linkage table entry. We 6498 actually build the entry in adjust_dynamic_symbol, 6499 because this might be a case of linking PIC code without 6500 linking in any dynamic objects, in which case we don't 6501 need to generate a procedure linkage table after all. */ 6502 6503 /* If this is a local symbol, we resolve it directly without 6504 creating a procedure linkage table entry. */ 6505 if (h == NULL) 6506 continue; 6507 6508 if (h->forced_local) 6509 break; 6510 6511 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL; 6512 h->needs_plt = 1; 6513 h->plt.refcount += 1; 6514 break; 6515 6516 case R_NDS32_16_RELA: 6517 case R_NDS32_20_RELA: 6518 case R_NDS32_5_RELA: 6519 case R_NDS32_32_RELA: 6520 case R_NDS32_HI20_RELA: 6521 case R_NDS32_LO12S3_RELA: 6522 case R_NDS32_LO12S2_RELA: 6523 case R_NDS32_LO12S2_DP_RELA: 6524 case R_NDS32_LO12S2_SP_RELA: 6525 case R_NDS32_LO12S1_RELA: 6526 case R_NDS32_LO12S0_RELA: 6527 case R_NDS32_LO12S0_ORI_RELA: 6528 case R_NDS32_SDA16S3_RELA: 6529 case R_NDS32_SDA17S2_RELA: 6530 case R_NDS32_SDA18S1_RELA: 6531 case R_NDS32_SDA19S0_RELA: 6532 case R_NDS32_SDA15S3_RELA: 6533 case R_NDS32_SDA15S2_RELA: 6534 case R_NDS32_SDA12S2_DP_RELA: 6535 case R_NDS32_SDA12S2_SP_RELA: 6536 case R_NDS32_SDA15S1_RELA: 6537 case R_NDS32_SDA15S0_RELA: 6538 case R_NDS32_SDA_FP7U2_RELA: 6539 case R_NDS32_15_PCREL_RELA: 6540 case R_NDS32_17_PCREL_RELA: 6541 case R_NDS32_25_PCREL_RELA: 6542 6543 if (h != NULL && !bfd_link_pic (info)) 6544 { 6545 h->non_got_ref = 1; 6546 h->plt.refcount += 1; 6547 } 6548 6549 /* If we are creating a shared library, and this is a reloc against 6550 a global symbol, or a non PC relative reloc against a local 6551 symbol, then we need to copy the reloc into the shared library. 6552 However, if we are linking with -Bsymbolic, we do not need to 6553 copy a reloc against a global symbol which is defined in an 6554 object we are including in the link (i.e., DEF_REGULAR is set). 6555 At this point we have not seen all the input files, so it is 6556 possible that DEF_REGULAR is not set now but will be set later 6557 (it is never cleared). We account for that possibility below by 6558 storing information in the dyn_relocs field of the hash table 6559 entry. A similar situation occurs when creating shared libraries 6560 and symbol visibility changes render the symbol local. 6561 6562 If on the other hand, we are creating an executable, we may need 6563 to keep relocations for symbols satisfied by a dynamic library 6564 if we manage to avoid copy relocs for the symbol. */ 6565 if ((bfd_link_pic (info) 6566 && (sec->flags & SEC_ALLOC) != 0 6567 && ((r_type != R_NDS32_25_PCREL_RELA 6568 && r_type != R_NDS32_15_PCREL_RELA 6569 && r_type != R_NDS32_17_PCREL_RELA 6570 && !(r_type == R_NDS32_32_RELA 6571 && strcmp (sec->name, ".eh_frame") == 0)) 6572 || (h != NULL 6573 && (!info->symbolic 6574 || h->root.type == bfd_link_hash_defweak 6575 || !h->def_regular)))) 6576 || (!bfd_link_pic (info) 6577 && (sec->flags & SEC_ALLOC) != 0 6578 && h != NULL 6579 && (h->root.type == bfd_link_hash_defweak 6580 || !h->def_regular))) 6581 { 6582 struct elf_nds32_dyn_relocs *p; 6583 struct elf_nds32_dyn_relocs **head; 6584 6585 if (dynobj == NULL) 6586 htab->root.dynobj = dynobj = abfd; 6587 6588 /* When creating a shared object, we must copy these 6589 relocs into the output file. We create a reloc 6590 section in dynobj and make room for the reloc. */ 6591 if (sreloc == NULL) 6592 { 6593 const char *name; 6594 6595 name = bfd_elf_string_from_elf_section 6596 (abfd, elf_elfheader (abfd)->e_shstrndx, 6597 elf_section_data (sec)->rela.hdr->sh_name); 6598 if (name == NULL) 6599 return FALSE; 6600 6601 BFD_ASSERT (strncmp (name, ".rela", 5) == 0 6602 && strcmp (bfd_get_section_name (abfd, sec), 6603 name + 5) == 0); 6604 6605 sreloc = bfd_get_section_by_name (dynobj, name); 6606 if (sreloc == NULL) 6607 { 6608 flagword flags; 6609 6610 sreloc = bfd_make_section (dynobj, name); 6611 flags = (SEC_HAS_CONTENTS | SEC_READONLY 6612 | SEC_IN_MEMORY | SEC_LINKER_CREATED); 6613 if ((sec->flags & SEC_ALLOC) != 0) 6614 flags |= SEC_ALLOC | SEC_LOAD; 6615 if (sreloc == NULL 6616 || !bfd_set_section_flags (dynobj, sreloc, flags) 6617 || !bfd_set_section_alignment (dynobj, sreloc, 2)) 6618 return FALSE; 6619 6620 elf_section_type (sreloc) = SHT_RELA; 6621 } 6622 elf_section_data (sec)->sreloc = sreloc; 6623 } 6624 6625 /* If this is a global symbol, we count the number of 6626 relocations we need for this symbol. */ 6627 if (h != NULL) 6628 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs; 6629 else 6630 { 6631 asection *s; 6632 6633 Elf_Internal_Sym *isym; 6634 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx); 6635 if (isym == NULL) 6636 return FALSE; 6637 6638 /* Track dynamic relocs needed for local syms too. */ 6639 s = bfd_section_from_elf_index (abfd, isym->st_shndx); 6640 if (s == NULL) 6641 return FALSE; 6642 6643 head = ((struct elf_nds32_dyn_relocs **) 6644 &elf_section_data (s)->local_dynrel); 6645 } 6646 6647 p = *head; 6648 if (p == NULL || p->sec != sec) 6649 { 6650 bfd_size_type amt = sizeof (*p); 6651 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt); 6652 if (p == NULL) 6653 return FALSE; 6654 p->next = *head; 6655 *head = p; 6656 p->sec = sec; 6657 p->count = 0; 6658 p->pc_count = 0; 6659 } 6660 6661 p->count += 1; 6662 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA 6663 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA 6664 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA) 6665 p->pc_count += 1; 6666 } 6667 break; 6668 6669 /* This relocation describes the C++ object vtable hierarchy. 6670 Reconstruct it for later use during GC. */ 6671 case R_NDS32_RELA_GNU_VTINHERIT: 6672 case R_NDS32_GNU_VTINHERIT: 6673 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) 6674 return FALSE; 6675 break; 6676 6677 /* This relocation describes which C++ vtable entries are actually 6678 used. Record for later use during GC. */ 6679 case R_NDS32_GNU_VTENTRY: 6680 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset)) 6681 return FALSE; 6682 break; 6683 case R_NDS32_RELA_GNU_VTENTRY: 6684 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend)) 6685 return FALSE; 6686 break; 6687 } 6688 } 6689 6690 return TRUE; 6691 } 6692 6693 /* Write VAL in uleb128 format to P, returning a pointer to the 6694 following byte. 6695 This code is copied from elf-attr.c. */ 6696 6697 static bfd_byte * 6698 write_uleb128 (bfd_byte *p, unsigned int val) 6699 { 6700 bfd_byte c; 6701 do 6702 { 6703 c = val & 0x7f; 6704 val >>= 7; 6705 if (val) 6706 c |= 0x80; 6707 *(p++) = c; 6708 } 6709 while (val); 6710 return p; 6711 } 6712 6713 static bfd_signed_vma 6714 calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 6715 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr, 6716 int *pic_ext_target) 6717 { 6718 bfd_signed_vma foff; 6719 bfd_vma symval, addend; 6720 asection *sym_sec; 6721 6722 /* Get the value of the symbol referred to by the reloc. */ 6723 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) 6724 { 6725 Elf_Internal_Sym *isym; 6726 6727 /* A local symbol. */ 6728 isym = isymbuf + ELF32_R_SYM (irel->r_info); 6729 6730 if (isym->st_shndx == SHN_UNDEF) 6731 sym_sec = bfd_und_section_ptr; 6732 else if (isym->st_shndx == SHN_ABS) 6733 sym_sec = bfd_abs_section_ptr; 6734 else if (isym->st_shndx == SHN_COMMON) 6735 sym_sec = bfd_com_section_ptr; 6736 else 6737 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); 6738 symval = isym->st_value + sym_sec->output_section->vma 6739 + sym_sec->output_offset; 6740 } 6741 else 6742 { 6743 unsigned long indx; 6744 struct elf_link_hash_entry *h; 6745 bfd *owner; 6746 6747 /* An external symbol. */ 6748 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 6749 h = elf_sym_hashes (abfd)[indx]; 6750 BFD_ASSERT (h != NULL); 6751 6752 if (h->root.type != bfd_link_hash_defined 6753 && h->root.type != bfd_link_hash_defweak) 6754 /* This appears to be a reference to an undefined 6755 symbol. Just ignore it--it will be caught by the 6756 regular reloc processing. */ 6757 return 0; 6758 owner = h->root.u.def.section->owner; 6759 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC)) 6760 *pic_ext_target = 1; 6761 6762 if (h->root.u.def.section->flags & SEC_MERGE) 6763 { 6764 sym_sec = h->root.u.def.section; 6765 symval = _bfd_merged_section_offset (abfd, &sym_sec, 6766 elf_section_data (sym_sec)->sec_info, 6767 h->root.u.def.value); 6768 symval = symval + sym_sec->output_section->vma 6769 + sym_sec->output_offset; 6770 } 6771 else 6772 symval = (h->root.u.def.value 6773 + h->root.u.def.section->output_section->vma 6774 + h->root.u.def.section->output_offset); 6775 } 6776 6777 addend = irel->r_addend; 6778 6779 foff = (symval + addend 6780 - (irel->r_offset + sec->output_section->vma + sec->output_offset)); 6781 return foff; 6782 } 6783 6784 static bfd_vma 6785 calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info, 6786 Elf_Internal_Sym *isymbuf, 6787 Elf_Internal_Rela *irel, 6788 Elf_Internal_Shdr *symtab_hdr) 6789 { 6790 bfd_vma symval; 6791 6792 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) 6793 { 6794 Elf_Internal_Sym *isym; 6795 asection *sym_sec; 6796 /* A local symbol. */ 6797 isym = isymbuf + ELF32_R_SYM (irel->r_info); 6798 6799 if (isym->st_shndx == SHN_UNDEF) 6800 sym_sec = bfd_und_section_ptr; 6801 else if (isym->st_shndx == SHN_ABS) 6802 sym_sec = bfd_abs_section_ptr; 6803 else if (isym->st_shndx == SHN_COMMON) 6804 sym_sec = bfd_com_section_ptr; 6805 else 6806 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); 6807 symval = isym->st_value + sym_sec->output_section->vma 6808 + sym_sec->output_offset; 6809 } 6810 else 6811 { 6812 unsigned long indx; 6813 struct elf_link_hash_entry *h; 6814 struct elf_nds32_link_hash_table *htab; 6815 asection *splt; 6816 6817 /* An external symbol. */ 6818 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 6819 h = elf_sym_hashes (abfd)[indx]; 6820 BFD_ASSERT (h != NULL); 6821 htab = nds32_elf_hash_table (link_info); 6822 splt = htab->splt; 6823 6824 while (h->root.type == bfd_link_hash_indirect 6825 || h->root.type == bfd_link_hash_warning) 6826 h = (struct elf_link_hash_entry *) h->root.u.i.link; 6827 6828 if (h->plt.offset == (bfd_vma) - 1) 6829 { 6830 if (h->root.type != bfd_link_hash_defined 6831 && h->root.type != bfd_link_hash_defweak) 6832 /* This appears to be a reference to an undefined 6833 * symbol. Just ignore it--it will be caught by the 6834 * regular reloc processing. */ 6835 return 0; 6836 symval = (h->root.u.def.value 6837 + h->root.u.def.section->output_section->vma 6838 + h->root.u.def.section->output_offset); 6839 } 6840 else 6841 symval = splt->output_section->vma + h->plt.offset; 6842 } 6843 6844 return symval; 6845 } 6846 6847 static bfd_signed_vma 6848 calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info, 6849 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel, 6850 Elf_Internal_Shdr *symtab_hdr) 6851 { 6852 bfd_vma foff; 6853 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel, 6854 symtab_hdr)) == 0) 6855 return 0; 6856 else 6857 return foff - (irel->r_offset 6858 + sec->output_section->vma + sec->output_offset); 6859 } 6860 6861 /* Convert a 32-bit instruction to 16-bit one. 6863 INSN is the input 32-bit instruction, INSN16 is the output 16-bit 6864 instruction. If INSN_TYPE is not NULL, it the CGEN instruction 6865 type of INSN16. Return 1 if successful. */ 6866 6867 static int 6868 nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16, 6869 int *pinsn_type) 6870 { 6871 uint16_t insn16 = 0; 6872 int insn_type = 0; 6873 unsigned long mach = bfd_get_mach (abfd); 6874 6875 if (N32_SH5 (insn) != 0) 6876 return 0; 6877 6878 switch (N32_SUB5 (insn)) 6879 { 6880 case N32_ALU1_ADD_SLLI: 6881 case N32_ALU1_ADD_SRLI: 6882 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn)) 6883 { 6884 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn), 6885 N32_RB5 (insn)); 6886 insn_type = NDS32_INSN_ADD333; 6887 } 6888 else if (N32_IS_RT4 (insn)) 6889 { 6890 if (N32_RT5 (insn) == N32_RA5 (insn)) 6891 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn)); 6892 else if (N32_RT5 (insn) == N32_RB5 (insn)) 6893 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn)); 6894 insn_type = NDS32_INSN_ADD45; 6895 } 6896 break; 6897 6898 case N32_ALU1_SUB_SLLI: 6899 case N32_ALU1_SUB_SRLI: 6900 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn)) 6901 { 6902 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn), 6903 N32_RB5 (insn)); 6904 insn_type = NDS32_INSN_SUB333; 6905 } 6906 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)) 6907 { 6908 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn)); 6909 insn_type = NDS32_INSN_SUB45; 6910 } 6911 break; 6912 6913 case N32_ALU1_AND_SLLI: 6914 case N32_ALU1_AND_SRLI: 6915 /* and $rt, $rt, $rb -> and33 for v3, v3m. */ 6916 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 6917 && N32_IS_RB3 (insn)) 6918 { 6919 if (N32_RT5 (insn) == N32_RA5 (insn)) 6920 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn)); 6921 else if (N32_RT5 (insn) == N32_RB5 (insn)) 6922 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn)); 6923 if (insn16) 6924 insn_type = NDS32_INSN_AND33; 6925 } 6926 break; 6927 6928 case N32_ALU1_XOR_SLLI: 6929 case N32_ALU1_XOR_SRLI: 6930 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */ 6931 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 6932 && N32_IS_RB3 (insn)) 6933 { 6934 if (N32_RT5 (insn) == N32_RA5 (insn)) 6935 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn)); 6936 else if (N32_RT5 (insn) == N32_RB5 (insn)) 6937 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn)); 6938 if (insn16) 6939 insn_type = NDS32_INSN_XOR33; 6940 } 6941 break; 6942 6943 case N32_ALU1_OR_SLLI: 6944 case N32_ALU1_OR_SRLI: 6945 /* or $rt, $rt, $rb -> or33 for v3, v3m. */ 6946 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 6947 && N32_IS_RB3 (insn)) 6948 { 6949 if (N32_RT5 (insn) == N32_RA5 (insn)) 6950 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn)); 6951 else if (N32_RT5 (insn) == N32_RB5 (insn)) 6952 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn)); 6953 if (insn16) 6954 insn_type = NDS32_INSN_OR33; 6955 } 6956 break; 6957 case N32_ALU1_NOR: 6958 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */ 6959 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn) 6960 && N32_RA5 (insn) == N32_RB5 (insn)) 6961 { 6962 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn)); 6963 insn_type = NDS32_INSN_NOT33; 6964 } 6965 break; 6966 case N32_ALU1_SRAI: 6967 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)) 6968 { 6969 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn)); 6970 insn_type = NDS32_INSN_SRAI45; 6971 } 6972 break; 6973 6974 case N32_ALU1_SRLI: 6975 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)) 6976 { 6977 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn)); 6978 insn_type = NDS32_INSN_SRLI45; 6979 } 6980 break; 6981 6982 case N32_ALU1_SLLI: 6983 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8) 6984 { 6985 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn), 6986 N32_UB5 (insn)); 6987 insn_type = NDS32_INSN_SLLI333; 6988 } 6989 break; 6990 6991 case N32_ALU1_ZEH: 6992 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)) 6993 { 6994 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn)); 6995 insn_type = NDS32_INSN_ZEH33; 6996 } 6997 break; 6998 6999 case N32_ALU1_SEB: 7000 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)) 7001 { 7002 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn)); 7003 insn_type = NDS32_INSN_SEB33; 7004 } 7005 break; 7006 7007 case N32_ALU1_SEH: 7008 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)) 7009 { 7010 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn)); 7011 insn_type = NDS32_INSN_SEH33; 7012 } 7013 break; 7014 7015 case N32_ALU1_SLT: 7016 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)) 7017 { 7018 /* Implicit r15. */ 7019 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn)); 7020 insn_type = NDS32_INSN_SLT45; 7021 } 7022 break; 7023 7024 case N32_ALU1_SLTS: 7025 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)) 7026 { 7027 /* Implicit r15. */ 7028 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn)); 7029 insn_type = NDS32_INSN_SLTS45; 7030 } 7031 break; 7032 } 7033 7034 if ((insn16 & 0x8000) == 0) 7035 return 0; 7036 7037 if (pinsn16) 7038 *pinsn16 = insn16; 7039 if (pinsn_type) 7040 *pinsn_type = insn_type; 7041 return 1; 7042 } 7043 7044 static int 7045 nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16, 7046 int *pinsn_type) 7047 { 7048 uint16_t insn16 = 0; 7049 int insn_type; 7050 unsigned long mach = bfd_get_mach (abfd); 7051 7052 /* TODO: bset, bclr, btgl, btst. */ 7053 if (__GF (insn, 6, 4) != 0) 7054 return 0; 7055 7056 switch (N32_IMMU (insn, 6)) 7057 { 7058 case N32_ALU2_MUL: 7059 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7060 && N32_IS_RB3 (insn)) 7061 { 7062 if (N32_RT5 (insn) == N32_RA5 (insn)) 7063 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn)); 7064 else if (N32_RT5 (insn) == N32_RB5 (insn)) 7065 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn)); 7066 if (insn16) 7067 insn_type = NDS32_INSN_MUL33; 7068 } 7069 } 7070 7071 if ((insn16 & 0x8000) == 0) 7072 return 0; 7073 7074 if (pinsn16) 7075 *pinsn16 = insn16; 7076 if (pinsn_type) 7077 *pinsn_type = insn_type; 7078 return 1; 7079 } 7080 7081 int 7082 nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16, 7083 int *pinsn_type) 7084 { 7085 int op6; 7086 uint16_t insn16 = 0; 7087 int insn_type; 7088 unsigned long mach = bfd_get_mach (abfd); 7089 7090 /* Decode 32-bit instruction. */ 7091 if (insn & 0x80000000) 7092 { 7093 /* Not 32-bit insn. */ 7094 return 0; 7095 } 7096 7097 op6 = N32_OP6 (insn); 7098 7099 /* Convert it to 16-bit instruction. */ 7100 switch (op6) 7101 { 7102 case N32_OP6_MOVI: 7103 if (IS_WITHIN_S (N32_IMM20S (insn), 5)) 7104 { 7105 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn)); 7106 insn_type = NDS32_INSN_MOVI55; 7107 } 7108 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16 7109 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn)) 7110 { 7111 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn), 7112 N32_IMM20S (insn) - 16); 7113 insn_type = NDS32_INSN_MOVPI45; 7114 } 7115 break; 7116 7117 case N32_OP6_ADDI: 7118 if (N32_IMM15S (insn) == 0) 7119 { 7120 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp', 7121 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */ 7122 if (mach <= MACH_V2 7123 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP) 7124 { 7125 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn)); 7126 insn_type = NDS32_INSN_MOV55; 7127 } 7128 } 7129 else if (N32_IMM15S (insn) > 0) 7130 { 7131 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8) 7132 { 7133 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn), 7134 N32_IMM15S (insn)); 7135 insn_type = NDS32_INSN_ADDI333; 7136 } 7137 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn) 7138 && N32_IMM15S (insn) < 32) 7139 { 7140 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn)); 7141 insn_type = NDS32_INSN_ADDI45; 7142 } 7143 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP 7144 && N32_RT5 (insn) == N32_RA5 (insn) 7145 && N32_IMM15S (insn) < 512) 7146 { 7147 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn)); 7148 insn_type = NDS32_INSN_ADDI10_SP; 7149 } 7150 else if (mach >= MACH_V3 && N32_IS_RT3 (insn) 7151 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256 7152 && (N32_IMM15S (insn) % 4 == 0)) 7153 { 7154 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn), 7155 N32_IMM15S (insn) >> 2); 7156 insn_type = NDS32_INSN_ADDRI36_SP; 7157 } 7158 } 7159 else 7160 { 7161 /* Less than 0. */ 7162 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8) 7163 { 7164 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn), 7165 0 - N32_IMM15S (insn)); 7166 insn_type = NDS32_INSN_SUBI333; 7167 } 7168 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn) 7169 && N32_IMM15S (insn) > -32) 7170 { 7171 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn), 7172 0 - N32_IMM15S (insn)); 7173 insn_type = NDS32_INSN_SUBI45; 7174 } 7175 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP 7176 && N32_RT5 (insn) == N32_RA5 (insn) 7177 && N32_IMM15S (insn) >= -512) 7178 { 7179 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn)); 7180 insn_type = NDS32_INSN_ADDI10_SP; 7181 } 7182 } 7183 break; 7184 7185 case N32_OP6_ORI: 7186 if (N32_IMM15S (insn) == 0) 7187 { 7188 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp', 7189 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */ 7190 if (mach <= MACH_V2 7191 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP) 7192 { 7193 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn)); 7194 insn_type = NDS32_INSN_MOV55; 7195 } 7196 } 7197 break; 7198 7199 case N32_OP6_SUBRI: 7200 if (mach >= MACH_V3 && N32_IS_RT3 (insn) 7201 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0) 7202 { 7203 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn)); 7204 insn_type = NDS32_INSN_NEG33; 7205 } 7206 break; 7207 7208 case N32_OP6_ANDI: 7209 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)) 7210 { 7211 if (N32_IMM15U (insn) == 1) 7212 { 7213 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn)); 7214 insn_type = NDS32_INSN_XLSB33; 7215 } 7216 else if (N32_IMM15U (insn) == 0x7ff) 7217 { 7218 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn)); 7219 insn_type = NDS32_INSN_X11B33; 7220 } 7221 else if (N32_IMM15U (insn) == 0xff) 7222 { 7223 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn)); 7224 insn_type = NDS32_INSN_ZEB33; 7225 } 7226 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn) 7227 && N32_IMM15U (insn) < 256) 7228 { 7229 int imm15u = N32_IMM15U (insn); 7230 7231 if (__builtin_popcount (imm15u) == 1) 7232 { 7233 /* BMSKI33 */ 7234 int imm3u = __builtin_ctz (imm15u); 7235 7236 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u); 7237 insn_type = NDS32_INSN_BMSKI33; 7238 } 7239 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1) 7240 { 7241 /* FEXTI33 */ 7242 int imm3u = __builtin_ctz (imm15u + 1) - 1; 7243 7244 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u); 7245 insn_type = NDS32_INSN_FEXTI33; 7246 } 7247 } 7248 } 7249 break; 7250 7251 case N32_OP6_SLTI: 7252 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn) 7253 && IS_WITHIN_U (N32_IMM15S (insn), 5)) 7254 { 7255 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn)); 7256 insn_type = NDS32_INSN_SLTI45; 7257 } 7258 break; 7259 7260 case N32_OP6_SLTSI: 7261 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn) 7262 && IS_WITHIN_U (N32_IMM15S (insn), 5)) 7263 { 7264 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn)); 7265 insn_type = NDS32_INSN_SLTSI45; 7266 } 7267 break; 7268 7269 case N32_OP6_LWI: 7270 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0) 7271 { 7272 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn)); 7273 insn_type = NDS32_INSN_LWI450; 7274 } 7275 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7276 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7277 { 7278 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn), 7279 N32_IMM15S (insn)); 7280 insn_type = NDS32_INSN_LWI333; 7281 } 7282 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP 7283 && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7284 { 7285 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn)); 7286 insn_type = NDS32_INSN_LWI37; 7287 } 7288 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP 7289 && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7290 { 7291 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn)); 7292 insn_type = NDS32_INSN_LWI37_SP; 7293 } 7294 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8 7295 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0) 7296 { 7297 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn), 7298 N32_IMM15S (insn) + 32); 7299 insn_type = NDS32_INSN_LWI45_FE; 7300 } 7301 break; 7302 7303 case N32_OP6_SWI: 7304 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0) 7305 { 7306 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn)); 7307 insn_type = NDS32_INSN_SWI450; 7308 } 7309 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7310 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7311 { 7312 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn), 7313 N32_IMM15S (insn)); 7314 insn_type = NDS32_INSN_SWI333; 7315 } 7316 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP 7317 && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7318 { 7319 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn)); 7320 insn_type = NDS32_INSN_SWI37; 7321 } 7322 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP 7323 && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7324 { 7325 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn)); 7326 insn_type = NDS32_INSN_SWI37_SP; 7327 } 7328 break; 7329 7330 case N32_OP6_LWI_BI: 7331 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7332 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7333 { 7334 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn), 7335 N32_IMM15S (insn)); 7336 insn_type = NDS32_INSN_LWI333_BI; 7337 } 7338 break; 7339 7340 case N32_OP6_SWI_BI: 7341 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7342 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7343 { 7344 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn), 7345 N32_IMM15S (insn)); 7346 insn_type = NDS32_INSN_SWI333_BI; 7347 } 7348 break; 7349 7350 case N32_OP6_LHI: 7351 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7352 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7353 { 7354 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn), 7355 N32_IMM15S (insn)); 7356 insn_type = NDS32_INSN_LHI333; 7357 } 7358 break; 7359 7360 case N32_OP6_SHI: 7361 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7362 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7363 { 7364 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn), 7365 N32_IMM15S (insn)); 7366 insn_type = NDS32_INSN_SHI333; 7367 } 7368 break; 7369 7370 case N32_OP6_LBI: 7371 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7372 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7373 { 7374 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn), 7375 N32_IMM15S (insn)); 7376 insn_type = NDS32_INSN_LBI333; 7377 } 7378 break; 7379 7380 case N32_OP6_SBI: 7381 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) 7382 && IS_WITHIN_U (N32_IMM15S (insn), 3)) 7383 { 7384 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn), 7385 N32_IMM15S (insn)); 7386 insn_type = NDS32_INSN_SBI333; 7387 } 7388 break; 7389 7390 case N32_OP6_ALU1: 7391 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type); 7392 7393 case N32_OP6_ALU2: 7394 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type); 7395 7396 case N32_OP6_BR1: 7397 if (!IS_WITHIN_S (N32_IMM14S (insn), 8)) 7398 goto done; 7399 7400 if ((insn & __BIT (14)) == 0) 7401 { 7402 /* N32_BR1_BEQ */ 7403 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5 7404 && N32_RT5 (insn) != REG_R5) 7405 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn)); 7406 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5 7407 && N32_RA5 (insn) != REG_R5) 7408 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn)); 7409 insn_type = NDS32_INSN_BEQS38; 7410 break; 7411 } 7412 else 7413 { 7414 /* N32_BR1_BNE */ 7415 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5 7416 && N32_RT5 (insn) != REG_R5) 7417 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn)); 7418 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5 7419 && N32_RA5 (insn) != REG_R5) 7420 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn)); 7421 insn_type = NDS32_INSN_BNES38; 7422 break; 7423 } 7424 break; 7425 7426 case N32_OP6_BR2: 7427 switch (N32_BR2_SUB (insn)) 7428 { 7429 case N32_BR2_BEQZ: 7430 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8)) 7431 { 7432 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn)); 7433 insn_type = NDS32_INSN_BEQZ38; 7434 } 7435 else if (N32_RT5 (insn) == REG_R15 7436 && IS_WITHIN_S (N32_IMM16S (insn), 8)) 7437 { 7438 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn)); 7439 insn_type = NDS32_INSN_BEQZS8; 7440 } 7441 break; 7442 7443 case N32_BR2_BNEZ: 7444 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8)) 7445 { 7446 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn)); 7447 insn_type = NDS32_INSN_BNEZ38; 7448 } 7449 else if (N32_RT5 (insn) == REG_R15 7450 && IS_WITHIN_S (N32_IMM16S (insn), 8)) 7451 { 7452 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn)); 7453 insn_type = NDS32_INSN_BNEZS8; 7454 } 7455 break; 7456 7457 case N32_BR2_IFCALL: 7458 if (IS_WITHIN_U (N32_IMM16S (insn), 9)) 7459 { 7460 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn)); 7461 insn_type = NDS32_INSN_IFCALL9; 7462 } 7463 break; 7464 } 7465 break; 7466 7467 case N32_OP6_JI: 7468 if ((insn & __BIT (24)) == 0) 7469 { 7470 /* N32_JI_J */ 7471 if (IS_WITHIN_S (N32_IMM24S (insn), 8)) 7472 { 7473 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn)); 7474 insn_type = NDS32_INSN_J8; 7475 } 7476 } 7477 break; 7478 7479 case N32_OP6_JREG: 7480 if (__GF (insn, 8, 2) != 0) 7481 goto done; 7482 7483 switch (N32_IMMU (insn, 5)) 7484 { 7485 case N32_JREG_JR: 7486 if (N32_JREG_HINT (insn) == 0) 7487 { 7488 /* jr */ 7489 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn)); 7490 insn_type = NDS32_INSN_JR5; 7491 } 7492 else if (N32_JREG_HINT (insn) == 1) 7493 { 7494 /* ret */ 7495 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn)); 7496 insn_type = NDS32_INSN_RET5; 7497 } 7498 else if (N32_JREG_HINT (insn) == 3) 7499 { 7500 /* ifret = mov55 $sp, $sp */ 7501 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP); 7502 insn_type = NDS32_INSN_IFRET; 7503 } 7504 break; 7505 7506 case N32_JREG_JRAL: 7507 /* It's convertible when return rt5 is $lp and address 7508 translation is kept. */ 7509 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0) 7510 { 7511 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn)); 7512 insn_type = NDS32_INSN_JRAL5; 7513 } 7514 break; 7515 } 7516 break; 7517 7518 case N32_OP6_MISC: 7519 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32) 7520 { 7521 /* For v3, swid above 31 are used for ex9.it. */ 7522 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn)); 7523 insn_type = NDS32_INSN_BREAK16; 7524 } 7525 break; 7526 7527 default: 7528 /* This instruction has no 16-bit variant. */ 7529 goto done; 7530 } 7531 7532 done: 7533 /* Bit-15 of insn16 should be set for a valid instruction. */ 7534 if ((insn16 & 0x8000) == 0) 7535 return 0; 7536 7537 if (pinsn16) 7538 *pinsn16 = insn16; 7539 if (pinsn_type) 7540 *pinsn_type = insn_type; 7541 return 1; 7542 } 7543 7544 static int 7545 special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16, 7546 Elf_Internal_Rela *reloc) 7547 { 7548 uint16_t insn16 = 0; 7549 7550 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0 7551 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16)) 7552 return 0; 7553 7554 if (!N32_IS_RT3 (insn)) 7555 return 0; 7556 7557 switch (N32_OP6 (insn)) 7558 { 7559 case N32_OP6_LWI: 7560 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7561 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn)); 7562 break; 7563 case N32_OP6_SWI: 7564 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7)) 7565 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn)); 7566 break; 7567 case N32_OP6_HWGP: 7568 if (!IS_WITHIN_U (N32_IMM17S (insn), 7)) 7569 break; 7570 7571 if (__GF (insn, 17, 3) == 6) 7572 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn)); 7573 else if (__GF (insn, 17, 3) == 7) 7574 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn)); 7575 break; 7576 } 7577 7578 if ((insn16 & 0x8000) == 0) 7579 return 0; 7580 7581 *pinsn16 = insn16; 7582 return 1; 7583 } 7584 7585 /* Convert a 16-bit instruction to 32-bit one. 7586 INSN16 it the input and PINSN it the point to output. 7587 Return non-zero on successful. Otherwise 0 is returned. */ 7588 7589 int 7590 nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn) 7591 { 7592 uint32_t insn = 0xffffffff; 7593 unsigned long mach = bfd_get_mach (abfd); 7594 7595 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */ 7596 7597 switch (__GF (insn16, 9, 6)) 7598 { 7599 case 0x4: /* add45 */ 7600 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16), 7601 N16_RA5 (insn16)); 7602 goto done; 7603 case 0x5: /* sub45 */ 7604 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16), 7605 N16_RA5 (insn16)); 7606 goto done; 7607 case 0x6: /* addi45 */ 7608 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16), 7609 N16_IMM5U (insn16)); 7610 goto done; 7611 case 0x7: /* subi45 */ 7612 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16), 7613 -N16_IMM5U (insn16)); 7614 goto done; 7615 case 0x8: /* srai45 */ 7616 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16), 7617 N16_IMM5U (insn16)); 7618 goto done; 7619 case 0x9: /* srli45 */ 7620 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16), 7621 N16_IMM5U (insn16)); 7622 goto done; 7623 case 0xa: /* slli333 */ 7624 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16), 7625 N16_IMM3U (insn16)); 7626 goto done; 7627 case 0xc: /* add333 */ 7628 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16), 7629 N16_RB3 (insn16)); 7630 goto done; 7631 case 0xd: /* sub333 */ 7632 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16), 7633 N16_RB3 (insn16)); 7634 goto done; 7635 case 0xe: /* addi333 */ 7636 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16), 7637 N16_IMM3U (insn16)); 7638 goto done; 7639 case 0xf: /* subi333 */ 7640 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16), 7641 -N16_IMM3U (insn16)); 7642 goto done; 7643 case 0x10: /* lwi333 */ 7644 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16), 7645 N16_IMM3U (insn16)); 7646 goto done; 7647 case 0x12: /* lhi333 */ 7648 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16), 7649 N16_IMM3U (insn16)); 7650 goto done; 7651 case 0x13: /* lbi333 */ 7652 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16), 7653 N16_IMM3U (insn16)); 7654 goto done; 7655 case 0x11: /* lwi333.bi */ 7656 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16), 7657 N16_IMM3U (insn16)); 7658 goto done; 7659 case 0x14: /* swi333 */ 7660 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16), 7661 N16_IMM3U (insn16)); 7662 goto done; 7663 case 0x16: /* shi333 */ 7664 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16), 7665 N16_IMM3U (insn16)); 7666 goto done; 7667 case 0x17: /* sbi333 */ 7668 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16), 7669 N16_IMM3U (insn16)); 7670 goto done; 7671 case 0x15: /* swi333.bi */ 7672 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16), 7673 N16_IMM3U (insn16)); 7674 goto done; 7675 case 0x18: /* addri36.sp */ 7676 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP, 7677 N16_IMM6U (insn16) << 2); 7678 goto done; 7679 case 0x19: /* lwi45.fe */ 7680 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8, 7681 (N16_IMM5U (insn16) - 32)); 7682 goto done; 7683 case 0x1a: /* lwi450 */ 7684 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0); 7685 goto done; 7686 case 0x1b: /* swi450 */ 7687 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0); 7688 goto done; 7689 7690 /* These are r15 implied instructions. */ 7691 case 0x30: /* slts45 */ 7692 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16)); 7693 goto done; 7694 case 0x31: /* slt45 */ 7695 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16)); 7696 goto done; 7697 case 0x32: /* sltsi45 */ 7698 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16)); 7699 goto done; 7700 case 0x33: /* slti45 */ 7701 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16)); 7702 goto done; 7703 case 0x34: /* beqzs8, bnezs8 */ 7704 if (insn16 & __BIT (8)) 7705 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16)); 7706 else 7707 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16)); 7708 goto done; 7709 7710 case 0x35: /* break16, ex9.it */ 7711 /* Only consider range of v3 break16. */ 7712 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK); 7713 goto done; 7714 7715 case 0x3c: /* ifcall9 */ 7716 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16)); 7717 goto done; 7718 case 0x3d: /* movpi45 */ 7719 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16); 7720 goto done; 7721 7722 case 0x3f: /* MISC33 */ 7723 switch (insn16 & 0x7) 7724 { 7725 case 2: /* neg33 */ 7726 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0); 7727 break; 7728 case 3: /* not33 */ 7729 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16), 7730 N16_RA3 (insn16)); 7731 break; 7732 case 4: /* mul33 */ 7733 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16), 7734 N16_RA3 (insn16)); 7735 break; 7736 case 5: /* xor33 */ 7737 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16), 7738 N16_RA3 (insn16)); 7739 break; 7740 case 6: /* and33 */ 7741 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16), 7742 N16_RA3 (insn16)); 7743 break; 7744 case 7: /* or33 */ 7745 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16), 7746 N16_RA3 (insn16)); 7747 break; 7748 } 7749 goto done; 7750 7751 case 0xb: 7752 switch (insn16 & 0x7) 7753 { 7754 case 0: /* zeb33 */ 7755 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff); 7756 break; 7757 case 1: /* zeh33 */ 7758 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0); 7759 break; 7760 case 2: /* seb33 */ 7761 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0); 7762 break; 7763 case 3: /* seh33 */ 7764 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0); 7765 break; 7766 case 4: /* xlsb33 */ 7767 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1); 7768 break; 7769 case 5: /* x11b33 */ 7770 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff); 7771 break; 7772 case 6: /* bmski33 */ 7773 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16), 7774 1 << __GF (insn16, 3, 3)); 7775 break; 7776 case 7: /* fexti33 */ 7777 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16), 7778 (1 << (__GF (insn16, 3, 3) + 1)) - 1); 7779 break; 7780 } 7781 goto done; 7782 } 7783 7784 switch (__GF (insn16, 10, 5)) 7785 { 7786 case 0x0: /* mov55 or ifret16 */ 7787 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP 7788 && N16_RT5 (insn16) == N16_RA5 (insn16)) 7789 insn = N32_JREG (JR, 0, 0, 0, 3); 7790 else 7791 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0); 7792 goto done; 7793 case 0x1: /* movi55 */ 7794 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16)); 7795 goto done; 7796 case 0x1b: /* addi10s (V2) */ 7797 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16)); 7798 goto done; 7799 } 7800 7801 switch (__GF (insn16, 11, 4)) 7802 { 7803 case 0x7: /* lwi37.fp/swi37.fp */ 7804 if (insn16 & __BIT (7)) /* swi37.fp */ 7805 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16)); 7806 else /* lwi37.fp */ 7807 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16)); 7808 goto done; 7809 case 0x8: /* beqz38 */ 7810 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16)); 7811 goto done; 7812 case 0x9: /* bnez38 */ 7813 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16)); 7814 goto done; 7815 case 0xa: /* beqs38/j8, implied r5 */ 7816 if (N16_RT38 (insn16) == 5) 7817 insn = N32_JI (J, N16_IMM8S (insn16)); 7818 else 7819 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16)); 7820 goto done; 7821 case 0xb: /* bnes38 and others */ 7822 if (N16_RT38 (insn16) == 5) 7823 { 7824 switch (__GF (insn16, 5, 3)) 7825 { 7826 case 0: /* jr5 */ 7827 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0); 7828 break; 7829 case 4: /* ret5 */ 7830 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1); 7831 break; 7832 case 1: /* jral5 */ 7833 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0); 7834 break; 7835 case 2: /* ex9.it imm5 */ 7836 /* ex9.it had no 32-bit variantl. */ 7837 break; 7838 case 5: /* add5.pc */ 7839 /* add5.pc had no 32-bit variantl. */ 7840 break; 7841 } 7842 } 7843 else /* bnes38 */ 7844 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16)); 7845 goto done; 7846 case 0xe: /* lwi37/swi37 */ 7847 if (insn16 & (1 << 7)) /* swi37.sp */ 7848 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16)); 7849 else /* lwi37.sp */ 7850 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16)); 7851 goto done; 7852 } 7853 7854 done: 7855 if (insn & 0x80000000) 7856 return 0; 7857 7858 if (pinsn) 7859 *pinsn = insn; 7860 return 1; 7861 } 7862 7863 static bfd_boolean 7865 is_sda_access_insn (unsigned long insn) 7866 { 7867 switch (N32_OP6 (insn)) 7868 { 7869 case N32_OP6_LWI: 7870 case N32_OP6_LHI: 7871 case N32_OP6_LHSI: 7872 case N32_OP6_LBI: 7873 case N32_OP6_LBSI: 7874 case N32_OP6_SWI: 7875 case N32_OP6_SHI: 7876 case N32_OP6_SBI: 7877 case N32_OP6_LWC: 7878 case N32_OP6_LDC: 7879 case N32_OP6_SWC: 7880 case N32_OP6_SDC: 7881 return TRUE; 7882 default: 7883 ; 7884 } 7885 return FALSE; 7886 } 7887 7888 static unsigned long 7889 turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn) 7890 { 7891 uint32_t oinsn = 0; 7892 7893 switch (type) 7894 { 7895 case R_NDS32_GOT_LO12: 7896 case R_NDS32_GOTOFF_LO12: 7897 case R_NDS32_PLTREL_LO12: 7898 case R_NDS32_PLT_GOTREL_LO12: 7899 case R_NDS32_LO12S0_RELA: 7900 switch (N32_OP6 (insn)) 7901 { 7902 case N32_OP6_LBI: 7903 /* lbi.gp */ 7904 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0); 7905 break; 7906 case N32_OP6_LBSI: 7907 /* lbsi.gp */ 7908 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19)); 7909 break; 7910 case N32_OP6_SBI: 7911 /* sbi.gp */ 7912 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0); 7913 break; 7914 case N32_OP6_ORI: 7915 /* addi.gp */ 7916 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19)); 7917 break; 7918 } 7919 break; 7920 7921 case R_NDS32_LO12S1_RELA: 7922 switch (N32_OP6 (insn)) 7923 { 7924 case N32_OP6_LHI: 7925 /* lhi.gp */ 7926 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0); 7927 break; 7928 case N32_OP6_LHSI: 7929 /* lhsi.gp */ 7930 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18)); 7931 break; 7932 case N32_OP6_SHI: 7933 /* shi.gp */ 7934 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19)); 7935 break; 7936 } 7937 break; 7938 7939 case R_NDS32_LO12S2_RELA: 7940 switch (N32_OP6 (insn)) 7941 { 7942 case N32_OP6_LWI: 7943 /* lwi.gp */ 7944 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3)); 7945 break; 7946 case N32_OP6_SWI: 7947 /* swi.gp */ 7948 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3)); 7949 break; 7950 } 7951 break; 7952 7953 case R_NDS32_LO12S2_DP_RELA: 7954 case R_NDS32_LO12S2_SP_RELA: 7955 oinsn = (insn & 0x7ff07000) | (REG_GP << 15); 7956 break; 7957 } 7958 7959 if (oinsn) 7960 *pinsn = oinsn; 7961 7962 return oinsn != 0; 7963 } 7964 7965 /* Linker hasn't found the correct merge section for non-section symbol 7966 in relax time, this work is left to the function elf_link_input_bfd(). 7967 So for non-section symbol, _bfd_merged_section_offset is also needed 7968 to find the correct symbol address. */ 7969 7970 static bfd_vma 7971 nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym, 7972 asection **psec, Elf_Internal_Rela *rel) 7973 { 7974 asection *sec = *psec; 7975 bfd_vma relocation; 7976 7977 relocation = (sec->output_section->vma 7978 + sec->output_offset + sym->st_value); 7979 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE) 7980 { 7981 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION) 7982 rel->r_addend = 7983 _bfd_merged_section_offset (abfd, psec, 7984 elf_section_data (sec)->sec_info, 7985 sym->st_value + rel->r_addend); 7986 else 7987 rel->r_addend = 7988 _bfd_merged_section_offset (abfd, psec, 7989 elf_section_data (sec)->sec_info, 7990 sym->st_value) + rel->r_addend; 7991 7992 if (sec != *psec) 7993 { 7994 /* If we have changed the section, and our original section is 7995 marked with SEC_EXCLUDE, it means that the original 7996 SEC_MERGE section has been completely subsumed in some 7997 other SEC_MERGE section. In this case, we need to leave 7998 some info around for --emit-relocs. */ 7999 if ((sec->flags & SEC_EXCLUDE) != 0) 8000 sec->kept_section = *psec; 8001 sec = *psec; 8002 } 8003 rel->r_addend -= relocation; 8004 rel->r_addend += sec->output_section->vma + sec->output_offset; 8005 } 8006 return relocation; 8007 } 8008 8009 static bfd_vma 8010 calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel, 8011 Elf_Internal_Sym *isymbuf, 8012 Elf_Internal_Shdr *symtab_hdr) 8013 { 8014 bfd_signed_vma foff; 8015 bfd_vma symval, addend; 8016 Elf_Internal_Rela irel_fn; 8017 Elf_Internal_Sym *isym; 8018 asection *sym_sec; 8019 8020 /* Get the value of the symbol referred to by the reloc. */ 8021 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) 8022 { 8023 /* A local symbol. */ 8024 isym = isymbuf + ELF32_R_SYM (irel->r_info); 8025 8026 if (isym->st_shndx == SHN_UNDEF) 8027 sym_sec = bfd_und_section_ptr; 8028 else if (isym->st_shndx == SHN_ABS) 8029 sym_sec = bfd_abs_section_ptr; 8030 else if (isym->st_shndx == SHN_COMMON) 8031 sym_sec = bfd_com_section_ptr; 8032 else 8033 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); 8034 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela)); 8035 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn); 8036 addend = irel_fn.r_addend; 8037 } 8038 else 8039 { 8040 unsigned long indx; 8041 struct elf_link_hash_entry *h; 8042 8043 /* An external symbol. */ 8044 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 8045 h = elf_sym_hashes (abfd)[indx]; 8046 BFD_ASSERT (h != NULL); 8047 8048 while (h->root.type == bfd_link_hash_indirect 8049 || h->root.type == bfd_link_hash_warning) 8050 h = (struct elf_link_hash_entry *) h->root.u.i.link; 8051 8052 if (h->root.type != bfd_link_hash_defined 8053 && h->root.type != bfd_link_hash_defweak) 8054 /* This appears to be a reference to an undefined 8055 symbol. Just ignore it--it will be caught by the 8056 regular reloc processing. */ 8057 return 0; 8058 8059 if (h->root.u.def.section->flags & SEC_MERGE) 8060 { 8061 sym_sec = h->root.u.def.section; 8062 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data 8063 (sym_sec)->sec_info, h->root.u.def.value); 8064 symval = symval + sym_sec->output_section->vma 8065 + sym_sec->output_offset; 8066 } 8067 else 8068 symval = (h->root.u.def.value 8069 + h->root.u.def.section->output_section->vma 8070 + h->root.u.def.section->output_offset); 8071 addend = irel->r_addend; 8072 } 8073 8074 foff = symval + addend; 8075 8076 return foff; 8077 } 8078 8079 static bfd_vma 8080 calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info, 8081 Elf_Internal_Rela *irel, 8082 Elf_Internal_Shdr *symtab_hdr) 8083 { 8084 int symndx; 8085 bfd_vma *local_got_offsets; 8086 /* Get the value of the symbol referred to by the reloc. */ 8087 struct elf_link_hash_entry *h; 8088 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info); 8089 8090 /* An external symbol. */ 8091 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 8092 h = elf_sym_hashes (abfd)[symndx]; 8093 while (h->root.type == bfd_link_hash_indirect 8094 || h->root.type == bfd_link_hash_warning) 8095 h = (struct elf_link_hash_entry *) h->root.u.i.link; 8096 8097 if (symndx >= 0) 8098 { 8099 BFD_ASSERT (h != NULL); 8100 return htab->sgot->output_section->vma + htab->sgot->output_offset 8101 + h->got.offset; 8102 } 8103 else 8104 { 8105 local_got_offsets = elf_local_got_offsets (abfd); 8106 BFD_ASSERT (local_got_offsets != NULL); 8107 return htab->sgot->output_section->vma + htab->sgot->output_offset 8108 + local_got_offsets[ELF32_R_SYM (irel->r_info)]; 8109 } 8110 8111 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */ 8112 /* The check of h->root.type is passed. */ 8113 } 8114 8115 static int 8116 is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED, 8117 asection *sec, Elf_Internal_Rela *rel) 8118 { 8119 bfd_byte *contents; 8120 unsigned short insn16; 8121 8122 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG)) 8123 return FALSE; 8124 contents = elf_section_data (sec)->this_hdr.contents; 8125 insn16 = bfd_getb16 (contents + rel->r_offset); 8126 if (insn16 == NDS32_NOP16) 8127 return TRUE; 8128 return FALSE; 8129 } 8130 8131 /* It checks whether the instruction could be converted to 8132 16-bit form and returns the converted one. 8133 8134 `internal_relocs' is supposed to be sorted. */ 8135 8136 static int 8137 is_convert_32_to_16 (bfd *abfd, asection *sec, 8138 Elf_Internal_Rela *reloc, 8139 Elf_Internal_Rela *internal_relocs, 8140 Elf_Internal_Rela *irelend, 8141 uint16_t *insn16) 8142 { 8143 #define NORMAL_32_TO_16 (1 << 0) 8144 #define SPECIAL_32_TO_16 (1 << 1) 8145 bfd_byte *contents = NULL; 8146 bfd_signed_vma off; 8147 bfd_vma mem_addr; 8148 uint32_t insn = 0; 8149 Elf_Internal_Rela *pc_rel; 8150 int pic_ext_target = 0; 8151 Elf_Internal_Shdr *symtab_hdr; 8152 Elf_Internal_Sym *isymbuf = NULL; 8153 int convert_type; 8154 bfd_vma offset; 8155 8156 if (reloc->r_offset + 4 > sec->size) 8157 return FALSE; 8158 8159 offset = reloc->r_offset; 8160 8161 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)) 8162 return FALSE; 8163 insn = bfd_getb32 (contents + offset); 8164 8165 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL)) 8166 convert_type = NORMAL_32_TO_16; 8167 else if (special_convert_32_to_16 (insn, insn16, reloc)) 8168 convert_type = SPECIAL_32_TO_16; 8169 else 8170 return FALSE; 8171 8172 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 8173 if (!nds32_get_local_syms (abfd, sec, &isymbuf)) 8174 return FALSE; 8175 8176 /* Find the first relocation of the same relocation-type, 8177 so we iteratie them forward. */ 8178 pc_rel = reloc; 8179 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset) 8180 pc_rel--; 8181 8182 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++) 8183 { 8184 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA 8185 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA 8186 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA 8187 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL) 8188 { 8189 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr, 8190 &pic_ext_target); 8191 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1 8192 || off == 0) 8193 return FALSE; 8194 break; 8195 } 8196 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA) 8197 { 8198 /* movi => movi55 */ 8199 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf, 8200 symtab_hdr); 8201 /* mem_addr is unsigned, but the value should 8202 be between [-16, 15]. */ 8203 if ((mem_addr + 0x10) >> 5) 8204 return FALSE; 8205 break; 8206 } 8207 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20) 8208 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12)) 8209 { 8210 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20, 8211 because it can be relaxed to addi for TLS_LE_ADD. */ 8212 return FALSE; 8213 } 8214 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA 8215 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA) 8216 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) 8217 && convert_type == SPECIAL_32_TO_16) 8218 { 8219 /* fp-as-gp 8220 We've selected a best fp-base for this access, so we can 8221 always resolve it anyway. Do nothing. */ 8222 break; 8223 } 8224 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE 8225 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT)) 8226 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY) 8227 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16)) 8228 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE) 8229 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA))) 8230 { 8231 /* Prevent unresolved addi instruction translate 8232 to addi45 or addi333. */ 8233 return FALSE; 8234 } 8235 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA)) 8236 { 8237 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr, 8238 &pic_ext_target); 8239 if (off >= ACCURATE_U9BIT_S1 || off <= 0) 8240 return FALSE; 8241 break; 8242 } 8243 } 8244 8245 return TRUE; 8246 } 8247 8248 static void 8249 nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents, 8250 Elf_Internal_Rela *reloc, 8251 Elf_Internal_Rela *internal_relocs, 8252 Elf_Internal_Rela *irelend, 8253 unsigned short insn16) 8254 { 8255 Elf_Internal_Rela *pc_rel; 8256 bfd_vma offset; 8257 8258 offset = reloc->r_offset; 8259 bfd_putb16 (insn16, contents + offset); 8260 /* Find the first relocation of the same relocation-type, 8261 so we iteratie them forward. */ 8262 pc_rel = reloc; 8263 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset) 8264 pc_rel--; 8265 8266 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++) 8267 { 8268 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA 8269 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA 8270 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA) 8271 { 8272 pc_rel->r_info = 8273 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA); 8274 } 8275 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL) 8276 pc_rel->r_info = 8277 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL); 8278 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA) 8279 pc_rel->r_info = 8280 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA); 8281 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA 8282 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA) 8283 pc_rel->r_info = 8284 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA); 8285 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA)) 8286 pc_rel->r_info = 8287 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA); 8288 } 8289 } 8290 8291 /* Find a relocation of type specified by `reloc_type' 8292 of the same r_offset with reloc. 8293 If not found, return irelend. 8294 8295 Assuming relocations are sorted by r_offset, 8296 we find the relocation from `reloc' backward untill relocs, 8297 or find it from `reloc' forward untill irelend. */ 8298 8299 static Elf_Internal_Rela * 8300 find_relocs_at_address (Elf_Internal_Rela *reloc, 8301 Elf_Internal_Rela *relocs, 8302 Elf_Internal_Rela *irelend, 8303 enum elf_nds32_reloc_type reloc_type) 8304 { 8305 Elf_Internal_Rela *rel_t; 8306 8307 /* Find backward. */ 8308 for (rel_t = reloc; 8309 rel_t >= relocs && rel_t->r_offset == reloc->r_offset; 8310 rel_t--) 8311 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type) 8312 return rel_t; 8313 8314 /* We didn't find it backward. Try find it forward. */ 8315 for (rel_t = reloc; 8316 rel_t < irelend && rel_t->r_offset == reloc->r_offset; 8317 rel_t++) 8318 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type) 8319 return rel_t; 8320 8321 return irelend; 8322 } 8323 8324 /* Find a relocation of specified type and offset. 8325 `reloc' is just a refence point to find a relocation at specified offset. 8326 If not found, return irelend. 8327 8328 Assuming relocations are sorted by r_offset, 8329 we find the relocation from `reloc' backward untill relocs, 8330 or find it from `reloc' forward untill irelend. */ 8331 8332 static Elf_Internal_Rela * 8333 find_relocs_at_address_addr (Elf_Internal_Rela *reloc, 8334 Elf_Internal_Rela *relocs, 8335 Elf_Internal_Rela *irelend, 8336 enum elf_nds32_reloc_type reloc_type, 8337 bfd_vma offset_p) 8338 { 8339 Elf_Internal_Rela *rel_t = NULL; 8340 8341 /* First, we try to find a relocation of offset `offset_p', 8342 and then we use find_relocs_at_address to find specific type. */ 8343 8344 if (reloc->r_offset > offset_p) 8345 { 8346 /* Find backward. */ 8347 for (rel_t = reloc; 8348 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--) 8349 /* Do nothing. */; 8350 } 8351 else if (reloc->r_offset < offset_p) 8352 { 8353 /* Find forward. */ 8354 for (rel_t = reloc; 8355 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++) 8356 /* Do nothing. */; 8357 } 8358 else 8359 rel_t = reloc; 8360 8361 /* Not found? */ 8362 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p) 8363 return irelend; 8364 8365 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type); 8366 } 8367 8368 static bfd_boolean 8369 nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc, 8370 Elf_Internal_Rela *internal_relocs, 8371 Elf_Internal_Rela *irelend, 8372 unsigned char reloc_type) 8373 { 8374 Elf_Internal_Rela *rel_t; 8375 8376 for (rel_t = reloc; 8377 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset; 8378 rel_t--) 8379 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type) 8380 { 8381 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info) 8382 && rel_t->r_addend == reloc->r_addend) 8383 continue; 8384 return TRUE; 8385 } 8386 8387 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset; 8388 rel_t++) 8389 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type) 8390 { 8391 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info) 8392 && rel_t->r_addend == reloc->r_addend) 8393 continue; 8394 return TRUE; 8395 } 8396 8397 return FALSE; 8398 } 8399 8400 typedef struct nds32_elf_blank nds32_elf_blank_t; 8401 struct nds32_elf_blank 8402 { 8403 /* Where the blank begins. */ 8404 bfd_vma offset; 8405 /* The size of the blank. */ 8406 bfd_vma size; 8407 /* The accumulative size before this blank. */ 8408 bfd_vma total_size; 8409 nds32_elf_blank_t *next; 8410 nds32_elf_blank_t *prev; 8411 }; 8412 8413 static nds32_elf_blank_t *blank_free_list = NULL; 8414 8415 static nds32_elf_blank_t * 8416 create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p) 8417 { 8418 nds32_elf_blank_t *blank_t; 8419 8420 if (blank_free_list) 8421 { 8422 blank_t = blank_free_list; 8423 blank_free_list = blank_free_list->next; 8424 } 8425 else 8426 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t)); 8427 8428 if (blank_t == NULL) 8429 return NULL; 8430 8431 blank_t->offset = offset_p; 8432 blank_t->size = size_p; 8433 blank_t->total_size = 0; 8434 blank_t->next = NULL; 8435 blank_t->prev = NULL; 8436 8437 return blank_t; 8438 } 8439 8440 static void 8441 remove_nds32_elf_blank (nds32_elf_blank_t *blank_p) 8442 { 8443 if (blank_free_list) 8444 { 8445 blank_free_list->prev = blank_p; 8446 blank_p->next = blank_free_list; 8447 } 8448 else 8449 blank_p->next = NULL; 8450 8451 blank_p->prev = NULL; 8452 blank_free_list = blank_p; 8453 } 8454 8455 static void 8456 clean_nds32_elf_blank (void) 8457 { 8458 nds32_elf_blank_t *blank_t; 8459 8460 while (blank_free_list) 8461 { 8462 blank_t = blank_free_list; 8463 blank_free_list = blank_free_list->next; 8464 free (blank_t); 8465 } 8466 } 8467 8468 static nds32_elf_blank_t * 8469 search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr) 8470 { 8471 nds32_elf_blank_t *blank_t; 8472 8473 if (!blank_p) 8474 return NULL; 8475 blank_t = blank_p; 8476 8477 while (blank_t && addr < blank_t->offset) 8478 blank_t = blank_t->prev; 8479 while (blank_t && blank_t->next && addr >= blank_t->next->offset) 8480 blank_t = blank_t->next; 8481 8482 return blank_t; 8483 } 8484 8485 static bfd_vma 8486 get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr, 8487 int overwrite) 8488 { 8489 nds32_elf_blank_t *blank_t; 8490 8491 blank_t = search_nds32_elf_blank (*blank_p, addr); 8492 if (!blank_t) 8493 return 0; 8494 8495 if (overwrite) 8496 *blank_p = blank_t; 8497 8498 if (addr < blank_t->offset + blank_t->size) 8499 return blank_t->total_size + (addr - blank_t->offset); 8500 else 8501 return blank_t->total_size + blank_t->size; 8502 } 8503 8504 static bfd_boolean 8505 insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len) 8506 { 8507 nds32_elf_blank_t *blank_t, *blank_t2; 8508 8509 if (!*blank_p) 8510 { 8511 *blank_p = create_nds32_elf_blank (addr, len); 8512 return *blank_p ? TRUE : FALSE; 8513 } 8514 8515 blank_t = search_nds32_elf_blank (*blank_p, addr); 8516 8517 if (blank_t == NULL) 8518 { 8519 blank_t = create_nds32_elf_blank (addr, len); 8520 if (!blank_t) 8521 return FALSE; 8522 while ((*blank_p)->prev != NULL) 8523 *blank_p = (*blank_p)->prev; 8524 blank_t->next = *blank_p; 8525 (*blank_p)->prev = blank_t; 8526 (*blank_p) = blank_t; 8527 return TRUE; 8528 } 8529 8530 if (addr < blank_t->offset + blank_t->size) 8531 { 8532 if (addr > blank_t->offset + blank_t->size) 8533 blank_t->size = addr - blank_t->offset; 8534 } 8535 else 8536 { 8537 blank_t2 = create_nds32_elf_blank (addr, len); 8538 if (!blank_t2) 8539 return FALSE; 8540 if (blank_t->next) 8541 { 8542 blank_t->next->prev = blank_t2; 8543 blank_t2->next = blank_t->next; 8544 } 8545 blank_t2->prev = blank_t; 8546 blank_t->next = blank_t2; 8547 *blank_p = blank_t2; 8548 } 8549 8550 return TRUE; 8551 } 8552 8553 static bfd_boolean 8554 insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr, 8555 bfd_vma len) 8556 { 8557 nds32_elf_blank_t *blank_t; 8558 8559 if (!insert_nds32_elf_blank (blank_p, addr, len)) 8560 return FALSE; 8561 8562 blank_t = *blank_p; 8563 8564 if (!blank_t->prev) 8565 { 8566 blank_t->total_size = 0; 8567 blank_t = blank_t->next; 8568 } 8569 8570 while (blank_t) 8571 { 8572 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size; 8573 blank_t = blank_t->next; 8574 } 8575 8576 return TRUE; 8577 } 8578 8579 static void 8580 calc_nds32_blank_total (nds32_elf_blank_t *blank_p) 8581 { 8582 nds32_elf_blank_t *blank_t; 8583 bfd_vma total_size = 0; 8584 8585 if (!blank_p) 8586 return; 8587 8588 blank_t = blank_p; 8589 while (blank_t->prev) 8590 blank_t = blank_t->prev; 8591 while (blank_t) 8592 { 8593 blank_t->total_size = total_size; 8594 total_size += blank_t->size; 8595 blank_t = blank_t->next; 8596 } 8597 } 8598 8599 static bfd_boolean 8600 nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec, 8601 nds32_elf_blank_t *blank_p) 8602 { 8603 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */ 8604 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */ 8605 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */ 8606 unsigned int sec_shndx; /* The section the be relaxed. */ 8607 bfd_byte *contents; /* Contents data of iterating section. */ 8608 Elf_Internal_Rela *internal_relocs; 8609 Elf_Internal_Rela *irel; 8610 Elf_Internal_Rela *irelend; 8611 struct elf_link_hash_entry **sym_hashes; 8612 struct elf_link_hash_entry **end_hashes; 8613 unsigned int symcount; 8614 asection *sect; 8615 nds32_elf_blank_t *blank_t; 8616 nds32_elf_blank_t *blank_t2; 8617 nds32_elf_blank_t *blank_head; 8618 8619 blank_head = blank_t = blank_p; 8620 while (blank_head->prev != NULL) 8621 blank_head = blank_head->prev; 8622 while (blank_t->next != NULL) 8623 blank_t = blank_t->next; 8624 8625 if (blank_t->offset + blank_t->size <= sec->size) 8626 { 8627 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0); 8628 blank_t->next->prev = blank_t; 8629 } 8630 if (blank_head->offset > 0) 8631 { 8632 blank_head->prev = create_nds32_elf_blank (0, 0); 8633 blank_head->prev->next = blank_head; 8634 blank_head = blank_head->prev; 8635 } 8636 8637 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 8638 8639 /* The deletion must stop at the next ALIGN reloc for an alignment 8640 power larger than the number of bytes we are deleting. */ 8641 8642 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 8643 if (!nds32_get_local_syms (abfd, sec, &isym)) 8644 return FALSE; 8645 8646 if (isym == NULL) 8647 { 8648 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr, 8649 symtab_hdr->sh_info, 0, NULL, NULL, NULL); 8650 symtab_hdr->contents = (bfd_byte *) isym; 8651 } 8652 8653 if (isym == NULL || symtab_hdr->sh_info == 0) 8654 return FALSE; 8655 8656 blank_t = blank_head; 8657 calc_nds32_blank_total (blank_head); 8658 8659 for (sect = abfd->sections; sect != NULL; sect = sect->next) 8660 { 8661 /* Adjust all the relocs. */ 8662 8663 /* Relocations MUST be kept in memory, because relaxation adjust them. */ 8664 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL, 8665 TRUE /* keep_memory */); 8666 irelend = internal_relocs + sect->reloc_count; 8667 8668 blank_t = blank_head; 8669 blank_t2 = blank_head; 8670 8671 if (!(sect->flags & SEC_RELOC)) 8672 continue; 8673 8674 nds32_get_section_contents (abfd, sect, &contents, TRUE); 8675 8676 for (irel = internal_relocs; irel < irelend; irel++) 8677 { 8678 bfd_vma raddr; 8679 8680 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8 8681 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32 8682 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx) 8683 { 8684 unsigned long val = 0; 8685 unsigned long mask; 8686 long before, between; 8687 long offset = 0; 8688 8689 switch (ELF32_R_TYPE (irel->r_info)) 8690 { 8691 case R_NDS32_DIFF8: 8692 offset = bfd_get_8 (abfd, contents + irel->r_offset); 8693 break; 8694 case R_NDS32_DIFF16: 8695 offset = bfd_get_16 (abfd, contents + irel->r_offset); 8696 break; 8697 case R_NDS32_DIFF32: 8698 val = bfd_get_32 (abfd, contents + irel->r_offset); 8699 /* Get the signed bit and mask for the high part. The 8700 gcc will alarm when right shift 32-bit since the 8701 type size of long may be 32-bit. */ 8702 mask = 0 - (val >> 31); 8703 if (mask) 8704 offset = (val | (mask - 0xffffffff)); 8705 else 8706 offset = val; 8707 break; 8708 default: 8709 BFD_ASSERT (0); 8710 } 8711 8712 /* DIFF value 8713 0 |encoded in location| 8714 |------------|-------------------|--------- 8715 sym+off(addend) 8716 -- before ---| ***************** 8717 --------------------- between ---| 8718 8719 We only care how much data are relax between DIFF, 8720 marked as ***. */ 8721 8722 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0); 8723 between = get_nds32_elf_blank_total (&blank_t, 8724 irel->r_addend + offset, 0); 8725 if (between == before) 8726 goto done_adjust_diff; 8727 8728 switch (ELF32_R_TYPE (irel->r_info)) 8729 { 8730 case R_NDS32_DIFF8: 8731 bfd_put_8 (abfd, offset - (between - before), 8732 contents + irel->r_offset); 8733 break; 8734 case R_NDS32_DIFF16: 8735 bfd_put_16 (abfd, offset - (between - before), 8736 contents + irel->r_offset); 8737 break; 8738 case R_NDS32_DIFF32: 8739 bfd_put_32 (abfd, offset - (between - before), 8740 contents + irel->r_offset); 8741 break; 8742 } 8743 } 8744 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128 8745 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx) 8746 { 8747 bfd_vma val = 0; 8748 unsigned int len = 0; 8749 unsigned long before, between; 8750 bfd_byte *endp, *p; 8751 8752 val = read_unsigned_leb128 (abfd, contents + irel->r_offset, 8753 &len); 8754 8755 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0); 8756 between = get_nds32_elf_blank_total (&blank_t, 8757 irel->r_addend + val, 0); 8758 if (between == before) 8759 goto done_adjust_diff; 8760 8761 p = contents + irel->r_offset; 8762 endp = p + len -1; 8763 memset (p, 0x80, len); 8764 *(endp) = 0; 8765 p = write_uleb128 (p, val - (between - before)) - 1; 8766 if (p < endp) 8767 *p |= 0x80; 8768 } 8769 done_adjust_diff: 8770 8771 if (sec == sect) 8772 { 8773 raddr = irel->r_offset; 8774 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2, 8775 irel->r_offset, 1); 8776 8777 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE) 8778 continue; 8779 if (blank_t2 && blank_t2->next 8780 && (blank_t2->offset > raddr 8781 || blank_t2->next->offset <= raddr)) 8782 (*_bfd_error_handler) 8783 (_("%B: %s\n"), abfd, 8784 "Error: search_nds32_elf_blank reports wrong node"); 8785 8786 /* Mark reloc in deleted portion as NONE. 8787 For some relocs like R_NDS32_LABEL that doesn't modify the 8788 content in the section. R_NDS32_LABEL doesn't belong to the 8789 instruction in the section, so we should preserve it. */ 8790 if (raddr >= blank_t2->offset 8791 && raddr < blank_t2->offset + blank_t2->size 8792 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL 8793 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN 8794 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END 8795 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY 8796 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND 8797 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND) 8798 { 8799 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 8800 R_NDS32_NONE); 8801 continue; 8802 } 8803 } 8804 8805 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE 8806 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 8807 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY) 8808 continue; 8809 8810 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info 8811 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx 8812 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION) 8813 { 8814 if (irel->r_addend <= sec->size) 8815 irel->r_addend -= 8816 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1); 8817 } 8818 } 8819 } 8820 8821 /* Adjust the local symbols defined in this section. */ 8822 blank_t = blank_head; 8823 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) 8824 { 8825 if (isym->st_shndx == sec_shndx) 8826 { 8827 if (isym->st_value <= sec->size) 8828 { 8829 bfd_vma ahead; 8830 bfd_vma orig_addr = isym->st_value; 8831 8832 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1); 8833 isym->st_value -= ahead; 8834 8835 /* Adjust function size. */ 8836 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC 8837 && isym->st_size > 0) 8838 isym->st_size -= 8839 get_nds32_elf_blank_total 8840 (&blank_t, orig_addr + isym->st_size, 0) - ahead; 8841 } 8842 } 8843 } 8844 8845 /* Now adjust the global symbols defined in this section. */ 8846 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 8847 - symtab_hdr->sh_info); 8848 sym_hashes = elf_sym_hashes (abfd); 8849 end_hashes = sym_hashes + symcount; 8850 blank_t = blank_head; 8851 for (; sym_hashes < end_hashes; sym_hashes++) 8852 { 8853 struct elf_link_hash_entry *sym_hash = *sym_hashes; 8854 8855 if ((sym_hash->root.type == bfd_link_hash_defined 8856 || sym_hash->root.type == bfd_link_hash_defweak) 8857 && sym_hash->root.u.def.section == sec) 8858 { 8859 if (sym_hash->root.u.def.value <= sec->size) 8860 { 8861 bfd_vma ahead; 8862 bfd_vma orig_addr = sym_hash->root.u.def.value; 8863 8864 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1); 8865 sym_hash->root.u.def.value -= ahead; 8866 8867 /* Adjust function size. */ 8868 if (sym_hash->type == STT_FUNC) 8869 sym_hash->size -= 8870 get_nds32_elf_blank_total 8871 (&blank_t, orig_addr + sym_hash->size, 0) - ahead; 8872 8873 } 8874 } 8875 } 8876 8877 contents = elf_section_data (sec)->this_hdr.contents; 8878 blank_t = blank_head; 8879 while (blank_t->next) 8880 { 8881 /* Actually delete the bytes. */ 8882 8883 /* If current blank is the last blank overlap with current section, 8884 go to finish process. */ 8885 if (sec->size <= (blank_t->next->offset)) 8886 break; 8887 8888 memmove (contents + blank_t->offset - blank_t->total_size, 8889 contents + blank_t->offset + blank_t->size, 8890 blank_t->next->offset - (blank_t->offset + blank_t->size)); 8891 8892 blank_t = blank_t->next; 8893 } 8894 8895 if (sec->size > (blank_t->offset + blank_t->size)) 8896 { 8897 /* There are remaining code between blank and section boundary. 8898 Move the remaining code to appropriate location. */ 8899 memmove (contents + blank_t->offset - blank_t->total_size, 8900 contents + blank_t->offset + blank_t->size, 8901 sec->size - (blank_t->offset + blank_t->size)); 8902 sec->size -= blank_t->total_size + blank_t->size; 8903 } 8904 else 8905 /* This blank is not entirely included in the section, 8906 reduce the section size by only part of the blank size. */ 8907 sec->size -= blank_t->total_size + (sec->size - blank_t->offset); 8908 8909 while (blank_head) 8910 { 8911 blank_t = blank_head; 8912 blank_head = blank_head->next; 8913 remove_nds32_elf_blank (blank_t); 8914 } 8915 8916 return TRUE; 8917 } 8918 8919 /* Get the contents of a section. */ 8920 8921 static int 8922 nds32_get_section_contents (bfd *abfd, asection *sec, 8923 bfd_byte **contents_p, bfd_boolean cache) 8924 { 8925 /* Get the section contents. */ 8926 if (elf_section_data (sec)->this_hdr.contents != NULL) 8927 *contents_p = elf_section_data (sec)->this_hdr.contents; 8928 else 8929 { 8930 if (!bfd_malloc_and_get_section (abfd, sec, contents_p)) 8931 return FALSE; 8932 if (cache) 8933 elf_section_data (sec)->this_hdr.contents = *contents_p; 8934 } 8935 8936 return TRUE; 8937 } 8938 8939 /* Get the contents of the internal symbol of abfd. */ 8940 8941 static int 8942 nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED, 8943 Elf_Internal_Sym **isymbuf_p) 8944 { 8945 Elf_Internal_Shdr *symtab_hdr; 8946 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 8947 8948 /* Read this BFD's local symbols if we haven't done so already. */ 8949 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0) 8950 { 8951 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents; 8952 if (*isymbuf_p == NULL) 8953 { 8954 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr, 8955 symtab_hdr->sh_info, 0, 8956 NULL, NULL, NULL); 8957 if (*isymbuf_p == NULL) 8958 return FALSE; 8959 } 8960 } 8961 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p); 8962 8963 return TRUE; 8964 } 8965 8966 /* Range of small data. */ 8967 static bfd_vma sdata_range[2][2]; 8968 static bfd_vma const sdata_init_range[2] = 8969 { ACCURATE_12BIT_S1, ACCURATE_19BIT }; 8970 8971 static int 8972 nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED, 8973 bfd_byte *contents, bfd_vma addr) 8974 { 8975 unsigned long insn = bfd_getb32 (contents + addr); 8976 8977 if (insn & 0x80000000) 8978 return 2; 8979 8980 return 4; 8981 } 8982 8983 /* Set the gp relax range. We have to measure the safe range 8984 to do gp relaxation. */ 8985 8986 static void 8987 relax_range_measurement (bfd *abfd) 8988 { 8989 asection *sec_f, *sec_b; 8990 /* For upper bound. */ 8991 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize; 8992 bfd_vma align; 8993 static int decide_relax_range = 0; 8994 int i; 8995 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]); 8996 8997 if (decide_relax_range) 8998 return; 8999 decide_relax_range = 1; 9000 9001 if (sda_rela_sec == NULL) 9002 { 9003 /* Since there is no data sections, we assume the range is page size. */ 9004 for (i = 0; i < range_number; i++) 9005 { 9006 sdata_range[i][0] = sdata_init_range[i] - 0x1000; 9007 sdata_range[i][1] = sdata_init_range[i] - 0x1000; 9008 } 9009 return; 9010 } 9011 9012 /* Get the biggest alignment power after the gp located section. */ 9013 sec_f = sda_rela_sec->output_section; 9014 sec_b = sec_f->next; 9015 align = 0; 9016 while (sec_b != NULL) 9017 { 9018 if ((unsigned)(1 << sec_b->alignment_power) > align) 9019 align = (1 << sec_b->alignment_power); 9020 sec_b = sec_b->next; 9021 } 9022 9023 /* I guess we can not determine the section before 9024 gp located section, so we assume the align is max page size. */ 9025 for (i = 0; i < range_number; i++) 9026 { 9027 sdata_range[i][1] = sdata_init_range[i] - align; 9028 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]); 9029 sdata_range[i][0] = sdata_init_range[i] - maxpgsz; 9030 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]); 9031 } 9032 } 9033 9034 /* These are macros used to check flags encoded in r_addend. 9035 They are only used by nds32_elf_relax_section (). */ 9036 #define GET_SEQ_LEN(addend) ((addend) & 0x000000ff) 9037 #define IS_1ST_CONVERT(addend) ((addend) & 0x80000000) 9038 #define IS_OPTIMIZE(addend) ((addend) & 0x40000000) 9039 #define IS_16BIT_ON(addend) ((addend) & 0x20000000) 9040 9041 /* Relax LONGCALL1 relocation for nds32_elf_relax_section. */ 9042 9043 static bfd_boolean 9044 nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9045 Elf_Internal_Rela *internal_relocs, int *insn_len, 9046 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9047 Elf_Internal_Shdr *symtab_hdr) 9048 { 9049 /* There are 3 variations for LONGCALL1 9050 case 4-4-2; 16-bit on, optimize off or optimize for space 9051 sethi ta, hi20(symbol) ; LONGCALL1/HI20 9052 ori ta, ta, lo12(symbol) ; LO12S0 9053 jral5 ta ; 9054 9055 case 4-4-4; 16-bit off, optimize don't care 9056 sethi ta, hi20(symbol) ; LONGCALL1/HI20 9057 ori ta, ta, lo12(symbol) ; LO12S0 9058 jral ta ; 9059 9060 case 4-4-4; 16-bit on, optimize for speed 9061 sethi ta, hi20(symbol) ; LONGCALL1/HI20 9062 ori ta, ta, lo12(symbol) ; LO12S0 9063 jral ta ; 9064 Check code for -mlong-calls output. */ 9065 9066 /* Get the reloc for the address from which the register is 9067 being loaded. This reloc will tell us which function is 9068 actually being called. */ 9069 9070 bfd_vma laddr; 9071 int seq_len; /* Original length of instruction sequence. */ 9072 uint32_t insn; 9073 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend; 9074 int pic_ext_target = 0; 9075 bfd_signed_vma foff; 9076 uint16_t insn16; 9077 9078 irelend = internal_relocs + sec->reloc_count; 9079 seq_len = GET_SEQ_LEN (irel->r_addend); 9080 laddr = irel->r_offset; 9081 *insn_len = seq_len; 9082 9083 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend, 9084 R_NDS32_HI20_RELA, laddr); 9085 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend, 9086 R_NDS32_LO12S0_ORI_RELA, 9087 laddr + 4); 9088 9089 if (hi_irelfn == irelend || lo_irelfn == irelend) 9090 { 9091 (*_bfd_error_handler) 9092 ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized" 9093 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 9094 return FALSE; 9095 } 9096 9097 /* Get the value of the symbol referred to by the reloc. */ 9098 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr, 9099 &pic_ext_target); 9100 9101 /* This condition only happened when symbol is undefined. */ 9102 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 9103 || foff >= CONSERVATIVE_24BIT_S1) 9104 return FALSE; 9105 9106 /* Relax to: jal symbol; 25_PCREL */ 9107 /* For simplicity of coding, we are going to modify the section 9108 contents, the section relocs, and the BFD symbol table. We 9109 must tell the rest of the code not to free up this 9110 information. It would be possible to instead create a table 9111 of changes which have to be made, as is done in coff-mips.c; 9112 that would be more work, but would require less memory when 9113 the linker is run. */ 9114 9115 /* Replace the long call with a jal. */ 9116 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9117 R_NDS32_25_PCREL_RELA); 9118 irel->r_addend = hi_irelfn->r_addend; 9119 9120 /* We don't resolve this here but resolve it in relocate_section. */ 9121 insn = INSN_JAL; 9122 bfd_putb32 (insn, contents + irel->r_offset); 9123 9124 hi_irelfn->r_info = 9125 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE); 9126 lo_irelfn->r_info = 9127 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE); 9128 *insn_len = 4; 9129 9130 if (seq_len & 0x2) 9131 { 9132 insn16 = NDS32_NOP16; 9133 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len); 9134 lo_irelfn->r_info = 9135 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16); 9136 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9137 *insn_len += 2; 9138 } 9139 return TRUE; 9140 } 9141 9142 #define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000) 9143 /* Relax LONGCALL2 relocation for nds32_elf_relax_section. */ 9144 9145 static bfd_boolean 9146 nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9147 Elf_Internal_Rela *internal_relocs, int *insn_len, 9148 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9149 Elf_Internal_Shdr *symtab_hdr) 9150 { 9151 /* bltz rt, .L1 ; LONGCALL2 9152 jal symbol ; 25_PCREL 9153 .L1: */ 9154 9155 /* Get the reloc for the address from which the register is 9156 being loaded. This reloc will tell us which function is 9157 actually being called. */ 9158 9159 bfd_vma laddr; 9160 uint32_t insn; 9161 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend; 9162 int pic_ext_target = 0; 9163 bfd_signed_vma foff; 9164 9165 irelend = internal_relocs + sec->reloc_count; 9166 laddr = irel->r_offset; 9167 i1_irelfn = 9168 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9169 R_NDS32_25_PCREL_RELA, laddr + 4); 9170 9171 if (i1_irelfn == irelend) 9172 { 9173 (*_bfd_error_handler) 9174 ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized" 9175 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 9176 return FALSE; 9177 } 9178 9179 insn = bfd_getb32 (contents + laddr); 9180 9181 /* Get the value of the symbol referred to by the reloc. */ 9182 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr, 9183 &pic_ext_target); 9184 9185 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1 9186 || foff >= CONSERVATIVE_16BIT_S1) 9187 return FALSE; 9188 9189 /* Relax to bgezal rt, label ; 17_PCREL 9190 or bltzal rt, label ; 17_PCREL */ 9191 9192 /* Convert to complimentary conditional call. */ 9193 insn = CONVERT_CONDITION_CALL (insn); 9194 9195 /* For simplicity of coding, we are going to modify the section 9196 contents, the section relocs, and the BFD symbol table. We 9197 must tell the rest of the code not to free up this 9198 information. It would be possible to instead create a table 9199 of changes which have to be made, as is done in coff-mips.c; 9200 that would be more work, but would require less memory when 9201 the linker is run. */ 9202 9203 /* Clean unnessary relocations. */ 9204 i1_irelfn->r_info = 9205 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE); 9206 cond_irelfn = 9207 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9208 R_NDS32_17_PCREL_RELA, laddr); 9209 if (cond_irelfn != irelend) 9210 cond_irelfn->r_info = 9211 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE); 9212 9213 /* Replace the long call with a bgezal. */ 9214 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), 9215 R_NDS32_17_PCREL_RELA); 9216 irel->r_addend = i1_irelfn->r_addend; 9217 9218 bfd_putb32 (insn, contents + irel->r_offset); 9219 9220 *insn_len = 4; 9221 return TRUE; 9222 } 9223 9224 /* Relax LONGCALL3 relocation for nds32_elf_relax_section. */ 9225 9226 static bfd_boolean 9227 nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9228 Elf_Internal_Rela *internal_relocs, int *insn_len, 9229 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9230 Elf_Internal_Shdr *symtab_hdr) 9231 { 9232 /* There are 3 variations for LONGCALL3 9233 case 4-4-4-2; 16-bit on, optimize off or optimize for space 9234 bltz rt, $1 ; LONGCALL3 9235 sethi ta, hi20(symbol) ; HI20 9236 ori ta, ta, lo12(symbol) ; LO12S0 9237 jral5 ta ; 9238 $1 9239 9240 case 4-4-4-4; 16-bit off, optimize don't care 9241 bltz rt, $1 ; LONGCALL3 9242 sethi ta, hi20(symbol) ; HI20 9243 ori ta, ta, lo12(symbol) ; LO12S0 9244 jral ta ; 9245 $1 9246 9247 case 4-4-4-4; 16-bit on, optimize for speed 9248 bltz rt, $1 ; LONGCALL3 9249 sethi ta, hi20(symbol) ; HI20 9250 ori ta, ta, lo12(symbol) ; LO12S0 9251 jral ta ; 9252 $1 */ 9253 9254 /* Get the reloc for the address from which the register is 9255 being loaded. This reloc will tell us which function is 9256 actually being called. */ 9257 9258 bfd_vma laddr; 9259 int seq_len; /* Original length of instruction sequence. */ 9260 uint32_t insn; 9261 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend; 9262 int pic_ext_target = 0; 9263 bfd_signed_vma foff; 9264 uint16_t insn16; 9265 9266 irelend = internal_relocs + sec->reloc_count; 9267 seq_len = GET_SEQ_LEN (irel->r_addend); 9268 laddr = irel->r_offset; 9269 *insn_len = seq_len; 9270 9271 hi_irelfn = 9272 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9273 R_NDS32_HI20_RELA, laddr + 4); 9274 lo_irelfn = 9275 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9276 R_NDS32_LO12S0_ORI_RELA, laddr + 8); 9277 9278 if (hi_irelfn == irelend || lo_irelfn == irelend) 9279 { 9280 (*_bfd_error_handler) 9281 ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized" 9282 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 9283 return FALSE; 9284 } 9285 9286 /* Get the value of the symbol referred to by the reloc. */ 9287 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr, 9288 &pic_ext_target); 9289 9290 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 9291 || foff >= CONSERVATIVE_24BIT_S1) 9292 return FALSE; 9293 9294 insn = bfd_getb32 (contents + laddr); 9295 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1) 9296 { 9297 /* Relax to bgezal rt, label ; 17_PCREL 9298 or bltzal rt, label ; 17_PCREL */ 9299 9300 /* Convert to complimentary conditional call. */ 9301 insn = CONVERT_CONDITION_CALL (insn); 9302 bfd_putb32 (insn, contents + irel->r_offset); 9303 9304 *insn_len = 4; 9305 irel->r_info = 9306 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE); 9307 hi_irelfn->r_info = 9308 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE); 9309 lo_irelfn->r_info = 9310 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE); 9311 9312 cond_irelfn = 9313 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9314 R_NDS32_17_PCREL_RELA, laddr); 9315 if (cond_irelfn != irelend) 9316 { 9317 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9318 R_NDS32_17_PCREL_RELA); 9319 cond_irelfn->r_addend = hi_irelfn->r_addend; 9320 } 9321 9322 if (seq_len & 0x2) 9323 { 9324 insn16 = NDS32_NOP16; 9325 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len); 9326 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9327 R_NDS32_INSN16); 9328 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9329 insn_len += 2; 9330 } 9331 } 9332 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1) 9333 { 9334 /* Relax to the following instruction sequence 9335 bltz rt, $1 ; LONGCALL2 9336 jal symbol ; 25_PCREL 9337 $1 */ 9338 *insn_len = 8; 9339 insn = INSN_JAL; 9340 bfd_putb32 (insn, contents + hi_irelfn->r_offset); 9341 9342 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9343 R_NDS32_25_PCREL_RELA); 9344 irel->r_info = 9345 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2); 9346 9347 lo_irelfn->r_info = 9348 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE); 9349 9350 if (seq_len & 0x2) 9351 { 9352 insn16 = NDS32_NOP16; 9353 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len); 9354 lo_irelfn->r_info = 9355 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16); 9356 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9357 insn_len += 2; 9358 } 9359 } 9360 return TRUE; 9361 } 9362 9363 /* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */ 9364 9365 static bfd_boolean 9366 nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9367 Elf_Internal_Rela *internal_relocs, int *insn_len, 9368 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9369 Elf_Internal_Shdr *symtab_hdr) 9370 { 9371 /* There are 3 variations for LONGJUMP1 9372 case 4-4-2; 16-bit bit on, optimize off or optimize for space 9373 sethi ta, hi20(symbol) ; LONGJUMP1/HI20 9374 ori ta, ta, lo12(symbol) ; LO12S0 9375 jr5 ta ; 9376 9377 case 4-4-4; 16-bit off, optimize don't care 9378 sethi ta, hi20(symbol) ; LONGJUMP1/HI20 9379 ori ta, ta, lo12(symbol) ; LO12S0 9380 jr ta ; 9381 9382 case 4-4-4; 16-bit on, optimize for speed 9383 sethi ta, hi20(symbol) ; LONGJUMP1/HI20 9384 ori ta, ta, lo12(symbol) ; LO12S0 9385 jr ta ; */ 9386 9387 /* Get the reloc for the address from which the register is 9388 being loaded. This reloc will tell us which function is 9389 actually being called. */ 9390 9391 bfd_vma laddr; 9392 int seq_len; /* Original length of instruction sequence. */ 9393 int insn16_on; /* 16-bit on/off. */ 9394 uint32_t insn; 9395 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend; 9396 int pic_ext_target = 0; 9397 bfd_signed_vma foff; 9398 uint16_t insn16; 9399 unsigned long reloc; 9400 9401 irelend = internal_relocs + sec->reloc_count; 9402 seq_len = GET_SEQ_LEN (irel->r_addend); 9403 laddr = irel->r_offset; 9404 *insn_len = seq_len; 9405 insn16_on = IS_16BIT_ON (irel->r_addend); 9406 9407 hi_irelfn = 9408 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9409 R_NDS32_HI20_RELA, laddr); 9410 lo_irelfn = 9411 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9412 R_NDS32_LO12S0_ORI_RELA, laddr + 4); 9413 if (hi_irelfn == irelend || lo_irelfn == irelend) 9414 { 9415 (*_bfd_error_handler) 9416 ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized" 9417 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 9418 return FALSE; 9419 } 9420 9421 /* Get the value of the symbol referred to by the reloc. */ 9422 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr, 9423 &pic_ext_target); 9424 9425 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1 9426 || foff < -CONSERVATIVE_24BIT_S1) 9427 return FALSE; 9428 9429 if (insn16_on && foff >= -ACCURATE_8BIT_S1 9430 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2)) 9431 { 9432 /* j8 label */ 9433 /* 16-bit on, but not optimized for speed. */ 9434 reloc = R_NDS32_9_PCREL_RELA; 9435 insn16 = INSN_J8; 9436 bfd_putb16 (insn16, contents + irel->r_offset); 9437 *insn_len = 2; 9438 irel->r_info = 9439 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 9440 } 9441 else 9442 { 9443 /* j label */ 9444 reloc = R_NDS32_25_PCREL_RELA; 9445 insn = INSN_J; 9446 bfd_putb32 (insn, contents + irel->r_offset); 9447 *insn_len = 4; 9448 irel->r_info = 9449 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16); 9450 irel->r_addend = 0; 9451 } 9452 9453 hi_irelfn->r_info = 9454 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc); 9455 lo_irelfn->r_info = 9456 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE); 9457 9458 if ((seq_len & 0x2) && ((*insn_len & 2) == 0)) 9459 { 9460 insn16 = NDS32_NOP16; 9461 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len); 9462 lo_irelfn->r_info = 9463 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), 9464 R_NDS32_INSN16); 9465 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9466 *insn_len += 2; 9467 } 9468 return TRUE; 9469 } 9470 9471 /* Revert condition branch. This function does not check if the input 9472 instruction is condition branch or not. */ 9473 9474 static void 9475 nds32_elf_convert_branch (uint16_t insn16, uint32_t insn, 9476 uint16_t *re_insn16, uint32_t *re_insn) 9477 { 9478 uint32_t comp_insn = 0; 9479 uint16_t comp_insn16 = 0; 9480 9481 if (insn) 9482 { 9483 if (N32_OP6 (insn) == N32_OP6_BR1) 9484 { 9485 /* beqs label. */ 9486 comp_insn = (insn ^ 0x4000) & 0xffffc000; 9487 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5) 9488 { 9489 /* Insn can be contracted to 16-bit implied r5. */ 9490 comp_insn16 = 9491 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38; 9492 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8; 9493 } 9494 } 9495 else if (N32_OP6 (insn) == N32_OP6_BR3) 9496 { 9497 /* bnec $ta, imm11, label. */ 9498 comp_insn = (insn ^ 0x80000) & 0xffffff00; 9499 } 9500 else 9501 { 9502 comp_insn = (insn ^ 0x10000) & 0xffffc000; 9503 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ 9504 || N32_BR2_SUB (insn) == N32_BR2_BNEZ) 9505 { 9506 if (N32_IS_RT3 (insn)) 9507 { 9508 /* Insn can be contracted to 16-bit. */ 9509 comp_insn16 = 9510 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38; 9511 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8; 9512 } 9513 else if (N32_RT5 (insn) == REG_R15) 9514 { 9515 /* Insn can be contracted to 16-bit. */ 9516 comp_insn16 = 9517 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38; 9518 } 9519 } 9520 } 9521 } 9522 else 9523 { 9524 switch ((insn16 & 0xf000) >> 12) 9525 { 9526 case 0xc: 9527 /* beqz38 or bnez38 */ 9528 comp_insn16 = (insn16 ^ 0x0800) & 0xff00; 9529 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ; 9530 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20; 9531 break; 9532 9533 case 0xd: 9534 /* beqs38 or bnes38 */ 9535 comp_insn16 = (insn16 ^ 0x0800) & 0xff00; 9536 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ; 9537 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20) 9538 | (REG_R5 << 15); 9539 break; 9540 9541 case 0xe: 9542 /* beqzS8 or bnezS8 */ 9543 comp_insn16 = (insn16 ^ 0x0100) & 0xff00; 9544 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ; 9545 comp_insn |= REG_R15 << 20; 9546 break; 9547 9548 default: 9549 break; 9550 } 9551 } 9552 if (comp_insn && re_insn) 9553 *re_insn = comp_insn; 9554 if (comp_insn16 && re_insn16) 9555 *re_insn16 = comp_insn16; 9556 } 9557 9558 /* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */ 9559 9560 static bfd_boolean 9561 nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9562 Elf_Internal_Rela *internal_relocs, int *insn_len, 9563 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9564 Elf_Internal_Shdr *symtab_hdr) 9565 { 9566 /* There are 3 variations for LONGJUMP2 9567 case 2-4; 1st insn convertible, 16-bit on, 9568 optimize off or optimize for space 9569 bnes38 rt, ra, $1 ; LONGJUMP2 9570 j label ; 25_PCREL 9571 $1: 9572 9573 case 4-4; 1st insn not convertible 9574 bne rt, ra, $1 ; LONGJUMP2 9575 j label ; 25_PCREL 9576 $1: 9577 9578 case 4-4; 1st insn convertible, 16-bit on, optimize for speed 9579 bne rt, ra, $1 ; LONGJUMP2 9580 j label ; 25_PCREL 9581 $1: */ 9582 9583 /* Get the reloc for the address from which the register is 9584 being loaded. This reloc will tell us which function is 9585 actually being called. */ 9586 9587 bfd_vma laddr; 9588 int seq_len; /* Original length of instruction sequence. */ 9589 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend; 9590 int pic_ext_target = 0, first_size; 9591 unsigned int i; 9592 bfd_signed_vma foff; 9593 uint32_t insn, re_insn = 0; 9594 uint16_t insn16, re_insn16 = 0; 9595 unsigned long reloc, cond_reloc; 9596 9597 enum elf_nds32_reloc_type checked_types[] = 9598 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA }; 9599 9600 irelend = internal_relocs + sec->reloc_count; 9601 seq_len = GET_SEQ_LEN (irel->r_addend); 9602 laddr = irel->r_offset; 9603 *insn_len = seq_len; 9604 first_size = (seq_len == 6) ? 2 : 4; 9605 9606 i2_irelfn = 9607 find_relocs_at_address_addr (irel, internal_relocs, 9608 irelend, R_NDS32_25_PCREL_RELA, 9609 laddr + first_size); 9610 9611 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++) 9612 { 9613 cond_irelfn = 9614 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9615 checked_types[i], laddr); 9616 if (cond_irelfn != irelend) 9617 break; 9618 } 9619 9620 if (i2_irelfn == irelend || cond_irelfn == irelend) 9621 { 9622 (*_bfd_error_handler) 9623 ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized" 9624 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 9625 return FALSE; 9626 } 9627 9628 /* Get the value of the symbol referred to by the reloc. */ 9629 foff = 9630 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr, 9631 &pic_ext_target); 9632 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1 9633 || foff >= CONSERVATIVE_16BIT_S1) 9634 return FALSE; 9635 9636 /* Get the all corresponding instructions. */ 9637 if (first_size == 4) 9638 { 9639 insn = bfd_getb32 (contents + laddr); 9640 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn); 9641 } 9642 else 9643 { 9644 insn16 = bfd_getb16 (contents + laddr); 9645 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn); 9646 } 9647 9648 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size) 9649 && foff < ACCURATE_8BIT_S1 - first_size) 9650 { 9651 if (first_size == 4) 9652 { 9653 /* Don't convert it to 16-bit now, keep this as relaxable for 9654 ``label reloc; INSN16''. */ 9655 9656 /* Save comp_insn32 to buffer. */ 9657 bfd_putb32 (re_insn, contents + irel->r_offset); 9658 *insn_len = 4; 9659 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ? 9660 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA; 9661 cond_reloc = R_NDS32_INSN16; 9662 } 9663 else 9664 { 9665 bfd_putb16 (re_insn16, contents + irel->r_offset); 9666 *insn_len = 2; 9667 reloc = R_NDS32_9_PCREL_RELA; 9668 cond_reloc = R_NDS32_NONE; 9669 } 9670 } 9671 else if (N32_OP6 (re_insn) == N32_OP6_BR1 9672 && (foff >= -(ACCURATE_14BIT_S1 - first_size) 9673 && foff < ACCURATE_14BIT_S1 - first_size)) 9674 { 9675 /* beqs label ; 15_PCREL */ 9676 bfd_putb32 (re_insn, contents + irel->r_offset); 9677 *insn_len = 4; 9678 reloc = R_NDS32_15_PCREL_RELA; 9679 cond_reloc = R_NDS32_NONE; 9680 } 9681 else if (N32_OP6 (re_insn) == N32_OP6_BR2 9682 && foff >= -CONSERVATIVE_16BIT_S1 9683 && foff < CONSERVATIVE_16BIT_S1) 9684 { 9685 /* beqz label ; 17_PCREL */ 9686 bfd_putb32 (re_insn, contents + irel->r_offset); 9687 *insn_len = 4; 9688 reloc = R_NDS32_17_PCREL_RELA; 9689 cond_reloc = R_NDS32_NONE; 9690 } 9691 else 9692 return FALSE; 9693 9694 /* Set all relocations. */ 9695 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc); 9696 irel->r_addend = i2_irelfn->r_addend; 9697 9698 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), 9699 cond_reloc); 9700 cond_irelfn->r_addend = 0; 9701 9702 if ((seq_len ^ *insn_len ) & 0x2) 9703 { 9704 insn16 = NDS32_NOP16; 9705 bfd_putb16 (insn16, contents + irel->r_offset + 4); 9706 i2_irelfn->r_offset = 4; 9707 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), 9708 R_NDS32_INSN16); 9709 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9710 *insn_len += 2; 9711 } 9712 else 9713 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), 9714 R_NDS32_NONE); 9715 return TRUE; 9716 } 9717 9718 /* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */ 9719 9720 static bfd_boolean 9721 nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9722 Elf_Internal_Rela *internal_relocs, int *insn_len, 9723 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9724 Elf_Internal_Shdr *symtab_hdr) 9725 { 9726 /* There are 5 variations for LONGJUMP3 9727 case 1: 2-4-4-2; 1st insn convertible, 16-bit on, 9728 optimize off or optimize for space 9729 bnes38 rt, ra, $1 ; LONGJUMP3 9730 sethi ta, hi20(symbol) ; HI20 9731 ori ta, ta, lo12(symbol) ; LO12S0 9732 jr5 ta ; 9733 $1: ; 9734 9735 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed 9736 bnes38 rt, ra, $1 ; LONGJUMP3 9737 sethi ta, hi20(symbol) ; HI20 9738 ori ta, ta, lo12(symbol) ; LO12S0 9739 jr5 ta ; 9740 $1: ; LABEL 9741 9742 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on, 9743 optimize off or optimize for space 9744 bne rt, ra, $1 ; LONGJUMP3 9745 sethi ta, hi20(symbol) ; HI20 9746 ori ta, ta, lo12(symbol) ; LO12S0 9747 jr5 ta ; 9748 $1: ; 9749 9750 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care 9751 16-bit off if no INSN16 9752 bne rt, ra, $1 ; LONGJUMP3 9753 sethi ta, hi20(symbol) ; HI20 9754 ori ta, ta, lo12(symbol) ; LO12S0 9755 jr ta ; 9756 $1: ; 9757 9758 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed 9759 16-bit off if no INSN16 9760 bne rt, ra, $1 ; LONGJUMP3 9761 sethi ta, hi20(symbol) ; HI20 9762 ori ta, ta, lo12(symbol) ; LO12S0 9763 jr ta ; 9764 $1: ; LABEL */ 9765 9766 /* Get the reloc for the address from which the register is 9767 being loaded. This reloc will tell us which function is 9768 actually being called. */ 9769 enum elf_nds32_reloc_type checked_types[] = 9770 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA }; 9771 9772 int reloc_off = 0, cond_removed = 0, convertible; 9773 bfd_vma laddr; 9774 int seq_len; /* Original length of instruction sequence. */ 9775 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend; 9776 int pic_ext_target = 0, first_size; 9777 unsigned int i; 9778 bfd_signed_vma foff; 9779 uint32_t insn, re_insn = 0; 9780 uint16_t insn16, re_insn16 = 0; 9781 unsigned long reloc, cond_reloc; 9782 9783 irelend = internal_relocs + sec->reloc_count; 9784 seq_len = GET_SEQ_LEN (irel->r_addend); 9785 laddr = irel->r_offset; 9786 *insn_len = seq_len; 9787 9788 convertible = IS_1ST_CONVERT (irel->r_addend); 9789 9790 if (convertible) 9791 first_size = 2; 9792 else 9793 first_size = 4; 9794 9795 /* Get all needed relocations. */ 9796 hi_irelfn = 9797 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9798 R_NDS32_HI20_RELA, laddr + first_size); 9799 lo_irelfn = 9800 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9801 R_NDS32_LO12S0_ORI_RELA, 9802 laddr + first_size + 4); 9803 9804 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++) 9805 { 9806 cond_irelfn = 9807 find_relocs_at_address_addr (irel, internal_relocs, irelend, 9808 checked_types[i], laddr); 9809 if (cond_irelfn != irelend) 9810 break; 9811 } 9812 9813 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend) 9814 { 9815 (*_bfd_error_handler) 9816 ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized" 9817 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 9818 return FALSE; 9819 } 9820 9821 /* Get the value of the symbol referred to by the reloc. */ 9822 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr, 9823 &pic_ext_target); 9824 9825 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 9826 || foff >= CONSERVATIVE_24BIT_S1) 9827 return FALSE; 9828 9829 /* Get the all corresponding instructions. */ 9830 if (first_size == 4) 9831 { 9832 insn = bfd_getb32 (contents + laddr); 9833 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn); 9834 } 9835 else 9836 { 9837 insn16 = bfd_getb16 (contents + laddr); 9838 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn); 9839 } 9840 9841 /* For simplicity of coding, we are going to modify the section 9842 contents, the section relocs, and the BFD symbol table. We 9843 must tell the rest of the code not to free up this 9844 information. It would be possible to instead create a table 9845 of changes which have to be made, as is done in coff-mips.c; 9846 that would be more work, but would require less memory when 9847 the linker is run. */ 9848 9849 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size 9850 && foff < ACCURATE_8BIT_S1 - first_size) 9851 { 9852 if (!(seq_len & 0x2)) 9853 { 9854 /* Don't convert it to 16-bit now, keep this as relaxable 9855 for ``label reloc; INSN1a''6. */ 9856 /* Save comp_insn32 to buffer. */ 9857 bfd_putb32 (re_insn, contents + irel->r_offset); 9858 *insn_len = 4; 9859 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ? 9860 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA; 9861 cond_reloc = R_NDS32_INSN16; 9862 } 9863 else 9864 { 9865 /* Not optimize for speed; convert sequence to 16-bit. */ 9866 /* Save comp_insn16 to buffer. */ 9867 bfd_putb16 (re_insn16, contents + irel->r_offset); 9868 *insn_len = 2; 9869 reloc = R_NDS32_9_PCREL_RELA; 9870 cond_reloc = R_NDS32_NONE; 9871 } 9872 cond_removed = 1; 9873 } 9874 else if (N32_OP6 (re_insn) == N32_OP6_BR1 9875 && (foff >= -(ACCURATE_14BIT_S1 - first_size) 9876 && foff < ACCURATE_14BIT_S1 - first_size)) 9877 { 9878 /* beqs label ; 15_PCREL */ 9879 bfd_putb32 (re_insn, contents + irel->r_offset); 9880 *insn_len = 4; 9881 reloc = R_NDS32_15_PCREL_RELA; 9882 cond_reloc = R_NDS32_NONE; 9883 cond_removed = 1; 9884 } 9885 else if (N32_OP6 (re_insn) == N32_OP6_BR2 9886 && foff >= -CONSERVATIVE_16BIT_S1 9887 && foff < CONSERVATIVE_16BIT_S1) 9888 { 9889 /* beqz label ; 17_PCREL */ 9890 bfd_putb32 (re_insn, contents + irel->r_offset); 9891 *insn_len = 4; 9892 reloc = R_NDS32_17_PCREL_RELA; 9893 cond_reloc = R_NDS32_NONE; 9894 cond_removed = 1; 9895 } 9896 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off 9897 && foff < CONSERVATIVE_24BIT_S1 - reloc_off) 9898 { 9899 /* Relax to one of the following 3 variations 9900 9901 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize 9902 for space 9903 bnes38 rt, $1 ; LONGJUMP2 9904 j label ; 25_PCREL 9905 $1 9906 9907 case 4-4; 1st insn not convertible, others don't care 9908 bne rt, ra, $1 ; LONGJUMP2 9909 j label ; 25_PCREL 9910 $1 9911 9912 case 4-4; 1st insn convertible, 16-bit on, optimize for speed 9913 bne rt, ra, $1 ; LONGJUMP2 9914 j label ; 25_PCREL 9915 $1 */ 9916 9917 /* Offset for first instruction. */ 9918 9919 /* Use j label as second instruction. */ 9920 *insn_len = 4 + first_size; 9921 insn = INSN_J; 9922 bfd_putb32 (insn, contents + hi_irelfn->r_offset); 9923 reloc = R_NDS32_LONGJUMP2; 9924 cond_reloc = R_NDS32_25_PLTREL; 9925 } 9926 else 9927 return FALSE; 9928 9929 if (cond_removed == 1) 9930 { 9931 /* Set all relocations. */ 9932 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc); 9933 irel->r_addend = hi_irelfn->r_addend; 9934 9935 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), 9936 cond_reloc); 9937 cond_irelfn->r_addend = 0; 9938 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9939 R_NDS32_NONE); 9940 } 9941 else 9942 { 9943 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); 9944 irel->r_addend = irel->r_addend; 9945 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), 9946 cond_reloc); 9947 } 9948 9949 if ((seq_len ^ *insn_len ) & 0x2) 9950 { 9951 insn16 = NDS32_NOP16; 9952 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len); 9953 lo_irelfn->r_offset = *insn_len; 9954 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), 9955 R_NDS32_INSN16); 9956 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 9957 *insn_len += 2; 9958 } 9959 else 9960 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), 9961 R_NDS32_NONE); 9962 return TRUE; 9963 } 9964 9965 /* Relax LONGCALL4 relocation for nds32_elf_relax_section. */ 9966 9967 static bfd_boolean 9968 nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 9969 Elf_Internal_Rela *internal_relocs, int *insn_len, 9970 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 9971 Elf_Internal_Shdr *symtab_hdr) 9972 { 9973 /* The pattern for LONGCALL4. Support for function cse. 9974 sethi ta, hi20(symbol) ; LONGCALL4/HI20 9975 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR 9976 jral ta ; PTR_RES/EMPTY/INSN16 */ 9977 9978 bfd_vma laddr; 9979 uint32_t insn; 9980 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel; 9981 Elf_Internal_Rela *irelend; 9982 int pic_ext_target = 0; 9983 bfd_signed_vma foff; 9984 9985 irelend = internal_relocs + sec->reloc_count; 9986 laddr = irel->r_offset; 9987 9988 /* Get the reloc for the address from which the register is 9989 being loaded. This reloc will tell us which function is 9990 actually being called. */ 9991 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 9992 R_NDS32_HI20_RELA, laddr); 9993 9994 if (hi_irel == irelend) 9995 { 9996 (*_bfd_error_handler) 9997 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized" 9998 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 9999 return FALSE; 10000 } 10001 10002 /* Get the value of the symbol referred to by the reloc. */ 10003 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr, 10004 &pic_ext_target); 10005 10006 /* This condition only happened when symbol is undefined. */ 10007 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 10008 || foff >= CONSERVATIVE_24BIT_S1) 10009 return FALSE; 10010 10011 /* Relax to: jal symbol; 25_PCREL */ 10012 /* For simplicity of coding, we are going to modify the section 10013 contents, the section relocs, and the BFD symbol table. We 10014 must tell the rest of the code not to free up this 10015 information. It would be possible to instead create a table 10016 of changes which have to be made, as is done in coff-mips.c; 10017 that would be more work, but would require less memory when 10018 the linker is run. */ 10019 10020 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10021 R_NDS32_PTR_RESOLVED, irel->r_addend); 10022 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10023 R_NDS32_EMPTY, irel->r_addend); 10024 10025 if (ptr_irel == irelend || em_irel == irelend) 10026 { 10027 (*_bfd_error_handler) 10028 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized" 10029 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 10030 return FALSE; 10031 } 10032 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */ 10033 insn = bfd_getb32 (contents + irel->r_addend); 10034 if (insn & 0x80000000) 10035 return FALSE; 10036 10037 /* Replace the long call with a jal. */ 10038 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), 10039 R_NDS32_25_PCREL_RELA); 10040 ptr_irel->r_addend = 1; 10041 10042 /* We don't resolve this here but resolve it in relocate_section. */ 10043 insn = INSN_JAL; 10044 bfd_putb32 (insn, contents + em_irel->r_offset); 10045 10046 irel->r_info = 10047 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10048 10049 /* If there is function cse, HI20 can not remove now. */ 10050 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10051 R_NDS32_LONGCALL4, laddr); 10052 if (call_irel == irelend) 10053 { 10054 *insn_len = 0; 10055 hi_irel->r_info = 10056 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE); 10057 } 10058 10059 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10060 R_NDS32_INSN16, irel->r_addend); 10061 if (insn_irel != irelend) 10062 insn_irel->r_info = 10063 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10064 10065 return TRUE; 10066 } 10067 10068 /* Relax LONGCALL5 relocation for nds32_elf_relax_section. */ 10069 10070 static bfd_boolean 10071 nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10072 Elf_Internal_Rela *internal_relocs, int *insn_len, 10073 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 10074 Elf_Internal_Shdr *symtab_hdr) 10075 { 10076 /* The pattern for LONGCALL5. 10077 bltz rt, .L1 ; LONGCALL5/17_PCREL 10078 jal symbol ; 25_PCREL 10079 .L1: */ 10080 10081 bfd_vma laddr; 10082 uint32_t insn; 10083 Elf_Internal_Rela *cond_irel, *irelend; 10084 int pic_ext_target = 0; 10085 bfd_signed_vma foff; 10086 10087 irelend = internal_relocs + sec->reloc_count; 10088 laddr = irel->r_offset; 10089 insn = bfd_getb32 (contents + laddr); 10090 10091 /* Get the reloc for the address from which the register is 10092 being loaded. This reloc will tell us which function is 10093 actually being called. */ 10094 cond_irel = 10095 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10096 R_NDS32_25_PCREL_RELA, irel->r_addend); 10097 if (cond_irel == irelend) 10098 { 10099 (*_bfd_error_handler) 10100 ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized" 10101 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 10102 return FALSE; 10103 } 10104 10105 /* Get the value of the symbol referred to by the reloc. */ 10106 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr, 10107 &pic_ext_target); 10108 10109 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1 10110 || foff >= CONSERVATIVE_16BIT_S1) 10111 return FALSE; 10112 10113 /* Relax to bgezal rt, label ; 17_PCREL 10114 or bltzal rt, label ; 17_PCREL */ 10115 10116 /* Convert to complimentary conditional call. */ 10117 insn = CONVERT_CONDITION_CALL (insn); 10118 10119 /* For simplicity of coding, we are going to modify the section 10120 contents, the section relocs, and the BFD symbol table. We 10121 must tell the rest of the code not to free up this 10122 information. It would be possible to instead create a table 10123 of changes which have to be made, as is done in coff-mips.c; 10124 that would be more work, but would require less memory when 10125 the linker is run. */ 10126 10127 /* Modify relocation and contents. */ 10128 cond_irel->r_info = 10129 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA); 10130 10131 /* Replace the long call with a bgezal. */ 10132 bfd_putb32 (insn, contents + cond_irel->r_offset); 10133 *insn_len = 0; 10134 10135 /* Clean unnessary relocations. */ 10136 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10137 10138 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10139 R_NDS32_17_PCREL_RELA, laddr); 10140 cond_irel->r_info = 10141 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE); 10142 10143 return TRUE; 10144 } 10145 10146 /* Relax LONGCALL6 relocation for nds32_elf_relax_section. */ 10147 10148 static bfd_boolean 10149 nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10150 Elf_Internal_Rela *internal_relocs, int *insn_len, 10151 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 10152 Elf_Internal_Shdr *symtab_hdr) 10153 { 10154 /* The pattern for LONGCALL6. 10155 bltz rt, .L1 ; LONGCALL6/17_PCREL 10156 sethi ta, hi20(symbol) ; HI20/PTR 10157 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR 10158 jral ta ; PTR_RES/EMPTY/INSN16 10159 .L1 */ 10160 10161 bfd_vma laddr; 10162 uint32_t insn; 10163 Elf_Internal_Rela *em_irel, *cond_irel, *irelend; 10164 int pic_ext_target = 0; 10165 bfd_signed_vma foff; 10166 10167 irelend = internal_relocs + sec->reloc_count; 10168 laddr = irel->r_offset; 10169 10170 /* Get the reloc for the address from which the register is 10171 being loaded. This reloc will tell us which function is 10172 actually being called. */ 10173 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10174 R_NDS32_EMPTY, irel->r_addend); 10175 10176 if (em_irel == irelend) 10177 { 10178 (*_bfd_error_handler) 10179 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized" 10180 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 10181 return FALSE; 10182 } 10183 10184 /* Get the value of the symbol referred to by the reloc. */ 10185 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr, 10186 &pic_ext_target); 10187 10188 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 10189 || foff >= CONSERVATIVE_24BIT_S1) 10190 return FALSE; 10191 10192 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */ 10193 insn = bfd_getb32 (contents + irel->r_addend); 10194 if (insn & 0x80000000) 10195 return FALSE; 10196 10197 insn = bfd_getb32 (contents + laddr); 10198 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1) 10199 { 10200 /* Relax to bgezal rt, label ; 17_PCREL 10201 or bltzal rt, label ; 17_PCREL */ 10202 10203 /* Convert to complimentary conditional call. */ 10204 *insn_len = 0; 10205 insn = CONVERT_CONDITION_CALL (insn); 10206 bfd_putb32 (insn, contents + em_irel->r_offset); 10207 10208 em_irel->r_info = 10209 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA); 10210 10211 /* Set resolved relocation. */ 10212 cond_irel = 10213 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10214 R_NDS32_PTR_RESOLVED, irel->r_addend); 10215 if (cond_irel == irelend) 10216 { 10217 (*_bfd_error_handler) 10218 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized" 10219 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 10220 return FALSE; 10221 } 10222 cond_irel->r_addend = 1; 10223 10224 /* Clear relocations. */ 10225 10226 irel->r_info = 10227 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10228 10229 cond_irel = 10230 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10231 R_NDS32_17_PCREL_RELA, laddr); 10232 if (cond_irel != irelend) 10233 cond_irel->r_info = 10234 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE); 10235 10236 cond_irel = 10237 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10238 R_NDS32_INSN16, irel->r_addend); 10239 if (cond_irel != irelend) 10240 cond_irel->r_info = 10241 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE); 10242 10243 } 10244 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1) 10245 { 10246 /* Relax to the following instruction sequence 10247 bltz rt, .L1 ; LONGCALL2/17_PCREL 10248 jal symbol ; 25_PCREL/PTR_RES 10249 .L1 */ 10250 *insn_len = 4; 10251 /* Convert instruction. */ 10252 insn = INSN_JAL; 10253 bfd_putb32 (insn, contents + em_irel->r_offset); 10254 10255 /* Convert relocations. */ 10256 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), 10257 R_NDS32_25_PCREL_RELA); 10258 irel->r_info = 10259 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5); 10260 10261 /* Set resolved relocation. */ 10262 cond_irel = 10263 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10264 R_NDS32_PTR_RESOLVED, irel->r_addend); 10265 if (cond_irel == irelend) 10266 { 10267 (*_bfd_error_handler) 10268 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized" 10269 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 10270 return FALSE; 10271 } 10272 cond_irel->r_addend = 1; 10273 10274 cond_irel = 10275 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10276 R_NDS32_INSN16, irel->r_addend); 10277 if (cond_irel != irelend) 10278 cond_irel->r_info = 10279 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE); 10280 } 10281 return TRUE; 10282 } 10283 10284 /* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */ 10285 10286 static bfd_boolean 10287 nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10288 Elf_Internal_Rela *internal_relocs, int *insn_len, 10289 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 10290 Elf_Internal_Shdr *symtab_hdr) 10291 { 10292 /* The pattern for LONGJUMP4. 10293 sethi ta, hi20(symbol) ; LONGJUMP4/HI20 10294 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR 10295 jr ta ; PTR_RES/INSN16/EMPTY */ 10296 10297 bfd_vma laddr; 10298 int seq_len; /* Original length of instruction sequence. */ 10299 uint32_t insn; 10300 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend; 10301 int pic_ext_target = 0; 10302 bfd_signed_vma foff; 10303 10304 irelend = internal_relocs + sec->reloc_count; 10305 seq_len = GET_SEQ_LEN (irel->r_addend); 10306 laddr = irel->r_offset; 10307 *insn_len = seq_len; 10308 10309 /* Get the reloc for the address from which the register is 10310 being loaded. This reloc will tell us which function is 10311 actually being called. */ 10312 10313 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10314 R_NDS32_HI20_RELA, laddr); 10315 10316 if (hi_irel == irelend) 10317 { 10318 (*_bfd_error_handler) 10319 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized" 10320 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 10321 return FALSE; 10322 } 10323 10324 /* Get the value of the symbol referred to by the reloc. */ 10325 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr, 10326 &pic_ext_target); 10327 10328 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1 10329 || foff < -CONSERVATIVE_24BIT_S1) 10330 return FALSE; 10331 10332 /* Convert it to "j label", it may be converted to j8 in the final 10333 pass of relaxation. Therefore, we do not consider this currently. */ 10334 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10335 R_NDS32_PTR_RESOLVED, irel->r_addend); 10336 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10337 R_NDS32_EMPTY, irel->r_addend); 10338 10339 if (ptr_irel == irelend || em_irel == irelend) 10340 { 10341 (*_bfd_error_handler) 10342 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized" 10343 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 10344 return FALSE; 10345 } 10346 10347 em_irel->r_info = 10348 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA); 10349 ptr_irel->r_addend = 1; 10350 10351 /* Write instruction. */ 10352 insn = INSN_J; 10353 bfd_putb32 (insn, contents + em_irel->r_offset); 10354 10355 /* Clear relocations. */ 10356 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10357 10358 /* If there is function cse, HI20 can not remove now. */ 10359 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10360 R_NDS32_LONGJUMP4, laddr); 10361 if (call_irel == irelend) 10362 { 10363 *insn_len = 0; 10364 hi_irel->r_info = 10365 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE); 10366 } 10367 10368 return TRUE; 10369 } 10370 10371 /* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */ 10372 10373 static bfd_boolean 10374 nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10375 Elf_Internal_Rela *internal_relocs, int *insn_len, 10376 int *seq_len, bfd_byte *contents, 10377 Elf_Internal_Sym *isymbuf, 10378 Elf_Internal_Shdr *symtab_hdr) 10379 { 10380 /* There are 2 variations for LONGJUMP5 10381 case 2-4; 1st insn convertible, 16-bit on. 10382 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16 10383 j label ; 25_PCREL/INSN16 10384 $1: 10385 10386 case 4-4; 1st insn not convertible 10387 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16 10388 j label ; 25_PCREL/INSN16 10389 .L1: */ 10390 10391 bfd_vma laddr; 10392 Elf_Internal_Rela *cond_irel, *irelend; 10393 int pic_ext_target = 0; 10394 unsigned int i; 10395 bfd_signed_vma foff; 10396 uint32_t insn, re_insn = 0; 10397 uint16_t insn16, re_insn16 = 0; 10398 unsigned long reloc; 10399 10400 enum elf_nds32_reloc_type checked_types[] = 10401 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA, 10402 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 }; 10403 10404 irelend = internal_relocs + sec->reloc_count; 10405 laddr = irel->r_offset; 10406 10407 /* Get the reloc for the address from which the register is 10408 being loaded. This reloc will tell us which function is 10409 actually being called. */ 10410 10411 cond_irel = 10412 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10413 R_NDS32_25_PCREL_RELA, irel->r_addend); 10414 if (cond_irel == irelend) 10415 { 10416 (*_bfd_error_handler) 10417 ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized" 10418 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 10419 return FALSE; 10420 } 10421 10422 /* Get the value of the symbol referred to by the reloc. */ 10423 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr, 10424 &pic_ext_target); 10425 10426 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1 10427 || foff >= CONSERVATIVE_16BIT_S1) 10428 return FALSE; 10429 10430 /* Get the all corresponding instructions. */ 10431 insn = bfd_getb32 (contents + laddr); 10432 /* Check instruction size. */ 10433 if (insn & 0x80000000) 10434 { 10435 *seq_len = 0; 10436 insn16 = insn >> 16; 10437 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn); 10438 } 10439 else 10440 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn); 10441 10442 if (N32_OP6 (re_insn) == N32_OP6_BR1 10443 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1)) 10444 { 10445 /* beqs label ; 15_PCREL. */ 10446 bfd_putb32 (re_insn, contents + cond_irel->r_offset); 10447 reloc = R_NDS32_15_PCREL_RELA; 10448 } 10449 else if (N32_OP6 (re_insn) == N32_OP6_BR2 10450 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1) 10451 { 10452 /* beqz label ; 17_PCREL. */ 10453 bfd_putb32 (re_insn, contents + cond_irel->r_offset); 10454 reloc = R_NDS32_17_PCREL_RELA; 10455 } 10456 else if ( N32_OP6 (re_insn) == N32_OP6_BR3 10457 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1) 10458 { 10459 /* beqc label ; 9_PCREL. */ 10460 bfd_putb32 (re_insn, contents + cond_irel->r_offset); 10461 reloc = R_NDS32_WORD_9_PCREL_RELA; 10462 } 10463 else 10464 return FALSE; 10465 10466 /* Set all relocations. */ 10467 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc); 10468 10469 /* Clean relocations. */ 10470 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10471 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++) 10472 { 10473 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10474 checked_types[i], laddr); 10475 if (cond_irel != irelend) 10476 { 10477 if (*seq_len == 0 10478 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16)) 10479 { 10480 /* If the branch instruction is 2 byte, it cannot remove 10481 directly. Only convert it to nop16 and remove it after 10482 checking alignment issue. */ 10483 insn16 = NDS32_NOP16; 10484 bfd_putb16 (insn16, contents + laddr); 10485 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 10486 } 10487 else 10488 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), 10489 R_NDS32_NONE); 10490 } 10491 } 10492 *insn_len = 0; 10493 10494 return TRUE; 10495 } 10496 10497 /* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */ 10498 10499 static bfd_boolean 10500 nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10501 Elf_Internal_Rela *internal_relocs, int *insn_len, 10502 int *seq_len, bfd_byte *contents, 10503 Elf_Internal_Sym *isymbuf, 10504 Elf_Internal_Shdr *symtab_hdr) 10505 { 10506 /* There are 5 variations for LONGJUMP6 10507 case : 2-4-4-4; 1st insn convertible, 16-bit on. 10508 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16 10509 sethi ta, hi20(symbol) ; HI20/PTR 10510 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR 10511 jr ta ; PTR_RES/INSN16/EMPTY 10512 .L1: 10513 10514 case : 4-4-4-4; 1st insn not convertible, 16-bit on. 10515 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16 10516 sethi ta, hi20(symbol) ; HI20/PTR 10517 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR 10518 jr ta ; PTR_RES/INSN16/EMPTY 10519 .L1: */ 10520 10521 enum elf_nds32_reloc_type checked_types[] = 10522 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA, 10523 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 }; 10524 10525 int reloc_off = 0, cond_removed = 0; 10526 bfd_vma laddr; 10527 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel; 10528 int pic_ext_target = 0; 10529 unsigned int i; 10530 bfd_signed_vma foff; 10531 uint32_t insn, re_insn = 0; 10532 uint16_t insn16, re_insn16 = 0; 10533 unsigned long reloc; 10534 10535 irelend = internal_relocs + sec->reloc_count; 10536 laddr = irel->r_offset; 10537 10538 /* Get the reloc for the address from which the register is 10539 being loaded. This reloc will tell us which function is 10540 actually being called. */ 10541 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10542 R_NDS32_EMPTY, irel->r_addend); 10543 10544 if (em_irel == irelend) 10545 { 10546 (*_bfd_error_handler) 10547 ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized" 10548 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 10549 return FALSE; 10550 } 10551 10552 /* Get the value of the symbol referred to by the reloc. */ 10553 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr, 10554 &pic_ext_target); 10555 10556 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1 10557 || foff >= CONSERVATIVE_24BIT_S1) 10558 return FALSE; 10559 10560 insn = bfd_getb32 (contents + laddr); 10561 /* Check instruction size. */ 10562 if (insn & 0x80000000) 10563 { 10564 *seq_len = 0; 10565 insn16 = insn >> 16; 10566 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn); 10567 } 10568 else 10569 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn); 10570 10571 /* For simplicity of coding, we are going to modify the section 10572 contents, the section relocs, and the BFD symbol table. We 10573 must tell the rest of the code not to free up this 10574 information. It would be possible to instead create a table 10575 of changes which have to be made, as is done in coff-mips.c; 10576 that would be more work, but would require less memory when 10577 the linker is run. */ 10578 10579 if (N32_OP6 (re_insn) == N32_OP6_BR1 10580 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1)) 10581 { 10582 /* beqs label ; 15_PCREL */ 10583 bfd_putb32 (re_insn, contents + em_irel->r_offset); 10584 reloc = R_NDS32_15_PCREL_RELA; 10585 cond_removed = 1; 10586 } 10587 else if (N32_OP6 (re_insn) == N32_OP6_BR2 10588 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1) 10589 { 10590 /* beqz label ; 17_PCREL */ 10591 bfd_putb32 (re_insn, contents + em_irel->r_offset); 10592 reloc = R_NDS32_17_PCREL_RELA; 10593 cond_removed = 1; 10594 } 10595 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off 10596 && foff < CONSERVATIVE_24BIT_S1 - reloc_off) 10597 { 10598 /* Relax to one of the following 2 variations 10599 10600 case 2-4; 1st insn convertible, 16-bit on. 10601 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16 10602 j label ; 25_PCREL/INSN16 10603 $1: 10604 10605 case 4-4; 1st insn not convertible 10606 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16 10607 j label ; 25_PCREL/INSN16 10608 .L1: */ 10609 10610 /* Use j label as second instruction. */ 10611 insn = INSN_J; 10612 reloc = R_NDS32_25_PCREL_RELA; 10613 bfd_putb32 (insn, contents + em_irel->r_offset); 10614 } 10615 else 10616 return FALSE; 10617 10618 /* Set all relocations. */ 10619 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc); 10620 10621 cond_irel = 10622 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10623 R_NDS32_PTR_RESOLVED, em_irel->r_offset); 10624 cond_irel->r_addend = 1; 10625 10626 /* Use INSN16 of first branch instruction to distinguish if keeping 10627 INSN16 of final instruction or not. */ 10628 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10629 R_NDS32_INSN16, irel->r_offset); 10630 if (insn_irel == irelend) 10631 { 10632 /* Clean the final INSN16. */ 10633 insn_irel = 10634 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10635 R_NDS32_INSN16, em_irel->r_offset); 10636 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), 10637 R_NDS32_NONE); 10638 } 10639 10640 if (cond_removed == 1) 10641 { 10642 *insn_len = 0; 10643 10644 /* Clear relocations. */ 10645 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10646 10647 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++) 10648 { 10649 cond_irel = 10650 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10651 checked_types[i], laddr); 10652 if (cond_irel != irelend) 10653 { 10654 if (*seq_len == 0 10655 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16)) 10656 { 10657 /* If the branch instruction is 2 byte, it cannot remove 10658 directly. Only convert it to nop16 and remove it after 10659 checking alignment issue. */ 10660 insn16 = NDS32_NOP16; 10661 bfd_putb16 (insn16, contents + laddr); 10662 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 10663 } 10664 else 10665 cond_irel->r_info = 10666 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE); 10667 } 10668 } 10669 } 10670 else 10671 { 10672 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 10673 R_NDS32_LONGJUMP5); 10674 } 10675 10676 return TRUE; 10677 } 10678 10679 /* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */ 10680 10681 static bfd_boolean 10682 nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 10683 Elf_Internal_Rela *internal_relocs, int *insn_len, 10684 int *seq_len, bfd_byte *contents, 10685 Elf_Internal_Sym *isymbuf, 10686 Elf_Internal_Shdr *symtab_hdr) 10687 { 10688 /* There are 2 variations for LONGJUMP5 10689 case 2-4; 1st insn convertible, 16-bit on. 10690 movi55 ta, imm11 ; LONGJUMP7/INSN16 10691 beq rt, ta, label ; 15_PCREL 10692 10693 case 4-4; 1st insn not convertible 10694 movi55 ta, imm11 ; LONGJUMP7/INSN16 10695 beq rt, ta, label ; 15_PCREL */ 10696 10697 bfd_vma laddr; 10698 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel; 10699 int pic_ext_target = 0; 10700 bfd_signed_vma foff; 10701 uint32_t insn, re_insn = 0; 10702 uint16_t insn16; 10703 uint32_t imm11; 10704 10705 irelend = internal_relocs + sec->reloc_count; 10706 laddr = irel->r_offset; 10707 10708 /* Get the reloc for the address from which the register is 10709 being loaded. This reloc will tell us which function is 10710 actually being called. */ 10711 10712 cond_irel = 10713 find_relocs_at_address_addr (irel, internal_relocs, irelend, 10714 R_NDS32_15_PCREL_RELA, irel->r_addend); 10715 if (cond_irel == irelend) 10716 { 10717 (*_bfd_error_handler) 10718 ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized" 10719 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 10720 return FALSE; 10721 } 10722 10723 /* Get the value of the symbol referred to by the reloc. */ 10724 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr, 10725 &pic_ext_target); 10726 10727 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1 10728 || foff >= CONSERVATIVE_8BIT_S1) 10729 return FALSE; 10730 10731 /* Get the first instruction for its size. */ 10732 insn = bfd_getb32 (contents + laddr); 10733 if (insn & 0x80000000) 10734 { 10735 *seq_len = 0; 10736 /* Get the immediate from movi55. */ 10737 imm11 = N16_IMM5S (insn >> 16); 10738 } 10739 else 10740 { 10741 /* Get the immediate from movi. */ 10742 imm11 = N32_IMM20S (insn); 10743 } 10744 10745 /* Get the branch instruction. */ 10746 insn = bfd_getb32 (contents + irel->r_addend); 10747 /* Convert instruction to BR3. */ 10748 if ((insn >> 14) & 0x1) 10749 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0); 10750 else 10751 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0); 10752 10753 bfd_putb32 (re_insn, contents + cond_irel->r_offset); 10754 10755 /* Set all relocations. */ 10756 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), 10757 R_NDS32_WORD_9_PCREL_RELA); 10758 10759 /* Clean relocations. */ 10760 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10761 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10762 R_NDS32_INSN16, irel->r_offset); 10763 if (insn_irel != irelend) 10764 { 10765 if (*seq_len == 0) 10766 { 10767 /* If the first insntruction is 16bit, convert it to nop16. */ 10768 insn16 = NDS32_NOP16; 10769 bfd_putb16 (insn16, contents + laddr); 10770 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG; 10771 } 10772 else 10773 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), 10774 R_NDS32_NONE); 10775 } 10776 *insn_len = 0; 10777 10778 return TRUE; 10779 } 10780 10781 #define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f) 10782 10783 /* Relax LOADSTORE relocation for nds32_elf_relax_section. */ 10784 10785 static bfd_boolean 10786 nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd, 10787 asection *sec, Elf_Internal_Rela *irel, 10788 Elf_Internal_Rela *internal_relocs, int *insn_len, 10789 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 10790 Elf_Internal_Shdr *symtab_hdr, int load_store_relax) 10791 { 10792 int eliminate_sethi = 0, range_type; 10793 unsigned int i; 10794 bfd_vma local_sda, laddr; 10795 int seq_len; /* Original length of instruction sequence. */ 10796 uint32_t insn; 10797 Elf_Internal_Rela *hi_irelfn = NULL, *irelend; 10798 bfd_vma access_addr = 0; 10799 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */ 10800 enum elf_nds32_reloc_type checked_types[] = 10801 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20, 10802 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20, 10803 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20, 10804 R_NDS32_TLS_LE_HI20 10805 }; 10806 10807 irelend = internal_relocs + sec->reloc_count; 10808 seq_len = GET_SEQ_LEN (irel->r_addend); 10809 laddr = irel->r_offset; 10810 *insn_len = seq_len; 10811 10812 /* Get the high part relocation. */ 10813 for (i = 0; i < ARRAY_SIZE (checked_types); i++) 10814 { 10815 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend, 10816 checked_types[i], laddr); 10817 if (hi_irelfn != irelend) 10818 break; 10819 } 10820 10821 if (hi_irelfn == irelend) 10822 { 10823 (*_bfd_error_handler) 10824 ("%B: warning: R_NDS32_LOADSTORE points to unrecognized" 10825 "reloc at 0x%lx.", abfd, (long) irel->r_offset); 10826 return FALSE; 10827 } 10828 10829 range_type = GET_LOADSTORE_RANGE (irel->r_addend); 10830 nds32_elf_final_sda_base (sec->output_section->owner, 10831 link_info, &local_sda, FALSE); 10832 10833 switch (ELF32_R_TYPE (hi_irelfn->r_info)) 10834 { 10835 case R_NDS32_HI20_RELA: 10836 insn = bfd_getb32 (contents + laddr); 10837 access_addr = 10838 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr); 10839 10840 if (range_type == NDS32_LOADSTORE_IMM) 10841 { 10842 struct elf_link_hash_entry *h = NULL; 10843 int indx; 10844 10845 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info) 10846 { 10847 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info; 10848 h = elf_sym_hashes (abfd)[indx]; 10849 } 10850 10851 if ((access_addr < CONSERVATIVE_20BIT) 10852 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0))) 10853 { 10854 eliminate_sethi = 1; 10855 break; 10856 } 10857 10858 /* This is avoid to relax symbol address which is fixed 10859 relocations. Ex: _stack. */ 10860 if (h && bfd_is_abs_section (h->root.u.def.section)) 10861 return FALSE; 10862 } 10863 10864 if (!load_store_relax) 10865 return FALSE; 10866 10867 /* Case for set gp register. */ 10868 if (N32_RT5 (insn) == REG_GP) 10869 break; 10870 10871 if (range_type == NDS32_LOADSTORE_FLOAT_S 10872 || range_type == NDS32_LOADSTORE_FLOAT_S) 10873 { 10874 range_l = sdata_range[0][0]; 10875 range_h = sdata_range[0][1]; 10876 } 10877 else 10878 { 10879 range_l = sdata_range[1][0]; 10880 range_h = sdata_range[1][1]; 10881 } 10882 break; 10883 10884 case R_NDS32_GOT_HI20: 10885 access_addr = 10886 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr); 10887 10888 /* If this symbol is not in .got, the return value will be -1. 10889 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE, 10890 a negative offset is allowed. */ 10891 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT 10892 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT) 10893 eliminate_sethi = 1; 10894 break; 10895 10896 case R_NDS32_PLT_GOTREL_HI20: 10897 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf, 10898 hi_irelfn, symtab_hdr); 10899 10900 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT 10901 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT) 10902 eliminate_sethi = 1; 10903 break; 10904 10905 case R_NDS32_GOTOFF_HI20: 10906 access_addr = 10907 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr); 10908 10909 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT 10910 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT) 10911 eliminate_sethi = 1; 10912 break; 10913 10914 case R_NDS32_GOTPC_HI20: 10915 /* The access_addr must consider r_addend of hi_irel. */ 10916 access_addr = sec->output_section->vma + sec->output_offset 10917 + irel->r_offset + hi_irelfn->r_addend; 10918 10919 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT 10920 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT) 10921 eliminate_sethi = 1; 10922 break; 10923 10924 case R_NDS32_TLS_LE_HI20: 10925 access_addr = 10926 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr); 10927 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); 10928 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); 10929 if ((range_type == NDS32_LOADSTORE_IMM) 10930 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT 10931 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT) 10932 eliminate_sethi = 1; 10933 break; 10934 10935 default: 10936 return FALSE; 10937 } 10938 10939 /* Delete sethi instruction. */ 10940 if (eliminate_sethi == 1 10941 || (local_sda <= access_addr && (access_addr - local_sda) < range_h) 10942 || (local_sda > access_addr && (local_sda - access_addr) <= range_l)) 10943 { 10944 hi_irelfn->r_info = 10945 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE); 10946 irel->r_info = 10947 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 10948 *insn_len = 0; 10949 } 10950 return TRUE; 10951 } 10952 10953 /* Relax LO12 relocation for nds32_elf_relax_section. */ 10954 10955 static void 10956 nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd, 10957 asection *sec, Elf_Internal_Rela *irel, 10958 Elf_Internal_Rela *internal_relocs, bfd_byte *contents, 10959 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr) 10960 { 10961 uint32_t insn; 10962 bfd_vma local_sda, laddr; 10963 unsigned long reloc; 10964 bfd_vma access_addr; 10965 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */ 10966 Elf_Internal_Rela *irelfn = NULL, *irelend; 10967 struct elf_link_hash_entry *h = NULL; 10968 int indx; 10969 10970 /* For SDA base relative relaxation. */ 10971 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 10972 &local_sda, FALSE); 10973 10974 irelend = internal_relocs + sec->reloc_count; 10975 laddr = irel->r_offset; 10976 insn = bfd_getb32 (contents + laddr); 10977 10978 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI) 10979 return; 10980 10981 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 10982 10983 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info) 10984 { 10985 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 10986 h = elf_sym_hashes (abfd)[indx]; 10987 } 10988 10989 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT 10990 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0))) 10991 { 10992 reloc = R_NDS32_20_RELA; 10993 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); 10994 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0); 10995 bfd_putb32 (insn, contents + laddr); 10996 } 10997 /* This is avoid to relax symbol address which is fixed 10998 relocations. Ex: _stack. */ 10999 else if (N32_OP6 (insn) == N32_OP6_ORI 11000 && h && bfd_is_abs_section (h->root.u.def.section)) 11001 return; 11002 else 11003 { 11004 range_l = sdata_range[1][0]; 11005 range_h = sdata_range[1][1]; 11006 switch (ELF32_R_TYPE (irel->r_info)) 11007 { 11008 case R_NDS32_LO12S0_RELA: 11009 reloc = R_NDS32_SDA19S0_RELA; 11010 break; 11011 case R_NDS32_LO12S1_RELA: 11012 reloc = R_NDS32_SDA18S1_RELA; 11013 break; 11014 case R_NDS32_LO12S2_RELA: 11015 reloc = R_NDS32_SDA17S2_RELA; 11016 break; 11017 case R_NDS32_LO12S2_DP_RELA: 11018 range_l = sdata_range[0][0]; 11019 range_h = sdata_range[0][1]; 11020 reloc = R_NDS32_SDA12S2_DP_RELA; 11021 break; 11022 case R_NDS32_LO12S2_SP_RELA: 11023 range_l = sdata_range[0][0]; 11024 range_h = sdata_range[0][1]; 11025 reloc = R_NDS32_SDA12S2_SP_RELA; 11026 break; 11027 default: 11028 return; 11029 } 11030 11031 /* There are range_h and range_l because linker has to promise 11032 all sections move cross one page together. */ 11033 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h) 11034 || (local_sda > access_addr && (local_sda - access_addr) <= range_l)) 11035 { 11036 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP) 11037 { 11038 /* Maybe we should add R_NDS32_INSN16 reloc type here 11039 or manually do some optimization. sethi can't be 11040 eliminated when updating $gp so the relative ori 11041 needs to be preserved. */ 11042 return; 11043 } 11044 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info), 11045 &insn)) 11046 return; 11047 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); 11048 bfd_putb32 (insn, contents + laddr); 11049 11050 irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 11051 R_NDS32_INSN16); 11052 /* SDA17 must keep INSN16 for converting fp_as_gp. */ 11053 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA) 11054 irelfn->r_info = 11055 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE); 11056 11057 } 11058 } 11059 return; 11060 } 11061 11062 /* Relax low part of PIC instruction pattern. */ 11063 11064 static void 11065 nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd, 11066 asection *sec, Elf_Internal_Rela *irel, 11067 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11068 Elf_Internal_Shdr *symtab_hdr) 11069 { 11070 uint32_t insn; 11071 bfd_vma local_sda, laddr; 11072 bfd_signed_vma foff; 11073 unsigned long reloc; 11074 11075 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 11076 &local_sda, FALSE); 11077 laddr = irel->r_offset; 11078 insn = bfd_getb32 (contents + laddr); 11079 11080 if (N32_OP6 (insn) != N32_OP6_ORI) 11081 return; 11082 11083 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12) 11084 { 11085 foff = calculate_got_memory_address (abfd, link_info, irel, 11086 symtab_hdr) - local_sda; 11087 reloc = R_NDS32_GOT20; 11088 } 11089 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12) 11090 { 11091 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel, 11092 symtab_hdr) - local_sda; 11093 reloc = R_NDS32_PLT_GOTREL_LO20; 11094 } 11095 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12) 11096 { 11097 foff = calculate_memory_address (abfd, irel, isymbuf, 11098 symtab_hdr) - local_sda; 11099 reloc = R_NDS32_GOTOFF; 11100 } 11101 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12) 11102 { 11103 foff = local_sda - sec->output_section->vma + sec->output_offset 11104 + irel->r_offset + irel->r_addend; 11105 reloc = R_NDS32_GOTPC20; 11106 } 11107 else 11108 return; 11109 11110 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT)) 11111 { 11112 /* Turn into MOVI. */ 11113 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); 11114 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0); 11115 bfd_putb32 (insn, contents + laddr); 11116 } 11117 } 11118 11119 /* Relax low part of LE TLS instruction pattern. */ 11120 11121 static void 11122 nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd, 11123 Elf_Internal_Rela *irel, 11124 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11125 Elf_Internal_Shdr *symtab_hdr) 11126 { 11127 uint32_t insn; 11128 bfd_vma laddr; 11129 bfd_signed_vma foff; 11130 unsigned long reloc; 11131 11132 laddr = irel->r_offset; 11133 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 11134 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); 11135 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); 11136 insn = bfd_getb32 (contents + laddr); 11137 11138 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT 11139 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT) 11140 { 11141 /* Pattern sethi-ori transform to movi. */ 11142 reloc = R_NDS32_TLS_LE_20; 11143 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc); 11144 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0); 11145 bfd_putb32 (insn, contents + laddr); 11146 } 11147 } 11148 11149 /* Relax LE TLS calculate address instruction pattern. */ 11150 11151 static void 11152 nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd, 11153 asection *sec, Elf_Internal_Rela *irel, 11154 Elf_Internal_Rela *internal_relocs, 11155 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11156 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) 11157 { 11158 /* Local TLS non-pic 11159 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20 11160 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12 11161 add ra, ta, tp ; TLS_LE_ADD */ 11162 11163 uint32_t insn; 11164 bfd_vma laddr; 11165 bfd_signed_vma foff; 11166 Elf_Internal_Rela *i1_irelfn, *irelend; 11167 11168 irelend = internal_relocs + sec->reloc_count; 11169 laddr = irel->r_offset; 11170 insn = bfd_getb32 (contents + laddr); 11171 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 11172 R_NDS32_PTR_RESOLVED); 11173 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 11174 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); 11175 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); 11176 11177 /* The range is +/-16k. */ 11178 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT 11179 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT) 11180 { 11181 /* Transform add to addi. */ 11182 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0); 11183 irel->r_info = 11184 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0); 11185 11186 bfd_putb32 (insn, contents + laddr); 11187 if (i1_irelfn != irelend) 11188 { 11189 i1_irelfn->r_addend |= 1; 11190 *again = TRUE; 11191 } 11192 } 11193 } 11194 11195 /* Relax LE TLS load store instruction pattern. */ 11196 11197 static void 11198 nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd, 11199 asection *sec, Elf_Internal_Rela *irel, 11200 Elf_Internal_Rela *internal_relocs, 11201 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11202 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) 11203 { 11204 11205 uint32_t insn; 11206 bfd_vma laddr; 11207 bfd_signed_vma foff; 11208 Elf_Internal_Rela *i1_irelfn, *irelend; 11209 int success = 0; 11210 11211 irelend = internal_relocs + sec->reloc_count; 11212 laddr = irel->r_offset; 11213 insn = bfd_getb32 (contents + laddr); 11214 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 11215 R_NDS32_PTR_RESOLVED); 11216 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 11217 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL); 11218 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET); 11219 11220 switch ((N32_OP6 (insn) << 8) | (insn & 0xff)) 11221 { 11222 case (N32_OP6_MEM << 8) | N32_MEM_LB: 11223 case (N32_OP6_MEM << 8) | N32_MEM_SB: 11224 case (N32_OP6_MEM << 8) | N32_MEM_LBS: 11225 /* The range is +/-16k. */ 11226 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT 11227 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT) 11228 { 11229 insn = 11230 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5); 11231 irel->r_info = 11232 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0); 11233 success = 1; 11234 break; 11235 } 11236 case (N32_OP6_MEM << 8) | N32_MEM_LH: 11237 case (N32_OP6_MEM << 8) | N32_MEM_SH: 11238 case (N32_OP6_MEM << 8) | N32_MEM_LHS: 11239 /* The range is +/-32k. */ 11240 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1 11241 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1) 11242 { 11243 insn = 11244 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5); 11245 irel->r_info = 11246 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1); 11247 success = 1; 11248 break; 11249 } 11250 case (N32_OP6_MEM << 8) | N32_MEM_LW: 11251 case (N32_OP6_MEM << 8) | N32_MEM_SW: 11252 /* The range is +/-64k. */ 11253 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2 11254 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2) 11255 { 11256 insn = 11257 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5); 11258 irel->r_info = 11259 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2); 11260 success = 1; 11261 break; 11262 } 11263 default: 11264 break; 11265 } 11266 11267 if (success) 11268 { 11269 bfd_putb32 (insn, contents + laddr); 11270 if (i1_irelfn != irelend) 11271 { 11272 i1_irelfn->r_addend |= 1; 11273 *again = TRUE; 11274 } 11275 } 11276 } 11277 11278 /* Relax PTR relocation for nds32_elf_relax_section. */ 11279 11280 static bfd_boolean 11281 nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, 11282 Elf_Internal_Rela *internal_relocs, int *insn_len, 11283 int *seq_len, bfd_byte *contents) 11284 { 11285 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel; 11286 11287 irelend = internal_relocs + sec->reloc_count; 11288 11289 re_irel = 11290 find_relocs_at_address_addr (irel, internal_relocs, irelend, 11291 R_NDS32_PTR_RESOLVED, irel->r_addend); 11292 11293 if (re_irel == irelend) 11294 { 11295 (*_bfd_error_handler) 11296 ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.", 11297 abfd, (long) irel->r_offset); 11298 return FALSE; 11299 } 11300 11301 if (re_irel->r_addend != 1) 11302 return FALSE; 11303 11304 /* Pointed target is relaxed and no longer needs this void *, 11305 change the type to NONE. */ 11306 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 11307 11308 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does 11309 not exist, it means only count 1 and remove it directly. */ 11310 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */ 11311 count_irel = find_relocs_at_address (irel, internal_relocs, irelend, 11312 R_NDS32_PTR_COUNT); 11313 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend, 11314 R_NDS32_PTR); 11315 if (count_irel != irelend) 11316 { 11317 if (--count_irel->r_addend > 0) 11318 return FALSE; 11319 } 11320 11321 if (ptr_irel != irelend) 11322 return FALSE; 11323 11324 /* If the PTR_COUNT is already 0, remove current instruction. */ 11325 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset); 11326 *insn_len = 0; 11327 return TRUE; 11328 } 11329 11330 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */ 11331 11332 static void 11333 nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd, 11334 asection *sec, Elf_Internal_Rela *irel, 11335 Elf_Internal_Rela *internal_relocs, 11336 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11337 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) 11338 { 11339 uint32_t insn; 11340 bfd_signed_vma foff; 11341 Elf_Internal_Rela *i1_irelfn, *irelend; 11342 bfd_vma local_sda, laddr; 11343 11344 irelend = internal_relocs + sec->reloc_count; 11345 laddr = irel->r_offset; 11346 insn = bfd_getb32 (contents + laddr); 11347 11348 /* FIXME: It's a little trouble to turn JRAL5 to JAL since 11349 we need additional space. It might be help if we could 11350 borrow some space from instructions to be eliminated 11351 such as sethi, ori, add. */ 11352 if (insn & 0x80000000) 11353 return; 11354 11355 if (nds32_elf_check_dup_relocs 11356 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF)) 11357 return; 11358 11359 i1_irelfn = 11360 find_relocs_at_address (irel, internal_relocs, irelend, 11361 R_NDS32_PTR_RESOLVED); 11362 11363 /* FIXIT 090606 11364 The boundary should be reduced since the .plt section hasn't 11365 been created and the address of specific entry is still unknown 11366 Maybe the range between the function call and the begin of the 11367 .text section can be used to decide if the .plt is in the range 11368 of function call. */ 11369 11370 if (N32_OP6 (insn) == N32_OP6_ALU1 11371 && N32_SUB5 (insn) == N32_ALU1_ADD) 11372 { 11373 /* Get the value of the symbol referred to by the reloc. */ 11374 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 11375 &local_sda, FALSE); 11376 foff = (bfd_signed_vma) (calculate_plt_memory_address 11377 (abfd, link_info, isymbuf, irel, 11378 symtab_hdr) - local_sda); 11379 /* This condition only happened when symbol is undefined. */ 11380 if (foff == 0) 11381 return; 11382 11383 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT) 11384 return; 11385 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 11386 R_NDS32_PLT_GOTREL_LO19); 11387 /* addi.gp */ 11388 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19)); 11389 } 11390 else if (N32_OP6 (insn) == N32_OP6_JREG 11391 && N32_SUB5 (insn) == N32_JREG_JRAL) 11392 { 11393 /* Get the value of the symbol referred to by the reloc. */ 11394 foff = 11395 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr); 11396 /* This condition only happened when symbol is undefined. */ 11397 if (foff == 0) 11398 return; 11399 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1) 11400 return; 11401 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL); 11402 insn = INSN_JAL; 11403 } 11404 else 11405 return; 11406 11407 bfd_putb32 (insn, contents + laddr); 11408 if (i1_irelfn != irelend) 11409 { 11410 i1_irelfn->r_addend |= 1; 11411 *again = TRUE; 11412 } 11413 } 11414 11415 /* Relax GOT_SUFF relocation for nds32_elf_relax_section. */ 11416 11417 static void 11418 nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd, 11419 asection *sec, Elf_Internal_Rela *irel, 11420 Elf_Internal_Rela *internal_relocs, 11421 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr, 11422 bfd_boolean *again) 11423 { 11424 uint32_t insn; 11425 bfd_signed_vma foff; 11426 Elf_Internal_Rela *i1_irelfn, *irelend; 11427 bfd_vma local_sda, laddr; 11428 11429 irelend = internal_relocs + sec->reloc_count; 11430 laddr = irel->r_offset; 11431 insn = bfd_getb32 (contents + laddr); 11432 if (insn & 0x80000000) 11433 return; 11434 11435 if (nds32_elf_check_dup_relocs 11436 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF)) 11437 return; 11438 11439 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 11440 R_NDS32_PTR_RESOLVED); 11441 11442 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 11443 &local_sda, FALSE); 11444 foff = calculate_got_memory_address (abfd, link_info, irel, 11445 symtab_hdr) - local_sda; 11446 11447 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT) 11448 { 11449 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */ 11450 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3)); 11451 irel->r_info = 11452 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA); 11453 bfd_putb32 (insn, contents + laddr); 11454 if (i1_irelfn != irelend) 11455 { 11456 i1_irelfn->r_addend |= 1; 11457 *again = TRUE; 11458 } 11459 } 11460 } 11461 11462 /* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */ 11463 11464 static void 11465 nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd, 11466 asection *sec, Elf_Internal_Rela *irel, 11467 Elf_Internal_Rela *internal_relocs, 11468 bfd_byte *contents, Elf_Internal_Sym *isymbuf, 11469 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) 11470 { 11471 int opc_insn_gotoff; 11472 uint32_t insn; 11473 bfd_signed_vma foff; 11474 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend; 11475 bfd_vma local_sda, laddr; 11476 11477 irelend = internal_relocs + sec->reloc_count; 11478 laddr = irel->r_offset; 11479 insn = bfd_getb32 (contents + laddr); 11480 11481 if (insn & 0x80000000) 11482 return; 11483 11484 if (nds32_elf_check_dup_relocs 11485 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF)) 11486 return; 11487 11488 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 11489 R_NDS32_PTR_RESOLVED); 11490 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 11491 &local_sda, FALSE); 11492 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 11493 foff = foff - local_sda; 11494 11495 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT) 11496 return; 11497 11498 /* Concatenate opcode and sub-opcode for switch case. 11499 It may be MEM or ALU1. */ 11500 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff); 11501 switch (opc_insn_gotoff) 11502 { 11503 case (N32_OP6_MEM << 8) | N32_MEM_LW: 11504 /* 4-byte aligned. */ 11505 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3)); 11506 irel->r_info = 11507 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA); 11508 break; 11509 case (N32_OP6_MEM << 8) | N32_MEM_SW: 11510 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3)); 11511 irel->r_info = 11512 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA); 11513 break; 11514 case (N32_OP6_MEM << 8) | N32_MEM_LH: 11515 /* 2-byte aligned. */ 11516 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0); 11517 irel->r_info = 11518 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA); 11519 break; 11520 case (N32_OP6_MEM << 8) | N32_MEM_LHS: 11521 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18)); 11522 irel->r_info = 11523 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA); 11524 break; 11525 case (N32_OP6_MEM << 8) | N32_MEM_SH: 11526 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19)); 11527 irel->r_info = 11528 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA); 11529 break; 11530 case (N32_OP6_MEM << 8) | N32_MEM_LB: 11531 /* 1-byte aligned. */ 11532 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0); 11533 irel->r_info = 11534 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); 11535 break; 11536 case (N32_OP6_MEM << 8) | N32_MEM_LBS: 11537 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19)); 11538 irel->r_info = 11539 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); 11540 break; 11541 case (N32_OP6_MEM << 8) | N32_MEM_SB: 11542 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0); 11543 irel->r_info = 11544 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); 11545 break; 11546 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD: 11547 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19)); 11548 irel->r_info = 11549 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA); 11550 break; 11551 default: 11552 return; 11553 } 11554 11555 bfd_putb32 (insn, contents + laddr); 11556 if (i1_irelfn != irelend) 11557 { 11558 i1_irelfn->r_addend |= 1; 11559 *again = TRUE; 11560 } 11561 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend, 11562 R_NDS32_INSN16)) != irelend) 11563 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 11564 11565 } 11566 11567 static bfd_boolean 11568 nds32_relax_adjust_label (bfd *abfd, asection *sec, 11569 Elf_Internal_Rela *internal_relocs, 11570 bfd_byte *contents, 11571 nds32_elf_blank_t **relax_blank_list, 11572 int optimize, int opt_size) 11573 { 11574 /* This code block is used to adjust 4-byte alignment by relax a pair 11575 of instruction a time. 11576 11577 It recognizes three types of relocations. 11578 1. R_NDS32_LABEL - a aligment. 11579 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit. 11580 3. is_16bit_NOP () - remove a 16-bit instruction. */ 11581 11582 /* TODO: It seems currently implementation only support 4-byte aligment. 11583 We should handle any-aligment. */ 11584 11585 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel; 11586 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL; 11587 Elf_Internal_Rela rel_temp; 11588 Elf_Internal_Rela *irelend; 11589 bfd_vma address; 11590 uint16_t insn16; 11591 11592 /* Checking for branch relaxation relies on the relocations to 11593 be sorted on 'r_offset'. This is not guaranteed so we must sort. */ 11594 nds32_insertion_sort (internal_relocs, sec->reloc_count, 11595 sizeof (Elf_Internal_Rela), compar_reloc); 11596 11597 irelend = internal_relocs + sec->reloc_count; 11598 11599 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */ 11600 /* FIXME: Can we generate the right order in assembler? 11601 So we don't have to swapping them here. */ 11602 11603 for (label_rel = internal_relocs, insn_rel = internal_relocs; 11604 label_rel < irelend; label_rel++) 11605 { 11606 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL) 11607 continue; 11608 11609 /* Find the first reloc has the same offset with label_rel. */ 11610 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset) 11611 insn_rel++; 11612 11613 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset; 11614 insn_rel++) 11615 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same 11616 address. */ 11617 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16) 11618 break; 11619 11620 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset 11621 && insn_rel < label_rel) 11622 { 11623 /* Swap the two reloc if the R_NDS32_INSN16 is 11624 before R_NDS32_LABEL. */ 11625 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela)); 11626 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela)); 11627 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela)); 11628 } 11629 } 11630 11631 label_rel = NULL; 11632 insn_rel = NULL; 11633 /* If there were a sequence of R_NDS32_LABEL end up with .align 2 11634 or higher, remove other R_NDS32_LABEL with lower alignment. 11635 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted, 11636 then the R_NDS32_LABEL sequence is broke. */ 11637 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++) 11638 { 11639 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL) 11640 { 11641 if (label_rel == NULL) 11642 { 11643 if (tmp_rel->r_addend < 2) 11644 label_rel = tmp_rel; 11645 continue; 11646 } 11647 else if (tmp_rel->r_addend > 1) 11648 { 11649 /* Remove all LABEL relocation from label_rel to tmp_rel 11650 including relocations with same offset as tmp_rel. */ 11651 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel 11652 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++) 11653 { 11654 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL 11655 && tmp2_rel->r_addend < 2) 11656 tmp2_rel->r_info = 11657 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info), 11658 R_NDS32_NONE); 11659 } 11660 label_rel = NULL; 11661 } 11662 } 11663 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel) 11664 { 11665 /* A new INSN16 which can be converted, so clear label_rel. */ 11666 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs, 11667 irelend, &insn16) 11668 || is_16bit_NOP (abfd, sec, tmp_rel)) 11669 label_rel = NULL; 11670 } 11671 } 11672 11673 label_rel = NULL; 11674 insn_rel = NULL; 11675 /* Optimized for speed and nothing has not been relaxed. 11676 It's time to align labels. 11677 We may convert a 16-bit instruction right before a label to 11678 32-bit, in order to align the label if necessary 11679 all reloc entries has been sorted by r_offset. */ 11680 for (irel = internal_relocs; irel < irelend; irel++) 11681 { 11682 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16 11683 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL) 11684 continue; 11685 11686 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16) 11687 { 11688 /* A new INSN16 found, resize the old one. */ 11689 if (is_convert_32_to_16 11690 (abfd, sec, irel, internal_relocs, irelend, &insn16) 11691 || is_16bit_NOP (abfd, sec, irel)) 11692 { 11693 if (insn_rel) 11694 { 11695 /* Previous INSN16 reloc exists, reduce its 11696 size to 16-bit. */ 11697 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs, 11698 irelend, &insn16)) 11699 { 11700 nds32_elf_write_16 (abfd, contents, insn_rel, 11701 internal_relocs, irelend, insn16); 11702 11703 if (!insert_nds32_elf_blank_recalc_total 11704 (relax_blank_list, insn_rel->r_offset + 2, 2)) 11705 return FALSE; 11706 } 11707 else if (is_16bit_NOP (abfd, sec, insn_rel)) 11708 { 11709 if (!insert_nds32_elf_blank_recalc_total 11710 (relax_blank_list, insn_rel->r_offset, 2)) 11711 return FALSE; 11712 } 11713 insn_rel->r_info = 11714 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE); 11715 } 11716 /* Save the new one for later use. */ 11717 insn_rel = irel; 11718 } 11719 else 11720 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 11721 R_NDS32_NONE); 11722 } 11723 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL) 11724 { 11725 /* Search for label. */ 11726 int force_relax = 0; 11727 11728 /* Label on 16-bit instruction or optimization 11729 needless, just reset this reloc. */ 11730 insn16 = bfd_getb16 (contents + irel->r_offset); 11731 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000))) 11732 { 11733 irel->r_info = 11734 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE); 11735 continue; 11736 } 11737 11738 address = 11739 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list, 11740 irel->r_offset, 1); 11741 11742 if (!insn_rel) 11743 { 11744 /* Check if there is case which can not be aligned. */ 11745 if (irel->r_addend == 2 && address & 0x2) 11746 return FALSE; 11747 continue; 11748 } 11749 11750 /* Try to align this label. */ 11751 11752 if ((irel->r_addend & 0x1f) < 2) 11753 { 11754 /* Check if there is a INSN16 at the same address. 11755 Label_rel always seats before insn_rel after 11756 our sort. */ 11757 11758 /* Search for INSN16 at LABEL location. If INSN16 is at 11759 same location and this LABEL alignment is lower than 2, 11760 the INSN16 can be converted to 2-byte. */ 11761 for (tmp_rel = irel; 11762 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset; 11763 tmp_rel++) 11764 { 11765 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 11766 && (is_convert_32_to_16 11767 (abfd, sec, tmp_rel, internal_relocs, 11768 irelend, &insn16) 11769 || is_16bit_NOP (abfd, sec, tmp_rel))) 11770 { 11771 force_relax = 1; 11772 break; 11773 } 11774 } 11775 } 11776 11777 if (force_relax || irel->r_addend == 1 || address & 0x2) 11778 { 11779 /* Label not aligned. */ 11780 /* Previous reloc exists, reduce its size to 16-bit. */ 11781 if (is_convert_32_to_16 (abfd, sec, insn_rel, 11782 internal_relocs, irelend, &insn16)) 11783 { 11784 nds32_elf_write_16 (abfd, contents, insn_rel, 11785 internal_relocs, irelend, insn16); 11786 11787 if (!insert_nds32_elf_blank_recalc_total 11788 (relax_blank_list, insn_rel->r_offset + 2, 2)) 11789 return FALSE; 11790 } 11791 else if (is_16bit_NOP (abfd, sec, insn_rel)) 11792 { 11793 if (!insert_nds32_elf_blank_recalc_total 11794 (relax_blank_list, insn_rel->r_offset, 2)) 11795 return FALSE; 11796 } 11797 11798 } 11799 /* INSN16 reloc is used. */ 11800 insn_rel = NULL; 11801 } 11802 } 11803 11804 address = 11805 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0); 11806 if (insn_rel && (address & 0x2 || opt_size)) 11807 { 11808 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs, 11809 irelend, &insn16)) 11810 { 11811 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs, 11812 irelend, insn16); 11813 if (!insert_nds32_elf_blank_recalc_total 11814 (relax_blank_list, insn_rel->r_offset + 2, 2)) 11815 return FALSE; 11816 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), 11817 R_NDS32_NONE); 11818 } 11819 else if (is_16bit_NOP (abfd, sec, insn_rel)) 11820 { 11821 if (!insert_nds32_elf_blank_recalc_total 11822 (relax_blank_list, insn_rel->r_offset, 2)) 11823 return FALSE; 11824 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), 11825 R_NDS32_NONE); 11826 } 11827 } 11828 insn_rel = NULL; 11829 return TRUE; 11830 } 11831 11832 /* Pick relaxation round. */ 11833 11834 static int 11835 nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again, 11836 struct elf_nds32_link_hash_table *table, 11837 struct bfd_link_info *link_info) 11838 { 11839 static asection *final_sec, *first_sec = NULL; 11840 static bfd_boolean normal_again = FALSE; 11841 static bfd_boolean set = FALSE; 11842 static bfd_boolean first = TRUE; 11843 int round_table[] = { 11844 NDS32_RELAX_NORMAL_ROUND, 11845 NDS32_RELAX_JUMP_IFC_ROUND, 11846 NDS32_RELAX_EX9_BUILD_ROUND, 11847 NDS32_RELAX_EX9_REPLACE_ROUND, 11848 }; 11849 static int pass = 0; 11850 static int relax_round; 11851 11852 /* The new round. */ 11853 if (init && first_sec == sec) 11854 { 11855 set = TRUE; 11856 normal_again = FALSE; 11857 } 11858 11859 if (first) 11860 { 11861 /* Run an empty run to get the final section. */ 11862 relax_round = NDS32_RELAX_EMPTY_ROUND; 11863 11864 /* It has to enter relax again because we can 11865 not make sure what the final turn is. */ 11866 *again = TRUE; 11867 11868 first = FALSE; 11869 first_sec = sec; 11870 } 11871 11872 if (!set) 11873 { 11874 /* Not reenter yet. */ 11875 final_sec = sec; 11876 return relax_round; 11877 } 11878 11879 relax_round = round_table[pass]; 11880 11881 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again) 11882 normal_again = TRUE; 11883 11884 if (!init && final_sec == sec) 11885 { 11886 switch (relax_round) 11887 { 11888 case NDS32_RELAX_NORMAL_ROUND: 11889 if (!normal_again) 11890 { 11891 /* Normal relaxation done. */ 11892 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON) 11893 { 11894 pass++; 11895 *again = TRUE; 11896 } 11897 else if (table->target_optimize & NDS32_RELAX_EX9_ON) 11898 { 11899 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */ 11900 *again = TRUE; 11901 } 11902 else if (table->ex9_import_file) 11903 { 11904 /* Import ex9 table. */ 11905 if (table->update_ex9_table) 11906 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */ 11907 else 11908 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */ 11909 nds32_elf_ex9_import_table (link_info); 11910 *again = TRUE; 11911 } 11912 } 11913 break; 11914 case NDS32_RELAX_JUMP_IFC_ROUND: 11915 if (!nds32_elf_ifc_finish (link_info)) 11916 (*_bfd_error_handler) (_("error: Jump IFC Fail.")); 11917 if (table->target_optimize & NDS32_RELAX_EX9_ON) 11918 { 11919 pass++; 11920 *again = TRUE; 11921 } 11922 break; 11923 case NDS32_RELAX_EX9_BUILD_ROUND: 11924 nds32_elf_ex9_finish (link_info); 11925 pass++; 11926 *again = TRUE; 11927 break; 11928 case NDS32_RELAX_EX9_REPLACE_ROUND: 11929 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON) 11930 { 11931 /* Do jump IFC optimization again. */ 11932 if (!nds32_elf_ifc_finish (link_info)) 11933 (*_bfd_error_handler) (_("error: Jump IFC Fail.")); 11934 } 11935 break; 11936 default: 11937 break; 11938 } 11939 } 11940 11941 return relax_round; 11942 } 11943 11944 static bfd_boolean 11945 nds32_elf_relax_section (bfd *abfd, asection *sec, 11946 struct bfd_link_info *link_info, bfd_boolean *again) 11947 { 11948 nds32_elf_blank_t *relax_blank_list = NULL; 11949 Elf_Internal_Shdr *symtab_hdr; 11950 Elf_Internal_Rela *internal_relocs; 11951 Elf_Internal_Rela *irel; 11952 Elf_Internal_Rela *irelend; 11953 Elf_Internal_Sym *isymbuf = NULL; 11954 bfd_byte *contents = NULL; 11955 bfd_boolean result = TRUE; 11956 int optimize = 0; 11957 int opt_size = 0; 11958 uint32_t insn; 11959 uint16_t insn16; 11960 11961 /* Target dependnet option. */ 11962 struct elf_nds32_link_hash_table *table; 11963 int load_store_relax; 11964 int relax_round; 11965 11966 relax_blank_list = NULL; 11967 11968 *again = FALSE; 11969 11970 /* Nothing to do for 11971 * relocatable link or 11972 * non-relocatable section or 11973 * non-code section or 11974 * empty content or 11975 * no reloc entry. */ 11976 if (bfd_link_relocatable (link_info) 11977 || (sec->flags & SEC_RELOC) == 0 11978 || (sec->flags & SEC_EXCLUDE) == 1 11979 || (sec->flags & SEC_CODE) == 0 11980 || sec->size == 0) 11981 return TRUE; 11982 11983 /* 09.12.11 Workaround. */ 11984 /* We have to adjust align for R_NDS32_LABEL if needed. 11985 The adjust approach only can fix 2-byte align once. */ 11986 if (sec->alignment_power > 2) 11987 return TRUE; 11988 11989 /* The optimization type to do. */ 11990 11991 table = nds32_elf_hash_table (link_info); 11992 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info); 11993 switch (relax_round) 11994 { 11995 case NDS32_RELAX_JUMP_IFC_ROUND: 11996 /* Here is the entrance of ifc jump relaxation. */ 11997 if (!nds32_elf_ifc_calc (link_info, abfd, sec)) 11998 return FALSE; 11999 nds32_elf_pick_relax (FALSE, sec, again, table, link_info); 12000 return TRUE; 12001 12002 case NDS32_RELAX_EX9_BUILD_ROUND: 12003 /* Here is the entrance of ex9 relaxation. There are two pass of 12004 ex9 relaxation. The one is to traverse all instructions and build 12005 the hash table. The other one is to compare instructions and replace 12006 it by ex9.it. */ 12007 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info)) 12008 return FALSE; 12009 nds32_elf_pick_relax (FALSE, sec, again, table, link_info); 12010 return TRUE; 12011 12012 case NDS32_RELAX_EX9_REPLACE_ROUND: 12013 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec)) 12014 return FALSE; 12015 return TRUE; 12016 12017 case NDS32_RELAX_EMPTY_ROUND: 12018 nds32_elf_pick_relax (FALSE, sec, again, table, link_info); 12019 return TRUE; 12020 12021 case NDS32_RELAX_NORMAL_ROUND: 12022 default: 12023 if (sec->reloc_count == 0) 12024 return TRUE; 12025 break; 12026 } 12027 12028 /* The begining of general relaxation. */ 12029 12030 if (is_SDA_BASE_set == 0) 12031 { 12032 bfd_vma gp; 12033 is_SDA_BASE_set = 1; 12034 nds32_elf_final_sda_base (sec->output_section->owner, link_info, 12035 &gp, FALSE); 12036 relax_range_measurement (abfd); 12037 } 12038 12039 if (is_ITB_BASE_set == 0) 12040 { 12041 /* Set the _ITB_BASE_. */ 12042 if (!nds32_elf_ex9_itb_base (link_info)) 12043 { 12044 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), abfd); 12045 bfd_set_error (bfd_error_bad_value); 12046 } 12047 } 12048 12049 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 12050 /* Relocations MUST be kept in memory, because relaxation adjust them. */ 12051 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, 12052 TRUE /* keep_memory */); 12053 if (internal_relocs == NULL) 12054 goto error_return; 12055 12056 irelend = internal_relocs + sec->reloc_count; 12057 irel = find_relocs_at_address (internal_relocs, internal_relocs, 12058 irelend, R_NDS32_RELAX_ENTRY); 12059 12060 if (irel == irelend) 12061 return TRUE; 12062 12063 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY) 12064 { 12065 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG) 12066 { 12067 nds32_elf_pick_relax (FALSE, sec, again, table, link_info); 12068 return TRUE; 12069 } 12070 12071 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG) 12072 optimize = 1; 12073 12074 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG) 12075 opt_size = 1; 12076 } 12077 12078 load_store_relax = table->load_store_relax; 12079 12080 /* Get symbol table and section content. */ 12081 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE) 12082 || !nds32_get_local_syms (abfd, sec, &isymbuf)) 12083 goto error_return; 12084 12085 /* Do relax loop only when finalize is not done. 12086 Take care of relaxable relocs except INSN16. */ 12087 for (irel = internal_relocs; irel < irelend; irel++) 12088 { 12089 int seq_len; /* Original length of instruction sequence. */ 12090 int insn_len = 0; /* Final length of instruction sequence. */ 12091 bfd_boolean removed; 12092 12093 insn = 0; 12094 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 12095 && (irel->r_addend & 0x1f) >= 2) 12096 optimize = 1; 12097 12098 /* Relocation Types 12099 R_NDS32_LONGCALL1 53 12100 R_NDS32_LONGCALL2 54 12101 R_NDS32_LONGCALL3 55 12102 R_NDS32_LONGJUMP1 56 12103 R_NDS32_LONGJUMP2 57 12104 R_NDS32_LONGJUMP3 58 12105 R_NDS32_LOADSTORE 59 */ 12106 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1 12107 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE) 12108 seq_len = GET_SEQ_LEN (irel->r_addend); 12109 12110 /* Relocation Types 12111 R_NDS32_LONGCALL4 107 12112 R_NDS32_LONGCALL5 108 12113 R_NDS32_LONGCALL6 109 12114 R_NDS32_LONGJUMP4 110 12115 R_NDS32_LONGJUMP5 111 12116 R_NDS32_LONGJUMP6 112 12117 R_NDS32_LONGJUMP7 113 */ 12118 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4 12119 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7) 12120 seq_len = 4; 12121 12122 /* Relocation Types 12123 R_NDS32_LO12S0_RELA 30 12124 R_NDS32_LO12S1_RELA 29 12125 R_NDS32_LO12S2_RELA 28 12126 R_NDS32_LO12S2_SP_RELA 71 12127 R_NDS32_LO12S2_DP_RELA 70 12128 R_NDS32_GOT_LO12 46 12129 R_NDS32_GOTOFF_LO12 50 12130 R_NDS32_PLTREL_LO12 65 12131 R_NDS32_PLT_GOTREL_LO12 67 12132 R_NDS32_17IFC_PCREL_RELA 96 12133 R_NDS32_GOT_SUFF 193 12134 R_NDS32_GOTOFF_SUFF 194 12135 R_NDS32_PLT_GOT_SUFF 195 12136 R_NDS32_MULCALL_SUFF 196 12137 R_NDS32_PTR 197 */ 12138 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA 12139 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA) 12140 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA 12141 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA 12142 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12 12143 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12 12144 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12 12145 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12 12146 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12 12147 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF 12148 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR) 12149 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA 12150 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12 12151 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD 12152 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS) 12153 seq_len = 0; 12154 else 12155 continue; 12156 12157 insn_len = seq_len; 12158 removed = FALSE; 12159 12160 switch (ELF32_R_TYPE (irel->r_info)) 12161 { 12162 case R_NDS32_LONGCALL1: 12163 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs, 12164 &insn_len, contents, isymbuf, 12165 symtab_hdr); 12166 break; 12167 case R_NDS32_LONGCALL2: 12168 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs, 12169 &insn_len, contents, isymbuf, 12170 symtab_hdr); 12171 break; 12172 case R_NDS32_LONGCALL3: 12173 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs, 12174 &insn_len, contents, isymbuf, 12175 symtab_hdr); 12176 break; 12177 case R_NDS32_LONGJUMP1: 12178 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs, 12179 &insn_len, contents, isymbuf, 12180 symtab_hdr); 12181 break; 12182 case R_NDS32_LONGJUMP2: 12183 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs, 12184 &insn_len, contents, isymbuf, 12185 symtab_hdr); 12186 break; 12187 case R_NDS32_LONGJUMP3: 12188 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs, 12189 &insn_len, contents, isymbuf, 12190 symtab_hdr); 12191 break; 12192 case R_NDS32_LONGCALL4: 12193 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs, 12194 &insn_len, contents, isymbuf, 12195 symtab_hdr); 12196 break; 12197 case R_NDS32_LONGCALL5: 12198 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs, 12199 &insn_len, contents, isymbuf, 12200 symtab_hdr); 12201 break; 12202 case R_NDS32_LONGCALL6: 12203 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs, 12204 &insn_len, contents, isymbuf, 12205 symtab_hdr); 12206 break; 12207 case R_NDS32_LONGJUMP4: 12208 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs, 12209 &insn_len, contents, isymbuf, 12210 symtab_hdr); 12211 break; 12212 case R_NDS32_LONGJUMP5: 12213 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs, 12214 &insn_len, &seq_len, contents, 12215 isymbuf, symtab_hdr); 12216 break; 12217 case R_NDS32_LONGJUMP6: 12218 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs, 12219 &insn_len, &seq_len, contents, 12220 isymbuf, symtab_hdr); 12221 break; 12222 case R_NDS32_LONGJUMP7: 12223 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs, 12224 &insn_len, &seq_len, contents, 12225 isymbuf, symtab_hdr); 12226 break; 12227 case R_NDS32_LOADSTORE: 12228 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel, 12229 internal_relocs, &insn_len, 12230 contents, isymbuf, symtab_hdr, 12231 load_store_relax); 12232 break; 12233 case R_NDS32_LO12S0_RELA: 12234 case R_NDS32_LO12S1_RELA: 12235 case R_NDS32_LO12S2_DP_RELA: 12236 case R_NDS32_LO12S2_SP_RELA: 12237 case R_NDS32_LO12S2_RELA: 12238 /* Relax for low part. */ 12239 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs, 12240 contents, isymbuf, symtab_hdr); 12241 12242 /* It is impossible to delete blank, so just continue. */ 12243 continue; 12244 case R_NDS32_GOT_LO12: 12245 case R_NDS32_GOTOFF_LO12: 12246 case R_NDS32_PLTREL_LO12: 12247 case R_NDS32_PLT_GOTREL_LO12: 12248 case R_NDS32_GOTPC_LO12: 12249 /* Relax for PIC gp-relative low part. */ 12250 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents, 12251 isymbuf, symtab_hdr); 12252 12253 /* It is impossible to delete blank, so just continue. */ 12254 continue; 12255 case R_NDS32_TLS_LE_LO12: 12256 /* Relax for LE TLS low part. */ 12257 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents, 12258 isymbuf, symtab_hdr); 12259 12260 /* It is impossible to delete blank, so just continue. */ 12261 continue; 12262 case R_NDS32_TLS_LE_ADD: 12263 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs, 12264 contents, isymbuf, symtab_hdr, again); 12265 /* It is impossible to delete blank, so just continue. */ 12266 continue; 12267 case R_NDS32_TLS_LE_LS: 12268 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs, 12269 contents, isymbuf, symtab_hdr, again); 12270 continue; 12271 case R_NDS32_PTR: 12272 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs, 12273 &insn_len, &seq_len, contents); 12274 break; 12275 case R_NDS32_PLT_GOT_SUFF: 12276 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel, 12277 internal_relocs, contents, 12278 isymbuf, symtab_hdr, again); 12279 /* It is impossible to delete blank, so just continue. */ 12280 continue; 12281 case R_NDS32_GOT_SUFF: 12282 nds32_elf_relax_got_suff (link_info, abfd, sec, irel, 12283 internal_relocs, contents, 12284 symtab_hdr, again); 12285 /* It is impossible to delete blank, so just continue. */ 12286 continue; 12287 case R_NDS32_GOTOFF_SUFF: 12288 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel, 12289 internal_relocs, contents, 12290 isymbuf, symtab_hdr, again); 12291 /* It is impossible to delete blank, so just continue. */ 12292 continue; 12293 default: 12294 continue; 12295 12296 } 12297 if (removed && seq_len - insn_len > 0) 12298 { 12299 if (!insert_nds32_elf_blank 12300 (&relax_blank_list, irel->r_offset + insn_len, 12301 seq_len - insn_len)) 12302 goto error_return; 12303 *again = TRUE; 12304 } 12305 } 12306 12307 calc_nds32_blank_total (relax_blank_list); 12308 12309 if (table->relax_fp_as_gp) 12310 { 12311 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs, 12312 irelend, isymbuf)) 12313 goto error_return; 12314 12315 if (*again == FALSE) 12316 { 12317 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs, 12318 irelend)) 12319 goto error_return; 12320 } 12321 } 12322 12323 nds32_elf_pick_relax (FALSE, sec, again, table, link_info); 12324 12325 if (*again == FALSE) 12326 { 12327 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents, 12328 &relax_blank_list, optimize, opt_size)) 12329 goto error_return; 12330 } 12331 12332 /* It doesn't matter optimize_for_space_no_align anymore. 12333 If object file is assembled with flag '-Os', 12334 the we don't adjust jump-destination on 4-byte boundary. */ 12335 12336 if (relax_blank_list) 12337 { 12338 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list); 12339 relax_blank_list = NULL; 12340 } 12341 12342 if (*again == FALSE) 12343 { 12344 /* Closing the section, so we don't relax it anymore. */ 12345 bfd_vma sec_size_align; 12346 Elf_Internal_Rela *tmp_rel; 12347 12348 /* Pad to alignment boundary. Only handle current section alignment. */ 12349 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power))) 12350 & ((-1U) << sec->alignment_power); 12351 if ((sec_size_align - sec->size) & 0x2) 12352 { 12353 insn16 = NDS32_NOP16; 12354 bfd_putb16 (insn16, contents + sec->size); 12355 sec->size += 2; 12356 } 12357 12358 while (sec_size_align != sec->size) 12359 { 12360 insn = NDS32_NOP32; 12361 bfd_putb32 (insn, contents + sec->size); 12362 sec->size += 4; 12363 } 12364 12365 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs, 12366 irelend, R_NDS32_RELAX_ENTRY); 12367 if (tmp_rel != irelend) 12368 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG; 12369 12370 clean_nds32_elf_blank (); 12371 } 12372 12373 finish: 12374 if (internal_relocs != NULL 12375 && elf_section_data (sec)->relocs != internal_relocs) 12376 free (internal_relocs); 12377 12378 if (contents != NULL 12379 && elf_section_data (sec)->this_hdr.contents != contents) 12380 free (contents); 12381 12382 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf) 12383 free (isymbuf); 12384 12385 return result; 12386 12387 error_return: 12388 result = FALSE; 12389 goto finish; 12390 } 12391 12392 static struct bfd_elf_special_section const nds32_elf_special_sections[] = 12393 { 12394 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE}, 12395 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE}, 12396 {NULL, 0, 0, 0, 0} 12397 }; 12398 12399 static bfd_boolean 12400 nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED, 12401 struct bfd_link_info *info, 12402 void *finfo ATTRIBUTE_UNUSED, 12403 bfd_boolean (*func) (void *, const char *, 12404 Elf_Internal_Sym *, 12405 asection *, 12406 struct elf_link_hash_entry *) 12407 ATTRIBUTE_UNUSED) 12408 { 12409 FILE *sym_ld_script = NULL; 12410 struct elf_nds32_link_hash_table *table; 12411 12412 table = nds32_elf_hash_table (info); 12413 sym_ld_script = table->sym_ld_script; 12414 12415 if (check_start_export_sym) 12416 fprintf (sym_ld_script, "}\n"); 12417 12418 return TRUE; 12419 } 12420 12421 static enum elf_reloc_type_class 12422 nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED, 12423 const asection *rel_sec ATTRIBUTE_UNUSED, 12424 const Elf_Internal_Rela *rela) 12425 { 12426 switch ((int) ELF32_R_TYPE (rela->r_info)) 12427 { 12428 case R_NDS32_RELATIVE: 12429 return reloc_class_relative; 12430 case R_NDS32_JMP_SLOT: 12431 return reloc_class_plt; 12432 case R_NDS32_COPY: 12433 return reloc_class_copy; 12434 default: 12435 return reloc_class_normal; 12436 } 12437 } 12438 12439 /* Put target dependent option into info hash table. */ 12440 void 12441 bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info, 12442 int relax_fp_as_gp, 12443 int eliminate_gc_relocs, 12444 FILE * sym_ld_script, int load_store_relax, 12445 int target_optimize, int relax_status, 12446 int relax_round, FILE * ex9_export_file, 12447 FILE * ex9_import_file, 12448 int update_ex9_table, int ex9_limit, 12449 bfd_boolean ex9_loop_aware, 12450 bfd_boolean ifc_loop_aware) 12451 { 12452 struct elf_nds32_link_hash_table *table; 12453 12454 table = nds32_elf_hash_table (link_info); 12455 if (table == NULL) 12456 return; 12457 12458 table->relax_fp_as_gp = relax_fp_as_gp; 12459 table->eliminate_gc_relocs = eliminate_gc_relocs; 12460 table->sym_ld_script = sym_ld_script; 12461 table ->load_store_relax = load_store_relax; 12462 table->target_optimize = target_optimize; 12463 table->relax_status = relax_status; 12464 table->relax_round = relax_round; 12465 table->ex9_export_file = ex9_export_file; 12466 table->ex9_import_file = ex9_import_file; 12467 table->update_ex9_table = update_ex9_table; 12468 table->ex9_limit = ex9_limit; 12469 table->ex9_loop_aware = ex9_loop_aware; 12470 table->ifc_loop_aware = ifc_loop_aware; 12471 } 12472 12473 /* These functions and data-structures are used for fp-as-gp 12475 optimization. */ 12476 12477 #define FAG_THRESHOLD 3 /* At least 3 gp-access. */ 12478 /* lwi37.fp covers 508 bytes, but there may be 32-byte padding between 12479 the read-only section and read-write section. */ 12480 #define FAG_WINDOW (508 - 32) 12481 12482 /* An nds32_fag represent a gp-relative access. 12483 We find best fp-base by using a sliding window 12484 to find a base address which can cover most gp-access. */ 12485 struct nds32_fag 12486 { 12487 struct nds32_fag *next; /* NULL-teminated linked list. */ 12488 bfd_vma addr; /* The address of this fag. */ 12489 Elf_Internal_Rela **relas; /* The relocations associated with this fag. 12490 It is used for applying FP7U2_FLAG. */ 12491 int count; /* How many times this address is referred. 12492 There should be exactly `count' relocations 12493 in relas. */ 12494 int relas_capcity; /* The buffer size of relas. 12495 We use an array instead of linked-list, 12496 and realloc is used to adjust buffer size. */ 12497 }; 12498 12499 static void 12500 nds32_fag_init (struct nds32_fag *head) 12501 { 12502 memset (head, 0, sizeof (struct nds32_fag)); 12503 } 12504 12505 static void 12506 nds32_fag_verify (struct nds32_fag *head) 12507 { 12508 struct nds32_fag *iter; 12509 struct nds32_fag *prev; 12510 12511 prev = NULL; 12512 iter = head->next; 12513 while (iter) 12514 { 12515 if (prev && prev->addr >= iter->addr) 12516 puts ("Bug in fp-as-gp insertion."); 12517 prev = iter; 12518 iter = iter->next; 12519 } 12520 } 12521 12522 /* Insert a fag in ascending order. 12523 If a fag of the same address already exists, 12524 they are chained by relas array. */ 12525 12526 static void 12527 nds32_fag_insert (struct nds32_fag *head, bfd_vma addr, 12528 Elf_Internal_Rela * rel) 12529 { 12530 struct nds32_fag *iter; 12531 struct nds32_fag *new_fag; 12532 const int INIT_RELAS_CAP = 4; 12533 12534 for (iter = head; 12535 iter->next && iter->next->addr <= addr; 12536 iter = iter->next) 12537 /* Find somewhere to insert. */ ; 12538 12539 /* `iter' will be equal to `head' if the list is empty. */ 12540 if (iter != head && iter->addr == addr) 12541 { 12542 /* The address exists in the list. 12543 Insert `rel' into relocation list, relas. */ 12544 12545 /* Check whether relas is big enough. */ 12546 if (iter->count >= iter->relas_capcity) 12547 { 12548 iter->relas_capcity *= 2; 12549 iter->relas = bfd_realloc 12550 (iter->relas, iter->relas_capcity * sizeof (void *)); 12551 } 12552 iter->relas[iter->count++] = rel; 12553 return; 12554 } 12555 12556 /* This is a new address. Create a fag node for it. */ 12557 new_fag = bfd_malloc (sizeof (struct nds32_fag)); 12558 memset (new_fag, 0, sizeof (*new_fag)); 12559 new_fag->addr = addr; 12560 new_fag->count = 1; 12561 new_fag->next = iter->next; 12562 new_fag->relas_capcity = INIT_RELAS_CAP; 12563 new_fag->relas = (Elf_Internal_Rela **) 12564 bfd_malloc (new_fag->relas_capcity * sizeof (void *)); 12565 new_fag->relas[0] = rel; 12566 iter->next = new_fag; 12567 12568 nds32_fag_verify (head); 12569 } 12570 12571 static void 12572 nds32_fag_free_list (struct nds32_fag *head) 12573 { 12574 struct nds32_fag *iter; 12575 12576 iter = head->next; 12577 while (iter) 12578 { 12579 struct nds32_fag *tmp = iter; 12580 iter = iter->next; 12581 free (tmp->relas); 12582 tmp->relas = NULL; 12583 free (tmp); 12584 } 12585 } 12586 12587 /* Find the best fp-base address. 12588 The relocation associated with that address is returned, 12589 so we can track the symbol instead of a fixed address. 12590 12591 When relaxation, the address of an datum may change, 12592 because a text section is shrinked, so the data section 12593 moves forward. If the aligments of text and data section 12594 are different, their distance may change too. 12595 Therefore, tracking a fixed address is not appriate. */ 12596 12597 static int 12598 nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp) 12599 { 12600 struct nds32_fag *base; /* First fag in the window. */ 12601 struct nds32_fag *last; /* First fag outside the window. */ 12602 int accu = 0; /* Usage accumulation. */ 12603 struct nds32_fag *best; /* Best fag. */ 12604 int baccu = 0; /* Best accumulation. */ 12605 12606 /* Use first fag for initial, and find the last fag in the window. 12607 12608 In each iteration, we could simply subtract previous fag 12609 and accumulate following fags which are inside the window, 12610 untill we each the end. */ 12611 12612 if (head->next == NULL) 12613 { 12614 *bestpp = NULL; 12615 return 0; 12616 } 12617 12618 /* Initialize base. */ 12619 base = head->next; 12620 best = base; 12621 for (last = base; 12622 last && last->addr < base->addr + FAG_WINDOW; 12623 last = last->next) 12624 accu += last->count; 12625 12626 baccu = accu; 12627 12628 /* Record the best base in each iteration. */ 12629 while (base->next) 12630 { 12631 accu -= base->count; 12632 base = base->next; 12633 /* Account fags in window. */ 12634 for (/* Nothing. */; 12635 last && last->addr < base->addr + FAG_WINDOW; 12636 last = last->next) 12637 accu += last->count; 12638 12639 /* A better fp-base? */ 12640 if (accu > baccu) 12641 { 12642 best = base; 12643 baccu = accu; 12644 } 12645 } 12646 12647 if (bestpp) 12648 *bestpp = best; 12649 return baccu; 12650 } 12651 12652 /* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses, 12653 so we can convert it fo fp-relative access later. 12654 `best_fag' is the best fp-base. Only those inside the window 12655 of best_fag is applied the flag. */ 12656 12657 static bfd_boolean 12658 nds32_fag_mark_relax (struct bfd_link_info *link_info, 12659 bfd *abfd, struct nds32_fag *best_fag, 12660 Elf_Internal_Rela *internal_relocs, 12661 Elf_Internal_Rela *irelend) 12662 { 12663 struct nds32_fag *ifag; 12664 bfd_vma best_fpbase, gp; 12665 bfd *output_bfd; 12666 12667 output_bfd = abfd->sections->output_section->owner; 12668 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE); 12669 best_fpbase = best_fag->addr; 12670 12671 if (best_fpbase > gp + sdata_range[1][1] 12672 || best_fpbase < gp - sdata_range[1][0]) 12673 return FALSE; 12674 12675 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag, 12676 so we know they can be converted to lwi37.fp. */ 12677 for (ifag = best_fag; 12678 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next) 12679 { 12680 int i; 12681 12682 for (i = 0; i < ifag->count; i++) 12683 { 12684 Elf_Internal_Rela *insn16_rel; 12685 Elf_Internal_Rela *fag_rel; 12686 12687 fag_rel = ifag->relas[i]; 12688 12689 /* Only if this is within the WINDOWS, FP7U2_FLAG 12690 is applied. */ 12691 12692 insn16_rel = find_relocs_at_address 12693 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16); 12694 12695 if (insn16_rel != irelend) 12696 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG; 12697 } 12698 } 12699 return TRUE; 12700 } 12701 12702 /* Reset INSN16 to clean fp as gp. */ 12703 12704 static void 12705 nds32_fag_unmark_relax (struct nds32_fag *fag, 12706 Elf_Internal_Rela *internal_relocs, 12707 Elf_Internal_Rela *irelend) 12708 { 12709 struct nds32_fag *ifag; 12710 int i; 12711 Elf_Internal_Rela *insn16_rel; 12712 Elf_Internal_Rela *fag_rel; 12713 12714 for (ifag = fag; ifag; ifag = ifag->next) 12715 { 12716 for (i = 0; i < ifag->count; i++) 12717 { 12718 fag_rel = ifag->relas[i]; 12719 12720 /* Restore the INSN16 relocation. */ 12721 insn16_rel = find_relocs_at_address 12722 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16); 12723 12724 if (insn16_rel != irelend) 12725 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG; 12726 } 12727 } 12728 } 12729 12730 /* This is the main function of fp-as-gp optimization. 12731 It should be called by relax_section. */ 12732 12733 static bfd_boolean 12734 nds32_relax_fp_as_gp (struct bfd_link_info *link_info, 12735 bfd *abfd, asection *sec, 12736 Elf_Internal_Rela *internal_relocs, 12737 Elf_Internal_Rela *irelend, 12738 Elf_Internal_Sym *isymbuf) 12739 { 12740 Elf_Internal_Rela *begin_rel = NULL; 12741 Elf_Internal_Rela *irel; 12742 struct nds32_fag fag_head; 12743 Elf_Internal_Shdr *symtab_hdr; 12744 bfd_byte *contents; 12745 bfd_boolean ifc_inside = FALSE; 12746 12747 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */ 12748 12749 /* Per-function fp-base selection. 12750 1. Create a list for all the gp-relative access. 12751 2. Base on those gp-relative address, 12752 find a fp-base which can cover most access. 12753 3. Use the fp-base for fp-as-gp relaxation. 12754 12755 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times), 12756 we should 12757 1. delete the `la $fp, _FP_BASE_' instruction and 12758 2. not convert lwi.gp to lwi37.fp. 12759 12760 To delete the _FP_BASE_ instruction, we simply apply 12761 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it. 12762 12763 To suppress the conversion, we simply NOT to apply 12764 R_NDS32_INSN16_FP7U2_FLAG flag. */ 12765 12766 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 12767 12768 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE) 12769 || !nds32_get_local_syms (abfd, sec, &isymbuf)) 12770 return FALSE; 12771 12772 /* Check whether it is worth for fp-as-gp optimization, 12773 i.e., at least 3 gp-load. 12774 12775 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT 12776 apply this optimization. */ 12777 12778 for (irel = internal_relocs; irel < irelend; irel++) 12779 { 12780 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region. 12781 One we enter the begin of the region, we track all the LW/ST 12782 instructions, so when we leave the region, we try to find 12783 the best fp-base address for those LW/ST instructions. */ 12784 12785 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN 12786 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG)) 12787 { 12788 /* Begin of the region. */ 12789 if (begin_rel) 12790 (*_bfd_error_handler) (_("%B: Nested OMIT_FP in %A."), abfd, sec); 12791 12792 begin_rel = irel; 12793 nds32_fag_init (&fag_head); 12794 ifc_inside = FALSE; 12795 } 12796 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END 12797 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG)) 12798 { 12799 int accu; 12800 struct nds32_fag *best_fag, *tmp_fag; 12801 int dist; 12802 12803 /* End of the region. 12804 Check whether it is worth to do fp-as-gp. */ 12805 12806 if (begin_rel == NULL) 12807 { 12808 (*_bfd_error_handler) (_("%B: Unmatched OMIT_FP in %A."), abfd, sec); 12809 continue; 12810 } 12811 12812 accu = nds32_fag_find_base (&fag_head, &best_fag); 12813 12814 /* Clean FP7U2_FLAG because they may set ever. */ 12815 tmp_fag = fag_head.next; 12816 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend); 12817 12818 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */ 12819 if (accu < FAG_THRESHOLD 12820 || !nds32_fag_mark_relax (link_info, abfd, best_fag, 12821 internal_relocs, irelend)) 12822 { 12823 /* Not worth to do fp-as-gp. */ 12824 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG; 12825 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG; 12826 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG; 12827 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG; 12828 nds32_fag_free_list (&fag_head); 12829 begin_rel = NULL; 12830 continue; 12831 } 12832 12833 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler, 12834 so we use it to record the distance to the reloction of best 12835 fp-base. */ 12836 dist = best_fag->relas[0] - begin_rel; 12837 BFD_ASSERT (dist > 0 && dist < 0xffffff); 12838 /* Use high 16 bits of addend to record the _FP_BASE_ matched 12839 relocation. And get the base value when relocating. */ 12840 begin_rel->r_addend &= (0x1 << 16) - 1; 12841 begin_rel->r_addend |= dist << 16; 12842 12843 nds32_fag_free_list (&fag_head); 12844 begin_rel = NULL; 12845 } 12846 12847 if (begin_rel == NULL || ifc_inside) 12848 /* Skip if we are not in the region of fp-as-gp. */ 12849 continue; 12850 12851 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA 12852 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA) 12853 { 12854 bfd_vma addr; 12855 uint32_t insn; 12856 12857 /* A gp-relative access is found. Insert it to the fag-list. */ 12858 12859 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */ 12860 insn = bfd_getb32 (contents + irel->r_offset); 12861 if (!N32_IS_RT3 (insn)) 12862 continue; 12863 12864 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr); 12865 nds32_fag_insert (&fag_head, addr, irel); 12866 } 12867 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA) 12868 { 12869 begin_rel = NULL; 12870 } 12871 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA 12872 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA) 12873 { 12874 /* Suppress fp as gp when encounter ifc. */ 12875 ifc_inside = TRUE; 12876 } 12877 } 12878 12879 return TRUE; 12880 } 12881 12882 /* Remove unused `la $fp, _FD_BASE_' instruction. */ 12883 12884 static bfd_boolean 12885 nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec, 12886 Elf_Internal_Rela *internal_relocs, 12887 Elf_Internal_Rela *irelend) 12888 { 12889 Elf_Internal_Rela *irel; 12890 Elf_Internal_Shdr *symtab_hdr; 12891 bfd_byte *contents = NULL; 12892 nds32_elf_blank_t *relax_blank_list = NULL; 12893 bfd_boolean result = TRUE; 12894 bfd_boolean unused_region = FALSE; 12895 12896 /* 12897 NOTE: Disable fp-as-gp if we encounter ifcall relocations. 12898 * R_NDS32_17IFC_PCREL_RELA 12899 * R_NDS32_10IFCU_PCREL_RELA 12900 12901 CASE?????????????? 12902 */ 12903 12904 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 12905 nds32_get_section_contents (abfd, sec, &contents, TRUE); 12906 12907 for (irel = internal_relocs; irel < irelend; irel++) 12908 { 12909 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP 12910 we marked to in previous pass. 12911 DO NOT scan relocations again, since we've alreadly decided it 12912 and set the flag. */ 12913 const char *syname; 12914 int syndx; 12915 uint32_t insn; 12916 12917 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN 12918 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG)) 12919 unused_region = TRUE; 12920 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END 12921 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG)) 12922 unused_region = FALSE; 12923 12924 /* We're not in the region. */ 12925 if (!unused_region) 12926 continue; 12927 12928 /* _FP_BASE_ must be a GLOBAL symbol. */ 12929 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 12930 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) 12931 continue; 12932 12933 /* The symbol name must be _FP_BASE_. */ 12934 syname = elf_sym_hashes (abfd)[syndx]->root.root.string; 12935 if (strcmp (syname, FP_BASE_NAME) != 0) 12936 continue; 12937 12938 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA) 12939 { 12940 /* addi.gp $fp, -256 */ 12941 insn = bfd_getb32 (contents + irel->r_offset); 12942 if (insn != INSN_ADDIGP_TO_FP) 12943 continue; 12944 } 12945 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA) 12946 { 12947 /* addi $fp, $gp, -256 */ 12948 insn = bfd_getb32 (contents + irel->r_offset); 12949 if (insn != INSN_ADDI_GP_TO_FP) 12950 continue; 12951 } 12952 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA) 12953 { 12954 /* movi $fp, FP_BASE */ 12955 insn = bfd_getb32 (contents + irel->r_offset); 12956 if (insn != INSN_MOVI_TO_FP) 12957 continue; 12958 } 12959 else 12960 continue; 12961 12962 /* We got here because a FP_BASE instruction is found. */ 12963 if (!insert_nds32_elf_blank_recalc_total 12964 (&relax_blank_list, irel->r_offset, 4)) 12965 goto error_return; 12966 } 12967 12968 finish: 12969 if (relax_blank_list) 12970 { 12971 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list); 12972 relax_blank_list = NULL; 12973 } 12974 return result; 12975 12976 error_return: 12977 result = FALSE; 12978 goto finish; 12979 } 12980 12981 /* This is a version of bfd_generic_get_relocated_section_contents. 12982 We need this variety because relaxation will modify the dwarf 12983 infomation. When there is undefined symbol reference error mesage, 12984 linker need to dump line number where the symbol be used. However 12985 the address is be relaxed, it can not get the original dwarf contents. 12986 The variety only modify function call for reading in the section. */ 12987 12988 static bfd_byte * 12989 nds32_elf_get_relocated_section_contents (bfd *abfd, 12990 struct bfd_link_info *link_info, 12991 struct bfd_link_order *link_order, 12992 bfd_byte *data, 12993 bfd_boolean relocatable, 12994 asymbol **symbols) 12995 { 12996 bfd *input_bfd = link_order->u.indirect.section->owner; 12997 asection *input_section = link_order->u.indirect.section; 12998 long reloc_size; 12999 arelent **reloc_vector; 13000 long reloc_count; 13001 13002 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section); 13003 if (reloc_size < 0) 13004 return NULL; 13005 13006 /* Read in the section. */ 13007 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE)) 13008 return NULL; 13009 13010 if (reloc_size == 0) 13011 return data; 13012 13013 reloc_vector = (arelent **) bfd_malloc (reloc_size); 13014 if (reloc_vector == NULL) 13015 return NULL; 13016 13017 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section, 13018 reloc_vector, symbols); 13019 if (reloc_count < 0) 13020 goto error_return; 13021 13022 if (reloc_count > 0) 13023 { 13024 arelent **parent; 13025 for (parent = reloc_vector; *parent != NULL; parent++) 13026 { 13027 char *error_message = NULL; 13028 asymbol *symbol; 13029 bfd_reloc_status_type r; 13030 13031 symbol = *(*parent)->sym_ptr_ptr; 13032 if (symbol->section && discarded_section (symbol->section)) 13033 { 13034 bfd_byte *p; 13035 static reloc_howto_type none_howto 13036 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, 13037 "unused", FALSE, 0, 0, FALSE); 13038 13039 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd); 13040 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section, 13041 p); 13042 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; 13043 (*parent)->addend = 0; 13044 (*parent)->howto = &none_howto; 13045 r = bfd_reloc_ok; 13046 } 13047 else 13048 r = bfd_perform_relocation (input_bfd, *parent, data, 13049 input_section, 13050 relocatable ? abfd : NULL, 13051 &error_message); 13052 13053 if (relocatable) 13054 { 13055 asection *os = input_section->output_section; 13056 13057 /* A partial link, so keep the relocs. */ 13058 os->orelocation[os->reloc_count] = *parent; 13059 os->reloc_count++; 13060 } 13061 13062 if (r != bfd_reloc_ok) 13063 { 13064 switch (r) 13065 { 13066 case bfd_reloc_undefined: 13067 (*link_info->callbacks->undefined_symbol) 13068 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr), 13069 input_bfd, input_section, (*parent)->address, TRUE); 13070 break; 13071 case bfd_reloc_dangerous: 13072 BFD_ASSERT (error_message != NULL); 13073 (*link_info->callbacks->reloc_dangerous) 13074 (link_info, error_message, 13075 input_bfd, input_section, (*parent)->address); 13076 break; 13077 case bfd_reloc_overflow: 13078 (*link_info->callbacks->reloc_overflow) 13079 (link_info, NULL, 13080 bfd_asymbol_name (*(*parent)->sym_ptr_ptr), 13081 (*parent)->howto->name, (*parent)->addend, 13082 input_bfd, input_section, (*parent)->address); 13083 break; 13084 case bfd_reloc_outofrange: 13085 /* PR ld/13730: 13086 This error can result when processing some partially 13087 complete binaries. Do not abort, but issue an error 13088 message instead. */ 13089 link_info->callbacks->einfo 13090 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"), 13091 abfd, input_section, * parent); 13092 goto error_return; 13093 13094 default: 13095 abort (); 13096 break; 13097 } 13098 } 13099 } 13100 } 13101 13102 free (reloc_vector); 13103 return data; 13104 13105 error_return: 13106 free (reloc_vector); 13107 return NULL; 13108 } 13109 13110 /* Link-time IFC relaxation. 13112 In this optimization, we chains jump instructions 13113 of the same destination with ifcall. */ 13114 13115 13116 /* List to save jal and j relocation. */ 13117 struct elf_nds32_ifc_symbol_entry 13118 { 13119 asection *sec; 13120 struct elf_link_hash_entry *h; 13121 struct elf_nds32_ifc_irel_list *irel_head; 13122 unsigned long insn; 13123 int times; 13124 int enable; /* Apply ifc. */ 13125 int ex9_enable; /* Apply ifc after ex9. */ 13126 struct elf_nds32_ifc_symbol_entry *next; 13127 }; 13128 13129 struct elf_nds32_ifc_irel_list 13130 { 13131 Elf_Internal_Rela *irel; 13132 asection *sec; 13133 bfd_vma addr; 13134 /* If this is set, then it is the last instruction for 13135 ifc-chain, so it must be keep for the actual branching. */ 13136 int keep; 13137 struct elf_nds32_ifc_irel_list *next; 13138 }; 13139 13140 static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL; 13141 13142 /* Insert symbol of jal and j for ifc. */ 13143 13144 static void 13145 nds32_elf_ifc_insert_symbol (asection *sec, 13146 struct elf_link_hash_entry *h, 13147 Elf_Internal_Rela *irel, 13148 unsigned long insn) 13149 { 13150 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head; 13151 13152 /* Check there is target of existing entry the same as the new one. */ 13153 while (ptr != NULL) 13154 { 13155 if (((h == NULL && ptr->sec == sec 13156 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info) 13157 && ptr->irel_head->irel->r_addend == irel->r_addend) 13158 || h != NULL) 13159 && ptr->h == h 13160 && ptr->insn == insn) 13161 { 13162 /* The same target exist, so insert into list. */ 13163 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head; 13164 13165 while (irel_list->next != NULL) 13166 irel_list = irel_list->next; 13167 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list)); 13168 irel_list = irel_list->next; 13169 irel_list->irel = irel; 13170 irel_list->keep = 1; 13171 13172 if (h == NULL) 13173 irel_list->sec = NULL; 13174 else 13175 irel_list->sec = sec; 13176 irel_list->next = NULL; 13177 return; 13178 } 13179 if (ptr->next == NULL) 13180 break; 13181 ptr = ptr->next; 13182 } 13183 13184 /* There is no same target entry, so build a new one. */ 13185 if (ifc_symbol_head == NULL) 13186 { 13187 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry)); 13188 ptr = ifc_symbol_head; 13189 } 13190 else 13191 { 13192 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry)); 13193 ptr = ptr->next; 13194 } 13195 13196 ptr->h = h; 13197 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list)); 13198 ptr->irel_head->irel = irel; 13199 ptr->insn = insn; 13200 ptr->irel_head->keep = 1; 13201 13202 if (h == NULL) 13203 { 13204 /* Local symbols. */ 13205 ptr->sec = sec; 13206 ptr->irel_head->sec = NULL; 13207 } 13208 else 13209 { 13210 /* Global symbol. */ 13211 ptr->sec = NULL; 13212 ptr->irel_head->sec = sec; 13213 } 13214 13215 ptr->irel_head->next = NULL; 13216 ptr->times = 0; 13217 ptr->enable = 0; 13218 ptr->ex9_enable = 0; 13219 ptr->next = NULL; 13220 } 13221 13222 /* Gather all jal and j instructions. */ 13223 13224 static bfd_boolean 13225 nds32_elf_ifc_calc (struct bfd_link_info *info, 13226 bfd *abfd, asection *sec) 13227 { 13228 Elf_Internal_Rela *internal_relocs; 13229 Elf_Internal_Rela *irelend; 13230 Elf_Internal_Rela *irel; 13231 Elf_Internal_Shdr *symtab_hdr; 13232 bfd_byte *contents = NULL; 13233 uint32_t insn, insn_with_reg; 13234 unsigned long r_symndx; 13235 struct elf_link_hash_entry *h; 13236 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd); 13237 struct elf_nds32_link_hash_table *table; 13238 bfd_boolean ifc_loop_aware; 13239 13240 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, 13241 TRUE /* keep_memory */); 13242 irelend = internal_relocs + sec->reloc_count; 13243 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 13244 13245 /* Check if the object enable ifc. */ 13246 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend, 13247 R_NDS32_RELAX_ENTRY); 13248 13249 if (irel == NULL 13250 || irel >= irelend 13251 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY 13252 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY 13253 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG))) 13254 return TRUE; 13255 13256 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)) 13257 return FALSE; 13258 13259 table = nds32_elf_hash_table (info); 13260 ifc_loop_aware = table->ifc_loop_aware; 13261 while (irel != NULL && irel < irelend) 13262 { 13263 /* Traverse all relocation and gather all of them to build the list. */ 13264 13265 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN) 13266 { 13267 if (ifc_loop_aware == 1 13268 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0) 13269 { 13270 /* Check the region if loop or not. If it is true and 13271 ifc-loop-aware is true, ignore the region till region end. */ 13272 while (irel != NULL 13273 && irel < irelend 13274 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END 13275 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)) 13276 irel++; 13277 } 13278 } 13279 13280 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA) 13281 { 13282 insn = bfd_getb32 (contents + irel->r_offset); 13283 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg); 13284 r_symndx = ELF32_R_SYM (irel->r_info); 13285 if (r_symndx < symtab_hdr->sh_info) 13286 { 13287 /* Local symbol. */ 13288 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg); 13289 } 13290 else 13291 { 13292 /* External symbol. */ 13293 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 13294 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg); 13295 } 13296 } 13297 irel++; 13298 } 13299 return TRUE; 13300 } 13301 13302 /* Determine whether j and jal should be substituted. */ 13303 13304 static void 13305 nds32_elf_ifc_filter (struct bfd_link_info *info) 13306 { 13307 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head; 13308 struct elf_nds32_ifc_irel_list *irel_ptr = NULL; 13309 struct elf_nds32_ifc_irel_list *irel_keeper = NULL; 13310 struct elf_nds32_link_hash_table *table; 13311 int target_optimize; 13312 bfd_vma address; 13313 13314 table = nds32_elf_hash_table (info); 13315 target_optimize = table->target_optimize; 13316 while (ptr) 13317 { 13318 irel_ptr = ptr->irel_head; 13319 if (ptr->h == NULL) 13320 { 13321 /* Local symbol. */ 13322 irel_keeper = irel_ptr; 13323 while (irel_ptr && irel_ptr->next) 13324 { 13325 /* Check there is jump target can be used. */ 13326 if ((irel_ptr->next->irel->r_offset 13327 - irel_keeper->irel->r_offset) > 1022) 13328 irel_keeper = irel_ptr->next; 13329 else 13330 { 13331 ptr->enable = 1; 13332 irel_ptr->keep = 0; 13333 } 13334 irel_ptr = irel_ptr->next; 13335 } 13336 } 13337 else 13338 { 13339 /* Global symbol. */ 13340 /* We have to get the absolute address and decide 13341 whether to keep it or not. */ 13342 while (irel_ptr) 13343 { 13344 address = (irel_ptr->irel->r_offset 13345 + irel_ptr->sec->output_section->vma 13346 + irel_ptr->sec->output_offset); 13347 irel_ptr->addr = address; 13348 irel_ptr = irel_ptr->next; 13349 } 13350 13351 irel_ptr = ptr->irel_head; 13352 while (irel_ptr) 13353 { 13354 /* Sort by address. */ 13355 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr; 13356 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr; 13357 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL; 13358 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL; 13359 13360 /* Get the smallest one. */ 13361 while (irel_temp->next) 13362 { 13363 if (irel_temp->next->addr < irel_dest->addr) 13364 { 13365 irel_dest_prev = irel_temp; 13366 irel_dest = irel_temp->next; 13367 } 13368 irel_temp = irel_temp->next; 13369 } 13370 13371 if (irel_dest != irel_ptr) 13372 { 13373 if (irel_ptr_prev) 13374 irel_ptr_prev->next = irel_dest; 13375 if (irel_dest_prev) 13376 irel_dest_prev->next = irel_ptr; 13377 irel_temp = irel_ptr->next; 13378 irel_ptr->next = irel_dest->next; 13379 irel_dest->next = irel_temp; 13380 } 13381 irel_ptr_prev = irel_ptr; 13382 irel_ptr = irel_ptr->next; 13383 } 13384 13385 irel_ptr = ptr->irel_head; 13386 irel_keeper = irel_ptr; 13387 while (irel_ptr && irel_ptr->next) 13388 { 13389 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022) 13390 irel_keeper = irel_ptr->next; 13391 else 13392 { 13393 ptr->enable = 1; 13394 irel_ptr->keep = 0; 13395 } 13396 irel_ptr = irel_ptr->next; 13397 } 13398 } 13399 13400 /* Ex9 enable. Reserve it for ex9. */ 13401 if ((target_optimize & NDS32_RELAX_EX9_ON) 13402 && ptr->irel_head != irel_keeper) 13403 ptr->enable = 0; 13404 ptr = ptr->next; 13405 } 13406 } 13407 13408 /* Determine whether j and jal should be substituted after ex9 done. */ 13409 13410 static void 13411 nds32_elf_ifc_filter_after_ex9 (void) 13412 { 13413 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head; 13414 struct elf_nds32_ifc_irel_list *irel_ptr = NULL; 13415 13416 while (ptr) 13417 { 13418 if (ptr->enable == 0) 13419 { 13420 /* Check whether ifc is applied or not. */ 13421 irel_ptr = ptr->irel_head; 13422 ptr->ex9_enable = 1; 13423 while (irel_ptr) 13424 { 13425 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN) 13426 { 13427 /* Ex9 already. */ 13428 ptr->ex9_enable = 0; 13429 break; 13430 } 13431 irel_ptr = irel_ptr->next; 13432 } 13433 } 13434 ptr = ptr->next; 13435 } 13436 } 13437 13438 /* Wrapper to do ifc relaxation. */ 13439 13440 bfd_boolean 13441 nds32_elf_ifc_finish (struct bfd_link_info *info) 13442 { 13443 int relax_status; 13444 struct elf_nds32_link_hash_table *table; 13445 13446 table = nds32_elf_hash_table (info); 13447 relax_status = table->relax_status; 13448 13449 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE)) 13450 nds32_elf_ifc_filter (info); 13451 else 13452 nds32_elf_ifc_filter_after_ex9 (); 13453 13454 if (!nds32_elf_ifc_replace (info)) 13455 return FALSE; 13456 13457 if (table) 13458 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE; 13459 return TRUE; 13460 } 13461 13462 /* Traverse the result of ifc filter and replace it with ifcall9. */ 13463 13464 static bfd_boolean 13465 nds32_elf_ifc_replace (struct bfd_link_info *info) 13466 { 13467 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head; 13468 struct elf_nds32_ifc_irel_list *irel_ptr = NULL; 13469 nds32_elf_blank_t *relax_blank_list = NULL; 13470 bfd_byte *contents = NULL; 13471 Elf_Internal_Rela *internal_relocs; 13472 Elf_Internal_Rela *irel; 13473 Elf_Internal_Rela *irelend; 13474 unsigned short insn16 = INSN_IFCALL9; 13475 struct elf_nds32_link_hash_table *table; 13476 int relax_status; 13477 13478 table = nds32_elf_hash_table (info); 13479 relax_status = table->relax_status; 13480 13481 while (ptr) 13482 { 13483 /* Traverse the ifc gather list, and replace the 13484 filter entries by ifcall9. */ 13485 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1) 13486 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE) 13487 && ptr->ex9_enable == 1)) 13488 { 13489 irel_ptr = ptr->irel_head; 13490 if (ptr->h == NULL) 13491 { 13492 /* Local symbol. */ 13493 internal_relocs = _bfd_elf_link_read_relocs 13494 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */); 13495 irelend = internal_relocs + ptr->sec->reloc_count; 13496 13497 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec, 13498 &contents, TRUE)) 13499 return FALSE; 13500 13501 while (irel_ptr) 13502 { 13503 if (irel_ptr->keep == 0 && irel_ptr->next) 13504 { 13505 /* The one can be replaced. We have to check whether 13506 there is any alignment point in the region. */ 13507 irel = irel_ptr->irel; 13508 while (((irel_ptr->next->keep == 0 13509 && irel < irel_ptr->next->irel) 13510 || (irel_ptr->next->keep == 1 && irel < irelend)) 13511 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 13512 && (irel->r_addend & 0x1f) == 2)) 13513 irel++; 13514 if (irel >= irelend 13515 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 13516 && (irel->r_addend & 0x1f) == 2 13517 && ((irel->r_offset - get_nds32_elf_blank_total 13518 (&relax_blank_list, irel->r_offset, 1)) 13519 & 0x02) == 0)) 13520 { 13521 /* Replace by ifcall9. */ 13522 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset); 13523 if (!insert_nds32_elf_blank_recalc_total 13524 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2)) 13525 return FALSE; 13526 irel_ptr->irel->r_info = 13527 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), 13528 R_NDS32_10IFCU_PCREL_RELA); 13529 } 13530 } 13531 irel_ptr = irel_ptr->next; 13532 } 13533 13534 /* Delete the redundant code. */ 13535 if (relax_blank_list) 13536 { 13537 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec, 13538 relax_blank_list); 13539 relax_blank_list = NULL; 13540 } 13541 } 13542 else 13543 { 13544 /* Global symbol. */ 13545 while (irel_ptr) 13546 { 13547 if (irel_ptr->keep == 0 && irel_ptr->next) 13548 { 13549 /* The one can be replaced, and we have to check 13550 whether there is any alignment point in the region. */ 13551 internal_relocs = _bfd_elf_link_read_relocs 13552 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL, 13553 TRUE /* keep_memory */); 13554 irelend = internal_relocs + irel_ptr->sec->reloc_count; 13555 if (!nds32_get_section_contents (irel_ptr->sec->owner, 13556 irel_ptr->sec, &contents, 13557 TRUE)) 13558 return FALSE; 13559 13560 irel = irel_ptr->irel; 13561 while (((irel_ptr->sec == irel_ptr->next->sec 13562 && irel_ptr->next->keep == 0 13563 && irel < irel_ptr->next->irel) 13564 || ((irel_ptr->sec != irel_ptr->next->sec 13565 || irel_ptr->next->keep == 1) 13566 && irel < irelend)) 13567 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 13568 && (irel->r_addend & 0x1f) == 2)) 13569 irel++; 13570 if (irel >= irelend 13571 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL 13572 && (irel->r_addend & 0x1f) == 2 13573 && ((irel->r_offset 13574 - get_nds32_elf_blank_total (&relax_blank_list, 13575 irel->r_offset, 1)) & 0x02) == 0)) 13576 { 13577 /* Replace by ifcall9. */ 13578 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset); 13579 if (!insert_nds32_elf_blank_recalc_total 13580 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2)) 13581 return FALSE; 13582 13583 /* Delete the redundant code, and clear the relocation. */ 13584 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner, 13585 irel_ptr->sec, 13586 relax_blank_list); 13587 irel_ptr->irel->r_info = 13588 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), 13589 R_NDS32_10IFCU_PCREL_RELA); 13590 relax_blank_list = NULL; 13591 } 13592 } 13593 13594 irel_ptr = irel_ptr->next; 13595 } 13596 } 13597 } 13598 ptr = ptr->next; 13599 } 13600 13601 return TRUE; 13602 } 13603 13604 /* Relocate ifcall. */ 13605 13606 static bfd_boolean 13607 nds32_elf_ifc_reloc (void) 13608 { 13609 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head; 13610 struct elf_nds32_ifc_irel_list *irel_ptr = NULL; 13611 struct elf_nds32_ifc_irel_list *irel_keeper = NULL; 13612 bfd_vma relocation, address; 13613 unsigned short insn16; 13614 bfd_byte *contents = NULL; 13615 static bfd_boolean done = FALSE; 13616 13617 if (done) 13618 return TRUE; 13619 13620 done = TRUE; 13621 13622 while (ptr) 13623 { 13624 /* Check the entry is enable ifcall. */ 13625 if (ptr->enable == 1 || ptr->ex9_enable == 1) 13626 { 13627 /* Get the reserve jump. */ 13628 irel_ptr = ptr->irel_head; 13629 while (irel_ptr) 13630 { 13631 if (irel_ptr->keep == 1) 13632 { 13633 irel_keeper = irel_ptr; 13634 break; 13635 } 13636 irel_ptr = irel_ptr->next; 13637 } 13638 13639 irel_ptr = ptr->irel_head; 13640 if (ptr->h == NULL) 13641 { 13642 /* Local symbol. */ 13643 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec, 13644 &contents, TRUE)) 13645 return FALSE; 13646 13647 while (irel_ptr) 13648 { 13649 if (irel_ptr->keep == 0 13650 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA) 13651 { 13652 relocation = irel_keeper->irel->r_offset; 13653 relocation = relocation - irel_ptr->irel->r_offset; 13654 while (irel_keeper && relocation > 1022) 13655 { 13656 irel_keeper = irel_keeper->next; 13657 if (irel_keeper && irel_keeper->keep == 1) 13658 { 13659 relocation = irel_keeper->irel->r_offset; 13660 relocation = relocation - irel_ptr->irel->r_offset; 13661 } 13662 } 13663 if (relocation > 1022) 13664 { 13665 /* Double check. */ 13666 irel_keeper = ptr->irel_head; 13667 while (irel_keeper) 13668 { 13669 if (irel_keeper->keep == 1) 13670 { 13671 relocation = irel_keeper->irel->r_offset; 13672 relocation = relocation - irel_ptr->irel->r_offset; 13673 } 13674 if (relocation <= 1022) 13675 break; 13676 irel_keeper = irel_keeper->next; 13677 } 13678 if (!irel_keeper) 13679 return FALSE; 13680 } 13681 irel_ptr->irel->r_info = 13682 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), 13683 R_NDS32_NONE); 13684 insn16 = INSN_IFCALL9 | (relocation >> 1); 13685 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset); 13686 } 13687 irel_ptr = irel_ptr->next; 13688 } 13689 } 13690 else 13691 { 13692 /* Global symbol. */ 13693 while (irel_ptr) 13694 { 13695 if (irel_ptr->keep == 0 13696 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA) 13697 { 13698 /* Get the distance between ifcall and jump. */ 13699 relocation = (irel_keeper->irel->r_offset 13700 + irel_keeper->sec->output_section->vma 13701 + irel_keeper->sec->output_offset); 13702 address = (irel_ptr->irel->r_offset 13703 + irel_ptr->sec->output_section->vma 13704 + irel_ptr->sec->output_offset); 13705 relocation = relocation - address; 13706 13707 /* The distance is over ragne, find callee again. */ 13708 while (irel_keeper && relocation > 1022) 13709 { 13710 irel_keeper = irel_keeper->next; 13711 if (irel_keeper && irel_keeper->keep ==1) 13712 { 13713 relocation = (irel_keeper->irel->r_offset 13714 + irel_keeper->sec->output_section->vma 13715 + irel_keeper->sec->output_offset); 13716 relocation = relocation - address; 13717 } 13718 } 13719 13720 if (relocation > 1022) 13721 { 13722 /* Double check. */ 13723 irel_keeper = ptr->irel_head; 13724 while (irel_keeper) 13725 { 13726 if (irel_keeper->keep == 1) 13727 { 13728 13729 relocation = (irel_keeper->irel->r_offset 13730 + irel_keeper->sec->output_section->vma 13731 + irel_keeper->sec->output_offset); 13732 relocation = relocation - address; 13733 } 13734 if (relocation <= 1022) 13735 break; 13736 irel_keeper = irel_keeper->next; 13737 } 13738 if (!irel_keeper) 13739 return FALSE; 13740 } 13741 if (!nds32_get_section_contents 13742 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE)) 13743 return FALSE; 13744 insn16 = INSN_IFCALL9 | (relocation >> 1); 13745 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset); 13746 irel_ptr->irel->r_info = 13747 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), 13748 R_NDS32_NONE); 13749 } 13750 irel_ptr =irel_ptr->next; 13751 } 13752 } 13753 } 13754 ptr = ptr->next; 13755 } 13756 13757 return TRUE; 13758 } 13759 13760 /* End of IFC relaxation. */ 13761 13762 /* EX9 Instruction Table Relaxation. */ 13764 13765 /* Global hash list. */ 13766 struct elf_link_hash_entry_list 13767 { 13768 struct elf_link_hash_entry *h; 13769 struct elf_link_hash_entry_list *next; 13770 }; 13771 13772 /* Save different destination but same insn. */ 13773 struct elf_link_hash_entry_mul_list 13774 { 13775 /* Global symbol times. */ 13776 int times; 13777 /* Save relocation for each global symbol but useful?? */ 13778 Elf_Internal_Rela *irel; 13779 /* For sethi, two sethi may have the same high-part but different low-parts. */ 13780 Elf_Internal_Rela rel_backup; 13781 struct elf_link_hash_entry_list *h_list; 13782 struct elf_link_hash_entry_mul_list *next; 13783 }; 13784 13785 /* Instruction hash table. */ 13786 struct elf_nds32_code_hash_entry 13787 { 13788 struct bfd_hash_entry root; 13789 int times; 13790 /* For insn that can use relocation or constant ex: sethi. */ 13791 int const_insn; 13792 asection *sec; 13793 struct elf_link_hash_entry_mul_list *m_list; 13794 /* Using r_addend. */ 13795 Elf_Internal_Rela *irel; 13796 /* Using r_info. */ 13797 Elf_Internal_Rela rel_backup; 13798 }; 13799 13800 /* Instruction count list. */ 13801 struct elf_nds32_insn_times_entry 13802 { 13803 const char *string; 13804 int times; 13805 int order; 13806 asection *sec; 13807 struct elf_link_hash_entry_mul_list *m_list; 13808 Elf_Internal_Rela *irel; 13809 Elf_Internal_Rela rel_backup; 13810 struct elf_nds32_insn_times_entry *next; 13811 }; 13812 13813 /* J and JAL symbol list. */ 13814 struct elf_nds32_symbol_entry 13815 { 13816 char *string; 13817 unsigned long insn; 13818 struct elf_nds32_symbol_entry *next; 13819 }; 13820 13821 /* Relocation list. */ 13822 struct elf_nds32_irel_entry 13823 { 13824 Elf_Internal_Rela *irel; 13825 struct elf_nds32_irel_entry *next; 13826 }; 13827 13828 /* ex9.it insn need to be fixed. */ 13829 struct elf_nds32_ex9_refix 13830 { 13831 Elf_Internal_Rela *irel; 13832 asection *sec; 13833 struct elf_link_hash_entry *h; 13834 int order; 13835 struct elf_nds32_ex9_refix *next; 13836 }; 13837 13838 static struct bfd_hash_table ex9_code_table; 13839 static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL; 13840 static struct elf_nds32_ex9_refix *ex9_refix_head = NULL; 13841 13842 /* EX9 hash function. */ 13843 13844 static struct bfd_hash_entry * 13845 nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry, 13846 struct bfd_hash_table *table, 13847 const char *string) 13848 { 13849 struct elf_nds32_code_hash_entry *ret; 13850 13851 /* Allocate the structure if it has not already been allocated by a 13852 subclass. */ 13853 if (entry == NULL) 13854 { 13855 entry = (struct bfd_hash_entry *) 13856 bfd_hash_allocate (table, sizeof (*ret)); 13857 if (entry == NULL) 13858 return entry; 13859 } 13860 13861 /* Call the allocation method of the superclass. */ 13862 entry = bfd_hash_newfunc (entry, table, string); 13863 if (entry == NULL) 13864 return entry; 13865 13866 ret = (struct elf_nds32_code_hash_entry*) entry; 13867 ret->times = 0; 13868 ret->const_insn = 0; 13869 ret->m_list = NULL; 13870 ret->sec = NULL; 13871 ret->irel = NULL; 13872 return &ret->root; 13873 } 13874 13875 /* Insert ex9 entry 13876 this insert must be stable sorted by times. */ 13877 13878 static void 13879 nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr) 13880 { 13881 struct elf_nds32_insn_times_entry *temp; 13882 struct elf_nds32_insn_times_entry *temp2; 13883 13884 if (ex9_insn_head == NULL) 13885 { 13886 ex9_insn_head = ptr; 13887 ptr->next = NULL; 13888 } 13889 else 13890 { 13891 temp = ex9_insn_head; 13892 temp2 = ex9_insn_head; 13893 while (temp->next && 13894 (temp->next->times >= ptr->times 13895 || temp->times == -1)) 13896 { 13897 if (temp->times == -1) 13898 temp2 = temp; 13899 temp = temp->next; 13900 } 13901 if (ptr->times > temp->times && temp->times != -1) 13902 { 13903 ptr->next = temp; 13904 if (temp2->times == -1) 13905 temp2->next = ptr; 13906 else 13907 ex9_insn_head = ptr; 13908 } 13909 else if (temp->next == NULL) 13910 { 13911 temp->next = ptr; 13912 ptr->next = NULL; 13913 } 13914 else 13915 { 13916 ptr->next = temp->next; 13917 temp->next = ptr; 13918 } 13919 } 13920 } 13921 13922 /* Examine each insn times in hash table. 13923 Handle multi-link hash entry. 13924 13925 TODO: This function doesn't assign so much info since it is fake. */ 13926 13927 static int 13928 nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h) 13929 { 13930 struct elf_nds32_insn_times_entry *ptr; 13931 int times; 13932 13933 if (h->m_list == NULL) 13934 { 13935 /* Local symbol insn or insn without relocation. */ 13936 if (h->times < 3) 13937 return TRUE; 13938 13939 ptr = (struct elf_nds32_insn_times_entry *) 13940 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 13941 ptr->times = h->times; 13942 ptr->string = h->root.string; 13943 ptr->m_list = NULL; 13944 ptr->sec = h->sec; 13945 ptr->irel = h->irel; 13946 ptr->rel_backup = h->rel_backup; 13947 nds32_elf_ex9_insert_entry (ptr); 13948 } 13949 else 13950 { 13951 /* Global symbol insn. */ 13952 /* Only sethi insn has multiple m_list. */ 13953 struct elf_link_hash_entry_mul_list *m_list = h->m_list; 13954 13955 times = 0; 13956 while (m_list) 13957 { 13958 times += m_list->times; 13959 m_list = m_list->next; 13960 } 13961 if (times >= 3) 13962 { 13963 m_list = h->m_list; 13964 ptr = (struct elf_nds32_insn_times_entry *) 13965 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 13966 ptr->times = times; /* Use the total times. */ 13967 ptr->string = h->root.string; 13968 ptr->m_list = m_list; 13969 ptr->sec = h->sec; 13970 ptr->irel = m_list->irel; 13971 ptr->rel_backup = m_list->rel_backup; 13972 nds32_elf_ex9_insert_entry (ptr); 13973 } 13974 if (h->const_insn == 1) 13975 { 13976 /* sethi with constant value. */ 13977 if (h->times < 3) 13978 return TRUE; 13979 13980 ptr = (struct elf_nds32_insn_times_entry *) 13981 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 13982 ptr->times = h->times; 13983 ptr->string = h->root.string; 13984 ptr->m_list = NULL; 13985 ptr->sec = NULL; 13986 ptr->irel = NULL; 13987 ptr->rel_backup = h->rel_backup; 13988 nds32_elf_ex9_insert_entry (ptr); 13989 } 13990 } 13991 return TRUE; 13992 } 13993 13994 /* Count each insn times in hash table. 13995 Handle multi-link hash entry. */ 13996 13997 static int 13998 nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h) 13999 { 14000 int reservation, times; 14001 unsigned long relocation, min_relocation; 14002 struct elf_nds32_insn_times_entry *ptr; 14003 14004 if (h->m_list == NULL) 14005 { 14006 /* Local symbol insn or insn without relocation. */ 14007 if (h->times < 3) 14008 return TRUE; 14009 ptr = (struct elf_nds32_insn_times_entry *) 14010 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 14011 ptr->times = h->times; 14012 ptr->string = h->root.string; 14013 ptr->m_list = NULL; 14014 ptr->sec = h->sec; 14015 ptr->irel = h->irel; 14016 ptr->rel_backup = h->rel_backup; 14017 nds32_elf_ex9_insert_entry (ptr); 14018 } 14019 else 14020 { 14021 /* Global symbol insn. */ 14022 /* Only sethi insn has multiple m_list. */ 14023 struct elf_link_hash_entry_mul_list *m_list = h->m_list; 14024 14025 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA 14026 && m_list->next != NULL) 14027 { 14028 /* Sethi insn has different symbol or addend but has same hi20. */ 14029 times = 0; 14030 reservation = 1; 14031 relocation = 0; 14032 min_relocation = 0xffffffff; 14033 while (m_list) 14034 { 14035 /* Get the minimum sethi address 14036 and calculate how many entry the sethi-list have to use. */ 14037 if ((m_list->h_list->h->root.type == bfd_link_hash_defined 14038 || m_list->h_list->h->root.type == bfd_link_hash_defweak) 14039 && (m_list->h_list->h->root.u.def.section != NULL 14040 && m_list->h_list->h->root.u.def.section->output_section != NULL)) 14041 { 14042 relocation = (m_list->h_list->h->root.u.def.value + 14043 m_list->h_list->h->root.u.def.section->output_section->vma + 14044 m_list->h_list->h->root.u.def.section->output_offset); 14045 relocation += m_list->irel->r_addend; 14046 } 14047 else 14048 relocation = 0; 14049 if (relocation < min_relocation) 14050 min_relocation = relocation; 14051 times += m_list->times; 14052 m_list = m_list->next; 14053 } 14054 if (min_relocation < ex9_relax_size) 14055 reservation = (min_relocation >> 12) + 1; 14056 else 14057 reservation = (min_relocation >> 12) 14058 - ((min_relocation - ex9_relax_size) >> 12) + 1; 14059 if (reservation < (times / 3)) 14060 { 14061 /* Efficient enough to use ex9. */ 14062 int i; 14063 14064 for (i = reservation ; i > 0; i--) 14065 { 14066 /* Allocate number of reservation ex9 entry. */ 14067 ptr = (struct elf_nds32_insn_times_entry *) 14068 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 14069 ptr->times = h->m_list->times / reservation; 14070 ptr->string = h->root.string; 14071 ptr->m_list = h->m_list; 14072 ptr->sec = h->sec; 14073 ptr->irel = h->m_list->irel; 14074 ptr->rel_backup = h->m_list->rel_backup; 14075 nds32_elf_ex9_insert_entry (ptr); 14076 } 14077 } 14078 } 14079 else 14080 { 14081 /* Normal global symbol that means no different address symbol 14082 using same ex9 entry. */ 14083 if (m_list->times >= 3) 14084 { 14085 ptr = (struct elf_nds32_insn_times_entry *) 14086 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 14087 ptr->times = m_list->times; 14088 ptr->string = h->root.string; 14089 ptr->m_list = h->m_list; 14090 ptr->sec = h->sec; 14091 ptr->irel = h->m_list->irel; 14092 ptr->rel_backup = h->m_list->rel_backup; 14093 nds32_elf_ex9_insert_entry (ptr); 14094 } 14095 } 14096 14097 if (h->const_insn == 1) 14098 { 14099 /* sethi with constant value. */ 14100 if (h->times < 3) 14101 return TRUE; 14102 14103 ptr = (struct elf_nds32_insn_times_entry *) 14104 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 14105 ptr->times = h->times; 14106 ptr->string = h->root.string; 14107 ptr->m_list = NULL; 14108 ptr->sec = NULL; 14109 ptr->irel = NULL; 14110 ptr->rel_backup = h->rel_backup; 14111 nds32_elf_ex9_insert_entry (ptr); 14112 } 14113 } 14114 14115 return TRUE; 14116 } 14117 14118 /* Hash table traverse function. */ 14119 14120 static void 14121 nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*)) 14122 { 14123 unsigned int i; 14124 14125 ex9_code_table.frozen = 1; 14126 for (i = 0; i < ex9_code_table.size; i++) 14127 { 14128 struct bfd_hash_entry *p; 14129 14130 for (p = ex9_code_table.table[i]; p != NULL; p = p->next) 14131 if (!func ((struct elf_nds32_code_hash_entry *) p)) 14132 goto out; 14133 } 14134 out: 14135 ex9_code_table.frozen = 0; 14136 } 14137 14138 14139 /* Give order number to insn list. */ 14140 14141 static void 14142 nds32_elf_order_insn_times (struct bfd_link_info *info) 14143 { 14144 struct elf_nds32_insn_times_entry *ex9_insn; 14145 struct elf_nds32_insn_times_entry *temp = NULL; 14146 struct elf_nds32_link_hash_table *table; 14147 int ex9_limit; 14148 int number = 0; 14149 14150 if (ex9_insn_head == NULL) 14151 return; 14152 14153 /* The max number of entries is 512. */ 14154 ex9_insn = ex9_insn_head; 14155 table = nds32_elf_hash_table (info); 14156 ex9_limit = table->ex9_limit; 14157 14158 ex9_insn = ex9_insn_head; 14159 14160 while (ex9_insn != NULL && number < ex9_limit) 14161 { 14162 ex9_insn->order = number; 14163 number++; 14164 temp = ex9_insn; 14165 ex9_insn = ex9_insn->next; 14166 } 14167 14168 if (ex9_insn && temp) 14169 temp->next = NULL; 14170 14171 while (ex9_insn != NULL) 14172 { 14173 /* Free useless entry. */ 14174 temp = ex9_insn; 14175 ex9_insn = ex9_insn->next; 14176 free (temp); 14177 } 14178 } 14179 14180 /* Build .ex9.itable section. */ 14181 14182 static void 14183 nds32_elf_ex9_build_itable (struct bfd_link_info *link_info) 14184 { 14185 asection *table_sec; 14186 struct elf_nds32_insn_times_entry *ptr; 14187 bfd *it_abfd; 14188 int number = 0; 14189 bfd_byte *contents = NULL; 14190 14191 for (it_abfd = link_info->input_bfds; it_abfd != NULL; 14192 it_abfd = it_abfd->link.next) 14193 { 14194 /* Find the section .ex9.itable, and put all entries into it. */ 14195 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable"); 14196 if (table_sec != NULL) 14197 { 14198 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE)) 14199 return; 14200 14201 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next) 14202 number++; 14203 14204 table_sec->size = number * 4; 14205 14206 if (number == 0) 14207 return; 14208 14209 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST; 14210 number = 0; 14211 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next) 14212 { 14213 long val; 14214 14215 val = strtol (ptr->string, NULL, 16); 14216 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4)); 14217 number++; 14218 } 14219 break; 14220 } 14221 } 14222 } 14223 14224 /* Get insn with regs according to relocation type. */ 14225 14226 static void 14227 nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel, 14228 uint32_t insn, uint32_t *insn_with_reg) 14229 { 14230 reloc_howto_type *howto = NULL; 14231 14232 if (irel == NULL 14233 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table) 14234 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY) 14235 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table))) 14236 { 14237 *insn_with_reg = insn; 14238 return; 14239 } 14240 14241 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info)); 14242 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask); 14243 } 14244 14245 /* Mask number of address bits according to relocation. */ 14246 14247 static unsigned long 14248 nds32_elf_irel_mask (Elf_Internal_Rela *irel) 14249 { 14250 reloc_howto_type *howto = NULL; 14251 14252 if (irel == NULL 14253 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table) 14254 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY) 14255 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table))) 14256 return 0; 14257 14258 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info)); 14259 return howto->dst_mask; 14260 } 14261 14262 static void 14263 nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list, 14264 struct elf_nds32_irel_entry *irel_ptr) 14265 { 14266 if (*irel_list == NULL) 14267 { 14268 *irel_list = irel_ptr; 14269 irel_ptr->next = NULL; 14270 } 14271 else 14272 { 14273 irel_ptr->next = *irel_list; 14274 *irel_list = irel_ptr; 14275 } 14276 } 14277 14278 static void 14279 nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel, 14280 struct elf_link_hash_entry *h, int order) 14281 { 14282 struct elf_nds32_ex9_refix *ptr; 14283 14284 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix)); 14285 ptr->sec = sec; 14286 ptr->irel = irel; 14287 ptr->h = h; 14288 ptr->order = order; 14289 ptr->next = NULL; 14290 14291 if (ex9_refix_head == NULL) 14292 ex9_refix_head = ptr; 14293 else 14294 { 14295 struct elf_nds32_ex9_refix *temp = ex9_refix_head; 14296 14297 while (temp->next != NULL) 14298 temp = temp->next; 14299 temp->next = ptr; 14300 } 14301 } 14302 14303 enum 14304 { 14305 DATA_EXIST = 1, 14306 CLEAN_PRE = 1 << 1, 14307 PUSH_PRE = 1 << 2 14308 }; 14309 14310 /* Check relocation type if supporting for ex9. */ 14311 14312 static int 14313 nds32_elf_ex9_relocation_check (struct bfd_link_info *info, 14314 Elf_Internal_Rela **irel, 14315 Elf_Internal_Rela *irelend, 14316 nds32_elf_blank_t *relax_blank_list, 14317 asection *sec,bfd_vma *off, 14318 bfd_byte *contents) 14319 { 14320 /* Suppress ex9 if `.no_relax ex9' or inner loop. */ 14321 bfd_boolean nested_ex9, nested_loop; 14322 bfd_boolean ex9_loop_aware; 14323 /* We use the highest 1 byte of result to record 14324 how many bytes location counter has to move. */ 14325 int result = 0; 14326 Elf_Internal_Rela *irel_save = NULL; 14327 struct elf_nds32_link_hash_table *table; 14328 14329 table = nds32_elf_hash_table (info); 14330 ex9_loop_aware = table->ex9_loop_aware; 14331 14332 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset) 14333 { 14334 switch (ELF32_R_TYPE ((*irel)->r_info)) 14335 { 14336 case R_NDS32_RELAX_REGION_BEGIN: 14337 /* Ignore code block. */ 14338 nested_ex9 = FALSE; 14339 nested_loop = FALSE; 14340 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) 14341 || (ex9_loop_aware 14342 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))) 14343 { 14344 /* Check the region if loop or not. If it is true and 14345 ex9-loop-aware is true, ignore the region till region end. */ 14346 /* To save the status for in .no_relax ex9 region and 14347 loop region to conform the block can do ex9 relaxation. */ 14348 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG); 14349 nested_loop = (ex9_loop_aware 14350 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)); 14351 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop)) 14352 { 14353 (*irel)++; 14354 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN) 14355 { 14356 /* There may be nested region. */ 14357 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0) 14358 nested_ex9 = TRUE; 14359 else if (ex9_loop_aware 14360 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)) 14361 nested_loop = TRUE; 14362 } 14363 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END) 14364 { 14365 /* The end of region. */ 14366 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0) 14367 nested_ex9 = FALSE; 14368 else if (ex9_loop_aware 14369 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)) 14370 nested_loop = FALSE; 14371 } 14372 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL 14373 && ((*irel)->r_addend & 0x1f) == 2) 14374 { 14375 /* Alignment exist in the region. */ 14376 result |= CLEAN_PRE; 14377 if (((*irel)->r_offset - 14378 get_nds32_elf_blank_total (&relax_blank_list, 14379 (*irel)->r_offset, 0)) & 0x02) 14380 result |= PUSH_PRE; 14381 } 14382 } 14383 if ((*irel) >= irelend) 14384 *off = sec->size; 14385 else 14386 *off = (*irel)->r_offset; 14387 14388 /* The final instruction in the region, regard this one as data to ignore it. */ 14389 result |= DATA_EXIST; 14390 return result; 14391 } 14392 break; 14393 14394 case R_NDS32_LABEL: 14395 if (((*irel)->r_addend & 0x1f) == 2) 14396 { 14397 /* Check this point is align and decide to do ex9 or not. */ 14398 result |= CLEAN_PRE; 14399 if (((*irel)->r_offset - 14400 get_nds32_elf_blank_total (&relax_blank_list, 14401 (*irel)->r_offset, 0)) & 0x02) 14402 result |= PUSH_PRE; 14403 } 14404 break; 14405 case R_NDS32_32_RELA: 14406 /* Data. */ 14407 result |= (4 << 24); 14408 result |= DATA_EXIST; 14409 break; 14410 case R_NDS32_16_RELA: 14411 /* Data. */ 14412 result |= (2 << 24); 14413 result |= DATA_EXIST; 14414 break; 14415 case R_NDS32_DATA: 14416 /* Data. */ 14417 /* The least code alignment is 2. If the data is only one byte, 14418 we have to shift one more byte. */ 14419 if ((*irel)->r_addend == 1) 14420 result |= ((*irel)->r_addend << 25) ; 14421 else 14422 result |= ((*irel)->r_addend << 24) ; 14423 14424 result |= DATA_EXIST; 14425 break; 14426 14427 case R_NDS32_25_PCREL_RELA: 14428 case R_NDS32_SDA16S3_RELA: 14429 case R_NDS32_SDA15S3_RELA: 14430 case R_NDS32_SDA15S3: 14431 case R_NDS32_SDA17S2_RELA: 14432 case R_NDS32_SDA15S2_RELA: 14433 case R_NDS32_SDA12S2_SP_RELA: 14434 case R_NDS32_SDA12S2_DP_RELA: 14435 case R_NDS32_SDA15S2: 14436 case R_NDS32_SDA18S1_RELA: 14437 case R_NDS32_SDA15S1_RELA: 14438 case R_NDS32_SDA15S1: 14439 case R_NDS32_SDA19S0_RELA: 14440 case R_NDS32_SDA15S0_RELA: 14441 case R_NDS32_SDA15S0: 14442 case R_NDS32_HI20_RELA: 14443 case R_NDS32_LO12S0_ORI_RELA: 14444 case R_NDS32_LO12S0_RELA: 14445 case R_NDS32_LO12S1_RELA: 14446 case R_NDS32_LO12S2_RELA: 14447 /* These relocation is supported ex9 relaxation currently. */ 14448 /* We have to save the relocation for using later, since we have 14449 to check there is any alignment in the same address. */ 14450 irel_save = *irel; 14451 break; 14452 default: 14453 /* Not support relocations. */ 14454 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table) 14455 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE 14456 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16) 14457 { 14458 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here. 14459 But we have to consider if there is any side-effect. */ 14460 if (!(result & DATA_EXIST)) 14461 { 14462 /* We have to confirm there is no data relocation in the 14463 same address. In general case, this won't happen. */ 14464 /* We have to do ex9 conservative, for those relocation not 14465 considerd we ignore instruction. */ 14466 result |= DATA_EXIST; 14467 if (*(contents + *off) & 0x80) 14468 result |= (2 << 24); 14469 else 14470 result |= (4 << 24); 14471 break; 14472 } 14473 } 14474 } 14475 if ((*irel) < irelend 14476 && ((*irel) + 1) < irelend 14477 && (*irel)->r_offset == ((*irel) + 1)->r_offset) 14478 /* There are relocations pointing to the same address, we have to 14479 check all of them. */ 14480 (*irel)++; 14481 else 14482 { 14483 if (irel_save) 14484 *irel = irel_save; 14485 return result; 14486 } 14487 } 14488 return result; 14489 } 14490 14491 /* Replace with ex9 instruction. */ 14492 14493 static bfd_boolean 14494 nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off, 14495 nds32_elf_blank_t **relax_blank_list, 14496 struct elf_nds32_irel_entry *pre_irel_ptr, 14497 struct elf_nds32_irel_entry **irel_list) 14498 { 14499 if (insn16 != 0) 14500 { 14501 /* Implement the ex9 relaxation. */ 14502 bfd_putb16 (insn16, contents + pre_off); 14503 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list, 14504 pre_off + 2, 2)) 14505 return FALSE; 14506 if (pre_irel_ptr != NULL) 14507 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr); 14508 } 14509 return TRUE; 14510 } 14511 14512 /* Replace input file instruction which is in ex9 itable. */ 14513 14514 static bfd_boolean 14515 nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec) 14516 { 14517 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head; 14518 bfd_byte *contents = NULL; 14519 bfd_vma off; 14520 uint16_t insn16, insn_ex9; 14521 /* `pre_*' are used to track previous instruction that can use ex9.it. */ 14522 bfd_vma pre_off = -1; 14523 uint16_t pre_insn16 = 0; 14524 struct elf_nds32_irel_entry *pre_irel_ptr = NULL; 14525 Elf_Internal_Rela *internal_relocs; 14526 Elf_Internal_Rela *irel; 14527 Elf_Internal_Rela *irelend; 14528 Elf_Internal_Shdr *symtab_hdr; 14529 Elf_Internal_Sym *isym = NULL; 14530 nds32_elf_blank_t *relax_blank_list = NULL; 14531 uint32_t insn = 0; 14532 uint32_t insn_with_reg = 0; 14533 uint32_t it_insn; 14534 uint32_t it_insn_with_reg; 14535 unsigned long r_symndx; 14536 asection *isec; 14537 struct elf_nds32_irel_entry *irel_list = NULL; 14538 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd); 14539 int data_flag, do_replace, save_irel; 14540 struct elf_link_hash_entry_list *h_list; 14541 14542 14543 /* Load section instructions, relocations, and symbol table. */ 14544 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE) 14545 || !nds32_get_local_syms (abfd, sec, &isym)) 14546 return FALSE; 14547 internal_relocs = 14548 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */); 14549 irelend = internal_relocs + sec->reloc_count; 14550 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 14551 14552 off = 0; 14553 14554 /* Check if the object enable ex9. */ 14555 irel = find_relocs_at_address (internal_relocs, internal_relocs, 14556 irelend, R_NDS32_RELAX_ENTRY); 14557 14558 /* Check this section trigger ex9 relaxation. */ 14559 if (irel == NULL 14560 || irel >= irelend 14561 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY 14562 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY 14563 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG))) 14564 return TRUE; 14565 14566 irel = internal_relocs; 14567 14568 /* Check alignment and fetch proper relocation. */ 14569 while (off < sec->size) 14570 { 14571 struct elf_link_hash_entry *h = NULL; 14572 struct elf_nds32_irel_entry *irel_ptr = NULL; 14573 14574 /* Syn the instruction and the relocation. */ 14575 while (irel != NULL && irel < irelend && irel->r_offset < off) 14576 irel++; 14577 14578 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend, 14579 relax_blank_list, sec, 14580 &off, contents); 14581 if (data_flag & PUSH_PRE) 14582 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off, 14583 &relax_blank_list, pre_irel_ptr, 14584 &irel_list)) 14585 return FALSE; 14586 14587 if (data_flag & CLEAN_PRE) 14588 { 14589 pre_off = 0; 14590 pre_insn16 = 0; 14591 pre_irel_ptr = NULL; 14592 } 14593 if (data_flag & DATA_EXIST) 14594 { 14595 /* We save the move offset in the highest byte. */ 14596 off += (data_flag >> 24); 14597 continue; 14598 } 14599 14600 if (*(contents + off) & 0x80) 14601 { 14602 /* 2-byte instruction. */ 14603 off += 2; 14604 continue; 14605 } 14606 14607 /* Load the instruction and its opcode with register for comparing. */ 14608 ex9_insn = ex9_insn_head; 14609 insn = bfd_getb32 (contents + off); 14610 insn_with_reg = 0; 14611 while (ex9_insn) 14612 { 14613 it_insn = strtol (ex9_insn->string, NULL, 16); 14614 it_insn_with_reg = 0; 14615 do_replace = 0; 14616 save_irel = 0; 14617 14618 if (irel != NULL && irel < irelend && irel->r_offset == off) 14619 { 14620 /* Insn with relocation. */ 14621 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg); 14622 14623 if (ex9_insn->irel != NULL) 14624 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn, 14625 &it_insn_with_reg); 14626 14627 if (ex9_insn->irel != NULL 14628 && (ELF32_R_TYPE (irel->r_info) == 14629 ELF32_R_TYPE (ex9_insn->irel->r_info)) 14630 && (insn_with_reg == it_insn_with_reg)) 14631 { 14632 /* Insn relocation and format is the same as table entry. */ 14633 14634 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA 14635 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA 14636 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA 14637 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA 14638 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA 14639 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3 14640 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0) 14641 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA 14642 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA) 14643 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA 14644 && ELF32_R_TYPE (irel->r_info) <= 14645 R_NDS32_SDA12S2_SP_RELA) 14646 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA 14647 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA)) 14648 { 14649 r_symndx = ELF32_R_SYM (irel->r_info); 14650 if (r_symndx < symtab_hdr->sh_info) 14651 { 14652 /* Local symbol. */ 14653 int shndx = isym[r_symndx].st_shndx; 14654 14655 isec = elf_elfsections (abfd)[shndx]->bfd_section; 14656 if (ex9_insn->sec == isec 14657 && ex9_insn->irel->r_addend == irel->r_addend 14658 && ex9_insn->irel->r_info == irel->r_info) 14659 { 14660 do_replace = 1; 14661 save_irel = 1; 14662 } 14663 } 14664 else 14665 { 14666 /* External symbol. */ 14667 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 14668 if (ex9_insn->m_list) 14669 { 14670 h_list = ex9_insn->m_list->h_list; 14671 while (h_list) 14672 { 14673 if (h == h_list->h 14674 && (ex9_insn->m_list->irel->r_addend == 14675 irel->r_addend)) 14676 { 14677 do_replace = 1; 14678 save_irel = 1; 14679 break; 14680 } 14681 h_list = h_list->next; 14682 } 14683 } 14684 } 14685 } 14686 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA) 14687 { 14688 r_symndx = ELF32_R_SYM (irel->r_info); 14689 if (r_symndx < symtab_hdr->sh_info) 14690 { 14691 /* Local symbols. Compare its base symbol and offset. */ 14692 int shndx = isym[r_symndx].st_shndx; 14693 14694 isec = elf_elfsections (abfd)[shndx]->bfd_section; 14695 if (ex9_insn->sec == isec 14696 && ex9_insn->irel->r_addend == irel->r_addend 14697 && ex9_insn->irel->r_info == irel->r_info) 14698 { 14699 do_replace = 1; 14700 save_irel = 1; 14701 } 14702 } 14703 else 14704 { 14705 /* External symbol. */ 14706 struct elf_link_hash_entry_mul_list *m_list; 14707 14708 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 14709 m_list = ex9_insn->m_list; 14710 14711 while (m_list) 14712 { 14713 h_list = m_list->h_list; 14714 14715 while (h_list) 14716 { 14717 if (h == h_list->h 14718 && (m_list->irel->r_addend 14719 == irel->r_addend)) 14720 { 14721 do_replace = 1; 14722 save_irel = 1; 14723 if (ex9_insn->next 14724 && ex9_insn->m_list 14725 && ex9_insn->m_list == ex9_insn->next->m_list) 14726 { 14727 /* sethi multiple entry must be fixed */ 14728 nds32_elf_ex9_insert_fix (sec, irel, 14729 h, ex9_insn->order); 14730 } 14731 break; 14732 } 14733 h_list = h_list->next; 14734 } 14735 m_list = m_list->next; 14736 } 14737 } 14738 } 14739 } 14740 14741 /* Import table: Check the symbol hash table and the 14742 jump target. Only R_NDS32_25_PCREL_RELA now. */ 14743 else if (ex9_insn->times == -1 14744 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA) 14745 { 14746 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg); 14747 if (insn_with_reg == it_insn_with_reg) 14748 { 14749 char code[10]; 14750 bfd_vma relocation; 14751 14752 r_symndx = ELF32_R_SYM (irel->r_info); 14753 if (r_symndx >= symtab_hdr->sh_info) 14754 { 14755 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 14756 if ((h->root.type == bfd_link_hash_defined 14757 || h->root.type == bfd_link_hash_defweak) 14758 && h->root.u.def.section != NULL 14759 && h->root.u.def.section->output_section != NULL 14760 && h->root.u.def.section->gc_mark == 1 14761 && bfd_is_abs_section (h->root.u.def.section) 14762 && h->root.u.def.value > sec->size) 14763 { 14764 relocation = h->root.u.def.value + 14765 h->root.u.def.section->output_section->vma + 14766 h->root.u.def.section->output_offset; 14767 relocation += irel->r_addend; 14768 insn = insn_with_reg 14769 | ((relocation >> 1) & 0xffffff); 14770 snprintf (code, sizeof (code), "%08x", insn); 14771 if (strcmp (code, ex9_insn->string) == 0) 14772 { 14773 do_replace = 1; 14774 save_irel = 1; 14775 } 14776 } 14777 } 14778 } 14779 } 14780 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN 14781 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END 14782 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE) 14783 { 14784 /* These relocations do not have to relocate contens, so it can 14785 be regard as instruction without relocation. */ 14786 if (insn == it_insn && ex9_insn->irel == NULL) 14787 do_replace = 1; 14788 } 14789 } 14790 else 14791 { 14792 /* Instruction without relocation, we only 14793 have to compare their byte code. */ 14794 if (insn == it_insn && ex9_insn->irel == NULL) 14795 do_replace = 1; 14796 } 14797 14798 /* Insntruction match so replacing the code here. */ 14799 if (do_replace == 1) 14800 { 14801 /* There are two formats of ex9 instruction. */ 14802 if (ex9_insn->order < 32) 14803 insn_ex9 = INSN_EX9_IT_2; 14804 else 14805 insn_ex9 = INSN_EX9_IT_1; 14806 insn16 = insn_ex9 | ex9_insn->order; 14807 14808 /* Insert ex9 instruction. */ 14809 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off, 14810 &relax_blank_list, pre_irel_ptr, 14811 &irel_list); 14812 pre_off = off; 14813 pre_insn16 = insn16; 14814 14815 if (save_irel) 14816 { 14817 /* For instuction with relocation do relax. */ 14818 irel_ptr = (struct elf_nds32_irel_entry *) 14819 bfd_malloc (sizeof (struct elf_nds32_irel_entry)); 14820 irel_ptr->irel = irel; 14821 irel_ptr->next = NULL; 14822 pre_irel_ptr = irel_ptr; 14823 } 14824 else 14825 pre_irel_ptr = NULL; 14826 break; 14827 } 14828 ex9_insn = ex9_insn->next; 14829 } 14830 off += 4; 14831 } 14832 14833 /* Insert ex9 instruction. */ 14834 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off, 14835 &relax_blank_list, pre_irel_ptr, 14836 &irel_list); 14837 14838 /* Delete the redundant code. */ 14839 if (relax_blank_list) 14840 { 14841 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list); 14842 relax_blank_list = NULL; 14843 } 14844 14845 /* Clear the relocation that is replaced by ex9. */ 14846 while (irel_list) 14847 { 14848 struct elf_nds32_irel_entry *irel_ptr; 14849 14850 irel_ptr = irel_list; 14851 irel_list = irel_ptr->next; 14852 irel_ptr->irel->r_info = 14853 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN); 14854 free (irel_ptr); 14855 } 14856 return TRUE; 14857 } 14858 14859 /* Initialize ex9 hash table. */ 14860 14861 int 14862 nds32_elf_ex9_init (void) 14863 { 14864 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc, 14865 sizeof (struct elf_nds32_code_hash_entry), 14866 1023)) 14867 { 14868 (*_bfd_error_handler) (_("Linker: cannot init ex9 hash table error \n")); 14869 return FALSE; 14870 } 14871 return TRUE; 14872 } 14873 14874 /* Predict how many bytes will be relaxed with ex9 and ifc. */ 14875 14876 static void 14877 nds32_elf_ex9_total_relax (struct bfd_link_info *info) 14878 { 14879 struct elf_nds32_insn_times_entry *ex9_insn; 14880 struct elf_nds32_insn_times_entry *temp; 14881 int target_optimize; 14882 struct elf_nds32_link_hash_table *table; 14883 14884 if (ex9_insn_head == NULL) 14885 return; 14886 14887 table = nds32_elf_hash_table (info); 14888 target_optimize = table->target_optimize; 14889 ex9_insn = ex9_insn_head; 14890 while (ex9_insn) 14891 { 14892 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size; 14893 temp = ex9_insn; 14894 ex9_insn = ex9_insn->next; 14895 free (temp); 14896 } 14897 ex9_insn_head = NULL; 14898 14899 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON)) 14900 { 14901 /* Examine ifc reduce size. */ 14902 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head; 14903 struct elf_nds32_ifc_irel_list *irel_ptr = NULL; 14904 int size = 0; 14905 14906 while (ifc_ent) 14907 { 14908 if (ifc_ent->enable == 0) 14909 { 14910 /* Not ifc yet. */ 14911 irel_ptr = ifc_ent->irel_head; 14912 while (irel_ptr) 14913 { 14914 size += 2; 14915 irel_ptr = irel_ptr->next; 14916 } 14917 } 14918 size -= 2; 14919 ifc_ent = ifc_ent->next; 14920 } 14921 ex9_relax_size += size; 14922 } 14923 } 14924 14925 /* Finish ex9 table. */ 14926 14927 void 14928 nds32_elf_ex9_finish (struct bfd_link_info *link_info) 14929 { 14930 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times); 14931 nds32_elf_order_insn_times (link_info); 14932 nds32_elf_ex9_total_relax (link_info); 14933 /* Traverse the hash table and count its times. */ 14934 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times); 14935 nds32_elf_order_insn_times (link_info); 14936 nds32_elf_ex9_build_itable (link_info); 14937 } 14938 14939 /* Relocate the entries in ex9 table. */ 14940 14941 static bfd_vma 14942 nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr, 14943 struct bfd_link_info *link_info) 14944 { 14945 Elf_Internal_Sym *isym = NULL; 14946 bfd_vma relocation = -1; 14947 struct elf_link_hash_entry *h; 14948 14949 if (ptr->m_list != NULL) 14950 { 14951 /* Global symbol. */ 14952 h = ptr->m_list->h_list->h; 14953 if ((h->root.type == bfd_link_hash_defined 14954 || h->root.type == bfd_link_hash_defweak) 14955 && h->root.u.def.section != NULL 14956 && h->root.u.def.section->output_section != NULL) 14957 { 14958 14959 relocation = h->root.u.def.value + 14960 h->root.u.def.section->output_section->vma + 14961 h->root.u.def.section->output_offset; 14962 relocation += ptr->m_list->irel->r_addend; 14963 } 14964 else 14965 relocation = 0; 14966 } 14967 else if (ptr->sec !=NULL) 14968 { 14969 /* Local symbol. */ 14970 Elf_Internal_Sym sym; 14971 asection *sec = NULL; 14972 asection isec; 14973 asection *isec_ptr = &isec; 14974 Elf_Internal_Rela irel_backup = *(ptr->irel); 14975 asection *sec_backup = ptr->sec; 14976 bfd *abfd = ptr->sec->owner; 14977 14978 if (!nds32_get_local_syms (abfd, sec, &isym)) 14979 return FALSE; 14980 isym = isym + ELF32_R_SYM (ptr->irel->r_info); 14981 14982 sec = bfd_section_from_elf_index (abfd, isym->st_shndx); 14983 if (sec != NULL) 14984 *isec_ptr = *sec; 14985 sym = *isym; 14986 14987 /* The purpose is same as elf_link_input_bfd. */ 14988 if (isec_ptr != NULL 14989 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE 14990 && ELF_ST_TYPE (isym->st_info) != STT_SECTION) 14991 { 14992 sym.st_value = 14993 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr, 14994 elf_section_data (isec_ptr)->sec_info, 14995 isym->st_value); 14996 } 14997 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym, 14998 &ptr->sec, ptr->irel); 14999 if (ptr->irel != NULL) 15000 relocation += ptr->irel->r_addend; 15001 15002 /* Restore origin value since there may be some insntructions that 15003 could not be replaced with ex9.it. */ 15004 *(ptr->irel) = irel_backup; 15005 ptr->sec = sec_backup; 15006 } 15007 15008 return relocation; 15009 } 15010 15011 /* Import ex9 table and build list. */ 15012 15013 void 15014 nds32_elf_ex9_import_table (struct bfd_link_info *info) 15015 { 15016 int num = 0; 15017 bfd_byte *contents; 15018 unsigned long insn; 15019 FILE *ex9_import_file; 15020 int update_ex9_table; 15021 struct elf_nds32_link_hash_table *table; 15022 15023 table = nds32_elf_hash_table (info); 15024 ex9_import_file = table->ex9_import_file; 15025 rewind (table->ex9_import_file); 15026 15027 contents = bfd_malloc (sizeof (bfd_byte) * 4); 15028 15029 /* Read instructions from the input file and build the list. */ 15030 while (!feof (ex9_import_file)) 15031 { 15032 char *code; 15033 struct elf_nds32_insn_times_entry *ptr; 15034 size_t nread; 15035 15036 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file); 15037 /* Ignore the final byte 0x0a. */ 15038 if (nread < 1) 15039 break; 15040 insn = bfd_getb32 (contents); 15041 code = bfd_malloc (sizeof (char) * 9); 15042 snprintf (code, 9, "%08lx", insn); 15043 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry)); 15044 ptr->string = code; 15045 ptr->order = num; 15046 ptr->times = -1; 15047 ptr->sec = NULL; 15048 ptr->m_list = NULL; 15049 ptr->rel_backup.r_offset = 0; 15050 ptr->rel_backup.r_info = 0; 15051 ptr->rel_backup.r_addend = 0; 15052 ptr->irel = NULL; 15053 ptr->next = NULL; 15054 nds32_elf_ex9_insert_entry (ptr); 15055 num++; 15056 } 15057 15058 update_ex9_table = table->update_ex9_table; 15059 if (update_ex9_table == 1) 15060 { 15061 /* It has to consider of sethi need to use multiple page 15062 but it not be done yet. */ 15063 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times); 15064 nds32_elf_order_insn_times (info); 15065 } 15066 } 15067 15068 /* Export ex9 table. */ 15069 15070 static void 15071 nds32_elf_ex9_export (struct bfd_link_info *info, 15072 bfd_byte *contents, int size) 15073 { 15074 FILE *ex9_export_file; 15075 struct elf_nds32_link_hash_table *table; 15076 15077 table = nds32_elf_hash_table (info); 15078 ex9_export_file = table->ex9_export_file; 15079 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file); 15080 fclose (ex9_export_file); 15081 } 15082 15083 /* Adjust relocations of J and JAL in ex9.itable. 15084 Export ex9 table. */ 15085 15086 static void 15087 nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info) 15088 { 15089 asection *table_sec = NULL; 15090 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head; 15091 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2; 15092 bfd *it_abfd; 15093 uint32_t insn, insn_with_reg, source_insn; 15094 bfd_byte *contents = NULL, *source_contents = NULL; 15095 int size = 0; 15096 bfd_vma gp; 15097 int shift, update_ex9_table, offset = 0; 15098 reloc_howto_type *howto = NULL; 15099 Elf_Internal_Rela rel_backup; 15100 unsigned short insn_ex9; 15101 struct elf_nds32_link_hash_table *table; 15102 FILE *ex9_export_file; 15103 static bfd_boolean done = FALSE; 15104 15105 if (done) 15106 return; 15107 15108 done = TRUE; 15109 15110 table = nds32_elf_hash_table (link_info); 15111 if (table) 15112 table->relax_status |= NDS32_RELAX_EX9_DONE; 15113 15114 15115 update_ex9_table = table->update_ex9_table; 15116 /* Generated ex9.itable exactly. */ 15117 if (update_ex9_table == 0) 15118 { 15119 for (it_abfd = link_info->input_bfds; it_abfd != NULL; 15120 it_abfd = it_abfd->link.next) 15121 { 15122 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable"); 15123 if (table_sec != NULL) 15124 break; 15125 } 15126 15127 if (table_sec != NULL) 15128 { 15129 bfd *output_bfd; 15130 15131 output_bfd = table_sec->output_section->owner; 15132 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE); 15133 if (table_sec->size == 0) 15134 return; 15135 15136 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE)) 15137 return; 15138 } 15139 } 15140 else 15141 { 15142 /* Set gp. */ 15143 bfd *output_bfd; 15144 15145 output_bfd = link_info->input_bfds->sections->output_section->owner; 15146 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE); 15147 contents = bfd_malloc (sizeof (bfd_byte) * 2048); 15148 } 15149 15150 /* Relocate instruction. */ 15151 while (ex9_insn) 15152 { 15153 bfd_vma relocation, min_relocation = 0xffffffff; 15154 15155 insn = strtol (ex9_insn->string, NULL, 16); 15156 insn_with_reg = 0; 15157 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL) 15158 { 15159 if (ex9_insn->m_list) 15160 rel_backup = ex9_insn->m_list->rel_backup; 15161 else 15162 rel_backup = ex9_insn->rel_backup; 15163 15164 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg); 15165 howto = 15166 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE 15167 (rel_backup.r_info)); 15168 shift = howto->rightshift; 15169 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA 15170 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA 15171 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA 15172 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA 15173 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA) 15174 { 15175 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info); 15176 insn = 15177 insn_with_reg | ((relocation >> shift) & 15178 nds32_elf_irel_mask (&rel_backup)); 15179 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15180 } 15181 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3 15182 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0) 15183 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA 15184 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA) 15185 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA 15186 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA) 15187 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA 15188 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA)) 15189 { 15190 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info); 15191 insn = 15192 insn_with_reg | (((relocation - gp) >> shift) & 15193 nds32_elf_irel_mask (&rel_backup)); 15194 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15195 } 15196 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA) 15197 { 15198 /* Sethi may be multiple entry for one insn. */ 15199 if (ex9_insn->next && ex9_insn->m_list 15200 && ex9_insn->m_list == ex9_insn->next->m_list) 15201 { 15202 struct elf_link_hash_entry_mul_list *m_list; 15203 struct elf_nds32_ex9_refix *fix_ptr; 15204 struct elf_link_hash_entry *h; 15205 15206 temp_ptr = ex9_insn; 15207 temp_ptr2 = ex9_insn; 15208 m_list = ex9_insn->m_list; 15209 while (m_list) 15210 { 15211 h = m_list->h_list->h; 15212 relocation = h->root.u.def.value + 15213 h->root.u.def.section->output_section->vma + 15214 h->root.u.def.section->output_offset; 15215 relocation += m_list->irel->r_addend; 15216 15217 if (relocation < min_relocation) 15218 min_relocation = relocation; 15219 m_list = m_list->next; 15220 } 15221 relocation = min_relocation; 15222 15223 /* Put insntruction into ex9 table. */ 15224 insn = insn_with_reg 15225 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup)); 15226 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15227 relocation = relocation + 0x1000; /* hi20 */ 15228 15229 while (ex9_insn->next && ex9_insn->m_list 15230 && ex9_insn->m_list == ex9_insn->next->m_list) 15231 { 15232 /* Multiple sethi. */ 15233 ex9_insn = ex9_insn->next; 15234 size += 4; 15235 insn = 15236 insn_with_reg | ((relocation >> shift) & 15237 nds32_elf_irel_mask (&rel_backup)); 15238 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15239 relocation = relocation + 0x1000; /* hi20 */ 15240 } 15241 15242 fix_ptr = ex9_refix_head; 15243 while (fix_ptr) 15244 { 15245 /* Fix ex9 insn. */ 15246 /* temp_ptr2 points to the head of multiple sethi. */ 15247 temp_ptr = temp_ptr2; 15248 while (fix_ptr->order != temp_ptr->order && fix_ptr->next) 15249 { 15250 fix_ptr = fix_ptr->next; 15251 } 15252 if (fix_ptr->order != temp_ptr->order) 15253 break; 15254 15255 /* Set source insn. */ 15256 relocation = 15257 fix_ptr->h->root.u.def.value + 15258 fix_ptr->h->root.u.def.section->output_section->vma + 15259 fix_ptr->h->root.u.def.section->output_offset; 15260 relocation += fix_ptr->irel->r_addend; 15261 /* sethi imm is imm20s. */ 15262 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff); 15263 15264 while (temp_ptr) 15265 { 15266 /* Match entry and source code. */ 15267 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset); 15268 if (insn == source_insn) 15269 { 15270 /* Fix the ex9 insn. */ 15271 if (temp_ptr->order != fix_ptr->order) 15272 { 15273 if (!nds32_get_section_contents 15274 (fix_ptr->sec->owner, fix_ptr->sec, 15275 &source_contents, TRUE)) 15276 (*_bfd_error_handler) 15277 (_("Linker: error cannot fixed ex9 relocation \n")); 15278 if (temp_ptr->order < 32) 15279 insn_ex9 = INSN_EX9_IT_2; 15280 else 15281 insn_ex9 = INSN_EX9_IT_1; 15282 insn_ex9 = insn_ex9 | temp_ptr->order; 15283 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset); 15284 } 15285 break; 15286 } 15287 else 15288 { 15289 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list) 15290 (*_bfd_error_handler) 15291 (_("Linker: error cannot fixed ex9 relocation \n")); 15292 else 15293 temp_ptr = temp_ptr->next; 15294 } 15295 } 15296 fix_ptr = fix_ptr->next; 15297 } 15298 } 15299 else 15300 { 15301 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info); 15302 insn = insn_with_reg 15303 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup)); 15304 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15305 } 15306 } 15307 } 15308 else 15309 { 15310 /* Insn without relocation does not have to be fixed 15311 if need to update export table. */ 15312 if (update_ex9_table == 1) 15313 bfd_putb32 (insn, contents + (ex9_insn->order) * 4); 15314 } 15315 ex9_insn = ex9_insn->next; 15316 size += 4; 15317 } 15318 15319 ex9_export_file = table->ex9_export_file; 15320 if (ex9_export_file != NULL) 15321 nds32_elf_ex9_export (link_info, contents, table_sec->size); 15322 else if (update_ex9_table == 1) 15323 { 15324 table->ex9_export_file = table->ex9_import_file; 15325 rewind (table->ex9_export_file); 15326 nds32_elf_ex9_export (link_info, contents, size); 15327 } 15328 } 15329 15330 /* Generate ex9 hash table. */ 15331 15332 static bfd_boolean 15333 nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec, 15334 struct bfd_link_info *link_info) 15335 { 15336 Elf_Internal_Rela *internal_relocs; 15337 Elf_Internal_Rela *irelend; 15338 Elf_Internal_Rela *irel; 15339 Elf_Internal_Rela *jrel; 15340 Elf_Internal_Rela rel_backup; 15341 Elf_Internal_Shdr *symtab_hdr; 15342 Elf_Internal_Sym *isym = NULL; 15343 asection *isec; 15344 struct elf_link_hash_entry **sym_hashes; 15345 bfd_byte *contents = NULL; 15346 bfd_vma off = 0; 15347 unsigned long r_symndx; 15348 uint32_t insn, insn_with_reg; 15349 struct elf_link_hash_entry *h; 15350 int data_flag, shift, align; 15351 bfd_vma relocation; 15352 /* Suppress ex9 if `.no_relax ex9' or inner loop. */ 15353 reloc_howto_type *howto = NULL; 15354 15355 sym_hashes = elf_sym_hashes (abfd); 15356 /* Load section instructions, relocations, and symbol table. */ 15357 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)) 15358 return FALSE; 15359 15360 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, 15361 TRUE /* keep_memory */); 15362 irelend = internal_relocs + sec->reloc_count; 15363 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 15364 if (!nds32_get_local_syms (abfd, sec, &isym)) 15365 return FALSE; 15366 15367 /* Check the object if enable ex9. */ 15368 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend, 15369 R_NDS32_RELAX_ENTRY); 15370 15371 /* Check this section trigger ex9 relaxation. */ 15372 if (irel == NULL 15373 || irel >= irelend 15374 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY 15375 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY 15376 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG))) 15377 return TRUE; 15378 15379 irel = internal_relocs; 15380 15381 /* Push each insn into hash table. */ 15382 while (off < sec->size) 15383 { 15384 char code[10]; 15385 struct elf_nds32_code_hash_entry *entry; 15386 15387 while (irel != NULL && irel < irelend && irel->r_offset < off) 15388 irel++; 15389 15390 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend, 15391 NULL, sec, &off, contents); 15392 if (data_flag & DATA_EXIST) 15393 { 15394 /* We save the move offset in the highest byte. */ 15395 off += (data_flag >> 24); 15396 continue; 15397 } 15398 15399 if (*(contents + off) & 0x80) 15400 { 15401 off += 2; 15402 } 15403 else 15404 { 15405 h = NULL; 15406 isec = NULL; 15407 jrel = NULL; 15408 rel_backup.r_info = 0; 15409 rel_backup.r_offset = 0; 15410 rel_backup.r_addend = 0; 15411 /* Load the instruction and its opcode with register for comparing. */ 15412 insn = bfd_getb32 (contents + off); 15413 insn_with_reg = 0; 15414 if (irel != NULL && irel < irelend && irel->r_offset == off) 15415 { 15416 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg); 15417 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info)); 15418 shift = howto->rightshift; 15419 align = (1 << shift) - 1; 15420 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA 15421 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA 15422 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA 15423 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA 15424 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA 15425 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA 15426 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3 15427 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0) 15428 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA 15429 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA) 15430 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA 15431 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA) 15432 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA 15433 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA)) 15434 { 15435 r_symndx = ELF32_R_SYM (irel->r_info); 15436 jrel = irel; 15437 rel_backup = *irel; 15438 if (r_symndx < symtab_hdr->sh_info) 15439 { 15440 /* Local symbol. */ 15441 int shndx = isym[r_symndx].st_shndx; 15442 15443 bfd_vma st_value = (isym + r_symndx)->st_value; 15444 isec = elf_elfsections (abfd)[shndx]->bfd_section; 15445 relocation = (isec->output_section->vma + isec->output_offset 15446 + st_value + irel->r_addend); 15447 } 15448 else 15449 { 15450 /* External symbol. */ 15451 bfd_boolean warned ATTRIBUTE_UNUSED; 15452 bfd_boolean ignored ATTRIBUTE_UNUSED; 15453 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED; 15454 asection *sym_sec; 15455 15456 /* Maybe there is a better way to get h and relocation */ 15457 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel, 15458 r_symndx, symtab_hdr, sym_hashes, 15459 h, sym_sec, relocation, 15460 unresolved_reloc, warned, ignored); 15461 relocation += irel->r_addend; 15462 if ((h->root.type != bfd_link_hash_defined 15463 && h->root.type != bfd_link_hash_defweak) 15464 || strcmp (h->root.root.string, "_FP_BASE_") == 0) 15465 { 15466 off += 4; 15467 continue; 15468 } 15469 } 15470 15471 /* Check for gp relative instruction alignment. */ 15472 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3 15473 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0) 15474 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA 15475 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA) 15476 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA 15477 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA) 15478 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA 15479 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA)) 15480 { 15481 bfd_vma gp; 15482 bfd *output_bfd = sec->output_section->owner; 15483 bfd_reloc_status_type r; 15484 15485 /* If the symbol is in the abs section, the out_bfd will be null. 15486 This happens when the relocation has a symbol@GOTOFF. */ 15487 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE); 15488 if (r != bfd_reloc_ok) 15489 { 15490 off += 4; 15491 continue; 15492 } 15493 15494 relocation -= gp; 15495 15496 /* Make sure alignment is correct. */ 15497 if (relocation & align) 15498 { 15499 /* Incorrect alignment. */ 15500 (*_bfd_error_handler) 15501 (_("%s: warning: unaligned small data access. " 15502 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."), 15503 bfd_get_filename (abfd), irel->r_offset, 15504 irel->r_info, irel->r_addend, relocation, align); 15505 off += 4; 15506 continue; 15507 } 15508 } 15509 15510 insn = insn_with_reg 15511 | ((relocation >> shift) & nds32_elf_irel_mask (irel)); 15512 } 15513 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN 15514 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END 15515 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE) 15516 { 15517 /* These relocations do not have to relocate contens, so it can 15518 be regard as instruction without relocation. */ 15519 } 15520 else 15521 { 15522 off += 4; 15523 continue; 15524 } 15525 } 15526 15527 snprintf (code, sizeof (code), "%08x", insn); 15528 /* Copy "code". */ 15529 entry = (struct elf_nds32_code_hash_entry*) 15530 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE); 15531 if (entry == NULL) 15532 { 15533 (*_bfd_error_handler) 15534 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code); 15535 return FALSE; 15536 } 15537 if (h) 15538 { 15539 if (h->root.type == bfd_link_hash_undefined) 15540 return TRUE; 15541 /* Global symbol. */ 15542 /* In order to do sethi with different symbol but same value. */ 15543 if (entry->m_list == NULL) 15544 { 15545 struct elf_link_hash_entry_mul_list *m_list_new; 15546 struct elf_link_hash_entry_list *h_list_new; 15547 15548 m_list_new = (struct elf_link_hash_entry_mul_list *) 15549 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list)); 15550 h_list_new = (struct elf_link_hash_entry_list *) 15551 bfd_malloc (sizeof (struct elf_link_hash_entry_list)); 15552 entry->m_list = m_list_new; 15553 m_list_new->h_list = h_list_new; 15554 m_list_new->rel_backup = rel_backup; 15555 m_list_new->times = 1; 15556 m_list_new->irel = jrel; 15557 m_list_new->next = NULL; 15558 h_list_new->h = h; 15559 h_list_new->next = NULL; 15560 } 15561 else 15562 { 15563 struct elf_link_hash_entry_mul_list *m_list = entry->m_list; 15564 struct elf_link_hash_entry_list *h_list; 15565 15566 while (m_list) 15567 { 15568 /* Build the different symbols that point to the same address. */ 15569 h_list = m_list->h_list; 15570 if (h_list->h->root.u.def.value == h->root.u.def.value 15571 && h_list->h->root.u.def.section->output_section->vma 15572 == h->root.u.def.section->output_section->vma 15573 && h_list->h->root.u.def.section->output_offset 15574 == h->root.u.def.section->output_offset 15575 && m_list->rel_backup.r_addend == rel_backup.r_addend) 15576 { 15577 m_list->times++; 15578 m_list->irel = jrel; 15579 while (h_list->h != h && h_list->next) 15580 h_list = h_list->next; 15581 if (h_list->h != h) 15582 { 15583 struct elf_link_hash_entry_list *h_list_new; 15584 15585 h_list_new = (struct elf_link_hash_entry_list *) 15586 bfd_malloc (sizeof (struct elf_link_hash_entry_list)); 15587 h_list->next = h_list_new; 15588 h_list_new->h = h; 15589 h_list_new->next = NULL; 15590 } 15591 break; 15592 } 15593 /* The sethi case may have different address but the 15594 hi20 is the same. */ 15595 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA 15596 && m_list->next == NULL) 15597 { 15598 struct elf_link_hash_entry_mul_list *m_list_new; 15599 struct elf_link_hash_entry_list *h_list_new; 15600 15601 m_list_new = (struct elf_link_hash_entry_mul_list *) 15602 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list)); 15603 h_list_new = (struct elf_link_hash_entry_list *) 15604 bfd_malloc (sizeof (struct elf_link_hash_entry_list)); 15605 m_list->next = m_list_new; 15606 m_list_new->h_list = h_list_new; 15607 m_list_new->rel_backup = rel_backup; 15608 m_list_new->times = 1; 15609 m_list_new->irel = jrel; 15610 m_list_new->next = NULL; 15611 h_list_new->h = h; 15612 h_list_new->next = NULL; 15613 break; 15614 } 15615 m_list = m_list->next; 15616 } 15617 if (!m_list) 15618 { 15619 off += 4; 15620 continue; 15621 } 15622 } 15623 } 15624 else 15625 { 15626 /* Local symbol and insn without relocation*/ 15627 entry->times++; 15628 entry->rel_backup = rel_backup; 15629 } 15630 15631 /* Use in sethi insn with constant and global symbol in same format. */ 15632 if (!jrel) 15633 entry->const_insn = 1; 15634 else 15635 entry->irel = jrel; 15636 entry->sec = isec; 15637 off += 4; 15638 } 15639 } 15640 return TRUE; 15641 } 15642 15643 /* Set the _ITB_BASE, and point it to ex9 table. */ 15644 15645 bfd_boolean 15646 nds32_elf_ex9_itb_base (struct bfd_link_info *link_info) 15647 { 15648 bfd *abfd; 15649 asection *sec; 15650 bfd *output_bfd = NULL; 15651 struct bfd_link_hash_entry *bh = NULL; 15652 15653 if (is_ITB_BASE_set == 1) 15654 return TRUE; 15655 15656 is_ITB_BASE_set = 1; 15657 15658 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE); 15659 15660 if (bh && (bh->type == bfd_link_hash_defined 15661 || bh->type == bfd_link_hash_defweak)) 15662 return TRUE; 15663 15664 for (abfd = link_info->input_bfds; abfd != NULL; 15665 abfd = abfd->link.next) 15666 { 15667 sec = bfd_get_section_by_name (abfd, ".ex9.itable"); 15668 if (sec != NULL) 15669 { 15670 output_bfd = sec->output_section->owner; 15671 break; 15672 } 15673 } 15674 if (output_bfd == NULL) 15675 { 15676 output_bfd = link_info->output_bfd; 15677 if (output_bfd->sections == NULL) 15678 return TRUE; 15679 else 15680 sec = bfd_abs_section_ptr; 15681 } 15682 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", 15683 FALSE, FALSE, TRUE); 15684 return (_bfd_generic_link_add_one_symbol 15685 (link_info, output_bfd, "_ITB_BASE_", 15686 BSF_GLOBAL | BSF_WEAK, sec, 0, 15687 (const char *) NULL, FALSE, get_elf_backend_data 15688 (output_bfd)->collect, &bh)); 15689 } /* End EX9.IT */ 15690 15691 15693 #define ELF_ARCH bfd_arch_nds32 15694 #define ELF_MACHINE_CODE EM_NDS32 15695 #define ELF_MAXPAGESIZE 0x1000 15696 #define ELF_TARGET_ID NDS32_ELF_DATA 15697 15698 #define TARGET_BIG_SYM nds32_elf32_be_vec 15699 #define TARGET_BIG_NAME "elf32-nds32be" 15700 #define TARGET_LITTLE_SYM nds32_elf32_le_vec 15701 #define TARGET_LITTLE_NAME "elf32-nds32le" 15702 15703 #define elf_info_to_howto nds32_info_to_howto 15704 #define elf_info_to_howto_rel nds32_info_to_howto_rel 15705 15706 #define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create 15707 #define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data 15708 #define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data 15709 #define bfd_elf32_bfd_relax_section nds32_elf_relax_section 15710 #define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags 15711 15712 #define bfd_elf32_mkobject nds32_elf_mkobject 15713 #define elf_backend_action_discarded nds32_elf_action_discarded 15714 #define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook 15715 #define elf_backend_check_relocs nds32_elf_check_relocs 15716 #define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol 15717 #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections 15718 #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections 15719 #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol 15720 #define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections 15721 #define elf_backend_relocate_section nds32_elf_relocate_section 15722 #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook 15723 #define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook 15724 #define elf_backend_grok_prstatus nds32_elf_grok_prstatus 15725 #define elf_backend_grok_psinfo nds32_elf_grok_psinfo 15726 #define elf_backend_reloc_type_class nds32_elf_reloc_type_class 15727 #define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol 15728 #define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook 15729 #define elf_backend_output_arch_syms nds32_elf_output_arch_syms 15730 #define elf_backend_object_p nds32_elf_object_p 15731 #define elf_backend_final_write_processing nds32_elf_final_write_processing 15732 #define elf_backend_special_sections nds32_elf_special_sections 15733 #define bfd_elf32_bfd_get_relocated_section_contents \ 15734 nds32_elf_get_relocated_section_contents 15735 15736 #define elf_backend_can_gc_sections 1 15737 #define elf_backend_can_refcount 1 15738 #define elf_backend_want_got_plt 1 15739 #define elf_backend_plt_readonly 1 15740 #define elf_backend_want_plt_sym 0 15741 #define elf_backend_got_header_size 12 15742 #define elf_backend_may_use_rel_p 1 15743 #define elf_backend_default_use_rela_p 1 15744 #define elf_backend_may_use_rela_p 1 15745 15746 #include "elf32-target.h" 15747 15748 #undef ELF_MAXPAGESIZE 15749 #define ELF_MAXPAGESIZE 0x2000 15750 15751 #undef TARGET_BIG_SYM 15752 #define TARGET_BIG_SYM nds32_elf32_linux_be_vec 15753 #undef TARGET_BIG_NAME 15754 #define TARGET_BIG_NAME "elf32-nds32be-linux" 15755 #undef TARGET_LITTLE_SYM 15756 #define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec 15757 #undef TARGET_LITTLE_NAME 15758 #define TARGET_LITTLE_NAME "elf32-nds32le-linux" 15759 #undef elf32_bed 15760 #define elf32_bed elf32_nds32_lin_bed 15761 15762 #include "elf32-target.h" 15763
